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author | Greta Yorsh <greta.yorsh@arm.com> | 2013-04-05 18:12:37 +0100 |
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committer | Greta Yorsh <gretay@gcc.gnu.org> | 2013-04-05 18:12:37 +0100 |
commit | 75fe1cb5dd734f87eb163b671cd69b2e3e4fd8ed (patch) | |
tree | f6c91ba21e37341e7effde75c58f1da9baf0df65 | |
parent | dd660e8e0aa0083754b060dfab0c2487fb8b7382 (diff) | |
download | gcc-75fe1cb5dd734f87eb163b671cd69b2e3e4fd8ed.zip gcc-75fe1cb5dd734f87eb163b671cd69b2e3e4fd8ed.tar.gz gcc-75fe1cb5dd734f87eb163b671cd69b2e3e4fd8ed.tar.bz2 |
arm.md (arm_smax_insn): Convert define_insn into define_insn_and_split.
2013-04-05 Greta Yorsh <Greta.Yorsh@arm.com>
* config/arm/arm.md (arm_smax_insn): Convert define_insn into
define_insn_and_split.
(arm_smin_insn,arm_umaxsi3,arm_uminsi3): Likewise.
From-SVN: r197528
-rw-r--r-- | gcc/ChangeLog | 6 | ||||
-rw-r--r-- | gcc/config/arm/arm.md | 68 |
2 files changed, 56 insertions, 18 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index da89fde..2bd27c3 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,5 +1,11 @@ 2013-04-05 Greta Yorsh <Greta.Yorsh@arm.com> + * config/arm/arm.md (arm_smax_insn): Convert define_insn into + define_insn_and_split. + (arm_smin_insn,arm_umaxsi3,arm_uminsi3): Likewise. + +2013-04-05 Greta Yorsh <Greta.Yorsh@arm.com> + * config/arm/arm.md (arm_ashldi3_1bit): Convert define_insn into define_insn_and_split. (arm_ashrdi3_1bit,arm_lshrdi3_1bit): Likewise. diff --git a/gcc/config/arm/arm.md b/gcc/config/arm/arm.md index ffec1b4..68519f4 100644 --- a/gcc/config/arm/arm.md +++ b/gcc/config/arm/arm.md @@ -3376,15 +3376,23 @@ [(set_attr "predicable" "yes")] ) -(define_insn "*arm_smax_insn" +(define_insn_and_split "*arm_smax_insn" [(set (match_operand:SI 0 "s_register_operand" "=r,r") (smax:SI (match_operand:SI 1 "s_register_operand" "%0,?r") (match_operand:SI 2 "arm_rhs_operand" "rI,rI"))) (clobber (reg:CC CC_REGNUM))] "TARGET_ARM" - "@ - cmp\\t%1, %2\;movlt\\t%0, %2 - cmp\\t%1, %2\;movge\\t%0, %1\;movlt\\t%0, %2" + "#" + ; cmp\\t%1, %2\;movlt\\t%0, %2 + ; cmp\\t%1, %2\;movge\\t%0, %1\;movlt\\t%0, %2" + "TARGET_ARM" + [(set (reg:CC CC_REGNUM) + (compare:CC (match_dup 1) (match_dup 2))) + (set (match_dup 0) + (if_then_else:SI (ge:SI (reg:CC CC_REGNUM) (const_int 0)) + (match_dup 1) + (match_dup 2)))] + "" [(set_attr "conds" "clob") (set_attr "length" "8,12")] ) @@ -3416,15 +3424,23 @@ [(set_attr "predicable" "yes")] ) -(define_insn "*arm_smin_insn" +(define_insn_and_split "*arm_smin_insn" [(set (match_operand:SI 0 "s_register_operand" "=r,r") (smin:SI (match_operand:SI 1 "s_register_operand" "%0,?r") (match_operand:SI 2 "arm_rhs_operand" "rI,rI"))) (clobber (reg:CC CC_REGNUM))] "TARGET_ARM" - "@ - cmp\\t%1, %2\;movge\\t%0, %2 - cmp\\t%1, %2\;movlt\\t%0, %1\;movge\\t%0, %2" + "#" + ; cmp\\t%1, %2\;movge\\t%0, %2 + ; cmp\\t%1, %2\;movlt\\t%0, %1\;movge\\t%0, %2" + "TARGET_ARM" + [(set (reg:CC CC_REGNUM) + (compare:CC (match_dup 1) (match_dup 2))) + (set (match_dup 0) + (if_then_else:SI (lt:SI (reg:CC CC_REGNUM) (const_int 0)) + (match_dup 1) + (match_dup 2)))] + "" [(set_attr "conds" "clob") (set_attr "length" "8,12")] ) @@ -3439,16 +3455,24 @@ "" ) -(define_insn "*arm_umaxsi3" +(define_insn_and_split "*arm_umaxsi3" [(set (match_operand:SI 0 "s_register_operand" "=r,r,r") (umax:SI (match_operand:SI 1 "s_register_operand" "0,r,?r") (match_operand:SI 2 "arm_rhs_operand" "rI,0,rI"))) (clobber (reg:CC CC_REGNUM))] "TARGET_ARM" - "@ - cmp\\t%1, %2\;movcc\\t%0, %2 - cmp\\t%1, %2\;movcs\\t%0, %1 - cmp\\t%1, %2\;movcs\\t%0, %1\;movcc\\t%0, %2" + "#" + ; cmp\\t%1, %2\;movcc\\t%0, %2 + ; cmp\\t%1, %2\;movcs\\t%0, %1 + ; cmp\\t%1, %2\;movcs\\t%0, %1\;movcc\\t%0, %2" + "TARGET_ARM" + [(set (reg:CC CC_REGNUM) + (compare:CC (match_dup 1) (match_dup 2))) + (set (match_dup 0) + (if_then_else:SI (geu:SI (reg:CC CC_REGNUM) (const_int 0)) + (match_dup 1) + (match_dup 2)))] + "" [(set_attr "conds" "clob") (set_attr "length" "8,8,12")] ) @@ -3463,16 +3487,24 @@ "" ) -(define_insn "*arm_uminsi3" +(define_insn_and_split "*arm_uminsi3" [(set (match_operand:SI 0 "s_register_operand" "=r,r,r") (umin:SI (match_operand:SI 1 "s_register_operand" "0,r,?r") (match_operand:SI 2 "arm_rhs_operand" "rI,0,rI"))) (clobber (reg:CC CC_REGNUM))] "TARGET_ARM" - "@ - cmp\\t%1, %2\;movcs\\t%0, %2 - cmp\\t%1, %2\;movcc\\t%0, %1 - cmp\\t%1, %2\;movcc\\t%0, %1\;movcs\\t%0, %2" + "#" + ; cmp\\t%1, %2\;movcs\\t%0, %2 + ; cmp\\t%1, %2\;movcc\\t%0, %1 + ; cmp\\t%1, %2\;movcc\\t%0, %1\;movcs\\t%0, %2" + "TARGET_ARM" + [(set (reg:CC CC_REGNUM) + (compare:CC (match_dup 1) (match_dup 2))) + (set (match_dup 0) + (if_then_else:SI (ltu:SI (reg:CC CC_REGNUM) (const_int 0)) + (match_dup 1) + (match_dup 2)))] + "" [(set_attr "conds" "clob") (set_attr "length" "8,8,12")] ) |