diff options
| author | Kyrylo Tkachov <kyrylo.tkachov@arm.com> | 2019-09-03 08:06:43 +0000 |
|---|---|---|
| committer | Kyrylo Tkachov <ktkachov@gcc.gnu.org> | 2019-09-03 08:06:43 +0000 |
| commit | 75f935365dba3eb5e9cbd11bc0d75009cad3d019 (patch) | |
| tree | 31000c7537366a134dc5d5338ba63e9754929335 | |
| parent | 3729852e407e5e1c4f1bbacea1b53e61d7609dad (diff) | |
| download | gcc-75f935365dba3eb5e9cbd11bc0d75009cad3d019.zip gcc-75f935365dba3eb5e9cbd11bc0d75009cad3d019.tar.gz gcc-75f935365dba3eb5e9cbd11bc0d75009cad3d019.tar.bz2 | |
[AArch64] Add Linux hwcap strings for some extensions
This patch adds feature strings for some of the extensions. This string is what is read from /proc/cpuinfo on Linux systems
and used during -march=native detection.
The strings are taken from the kernel source tree at:
https://github.com/torvalds/linux/blob/master/arch/arm64/kernel/cpuinfo.c#L45
* config/aarch64/aarch64-option-extensions.def (sb): Add feature
string.
(ssbs): Likewise.
(sve2): Likewise.
(sve2-sm4): Likewise.
(sveaes): Likewise.
(svesha3): Likewise.
(svebitperm): Likewise.
From-SVN: r275331
| -rw-r--r-- | gcc/ChangeLog | 11 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64-option-extensions.def | 14 |
2 files changed, 18 insertions, 7 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 1d20ffc..5c4eaf2 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,14 @@ +2019-09-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com> + + * config/aarch64/aarch64-option-extensions.def (sb): Add feature + string. + (ssbs): Likewise. + (sve2): Likewise. + (sve2-sm4): Likewise. + (sveaes): Likewise. + (svesha3): Likewise. + (svebitperm): Likewise. + 2019-09-03 Jakub Jelinek <jakub@redhat.com> Richard Biener <rguenther@suse.de> diff --git a/gcc/config/aarch64/aarch64-option-extensions.def b/gcc/config/aarch64/aarch64-option-extensions.def index 9919edd..de91550 100644 --- a/gcc/config/aarch64/aarch64-option-extensions.def +++ b/gcc/config/aarch64/aarch64-option-extensions.def @@ -155,10 +155,10 @@ AARCH64_OPT_EXTENSION("rng", AARCH64_FL_RNG, 0, 0, false, "") AARCH64_OPT_EXTENSION("memtag", AARCH64_FL_MEMTAG, 0, 0, false, "") /* Enabling/Disabling "sb" only changes "sb". */ -AARCH64_OPT_EXTENSION("sb", AARCH64_FL_SB, 0, 0, false, "") +AARCH64_OPT_EXTENSION("sb", AARCH64_FL_SB, 0, 0, false, "sb") /* Enabling/Disabling "ssbs" only changes "ssbs". */ -AARCH64_OPT_EXTENSION("ssbs", AARCH64_FL_SSBS, 0, 0, false, "") +AARCH64_OPT_EXTENSION("ssbs", AARCH64_FL_SSBS, 0, 0, false, "ssbs") /* Enabling/Disabling "predres" only changes "predres". */ AARCH64_OPT_EXTENSION("predres", AARCH64_FL_PREDRES, 0, 0, false, "") @@ -169,31 +169,31 @@ AARCH64_OPT_EXTENSION("predres", AARCH64_FL_PREDRES, 0, 0, false, "") AARCH64_OPT_EXTENSION("sve2", AARCH64_FL_SVE2, AARCH64_FL_SVE | \ AARCH64_FL_FP | AARCH64_FL_SIMD | AARCH64_FL_F16, \ AARCH64_FL_SVE2_AES | AARCH64_FL_SVE2_SHA3 | \ - AARCH64_FL_SVE2_SM4 | AARCH64_FL_SVE2_BITPERM, false, "") + AARCH64_FL_SVE2_SM4 | AARCH64_FL_SVE2_BITPERM, false, "sve2") /* Enabling "sve2-sm4" also enables "sm4", "simd", "fp16", "fp", "sve", and "sve2". Disabling "sve2-sm4" just disables "sve2-sm4". */ AARCH64_OPT_EXTENSION("sve2-sm4", AARCH64_FL_SVE2_SM4, AARCH64_FL_SM4 | \ AARCH64_FL_SIMD | AARCH64_FL_F16 | AARCH64_FL_FP | \ - AARCH64_FL_SVE | AARCH64_FL_SVE2, 0, false, "") + AARCH64_FL_SVE | AARCH64_FL_SVE2, 0, false, "svesm4") /* Enabling "sve2-aes" also enables "aes", "simd", "fp16", "fp", "sve", and "sve2". Disabling "sve2-aes" just disables "sve2-aes". */ AARCH64_OPT_EXTENSION("sve2-aes", AARCH64_FL_SVE2_AES, AARCH64_FL_AES | \ AARCH64_FL_SIMD | AARCH64_FL_F16 | AARCH64_FL_FP | \ - AARCH64_FL_SVE | AARCH64_FL_SVE2, 0, false, "") + AARCH64_FL_SVE | AARCH64_FL_SVE2, 0, false, "sveaes") /* Enabling "sve2-sha3" also enables "sha3", "simd", "fp16", "fp", "sve", and "sve2". Disabling "sve2-sha3" just disables "sve2-sha3". */ AARCH64_OPT_EXTENSION("sve2-sha3", AARCH64_FL_SVE2_SHA3, AARCH64_FL_SHA3 | \ AARCH64_FL_SIMD | AARCH64_FL_F16 | AARCH64_FL_FP | \ - AARCH64_FL_SVE | AARCH64_FL_SVE2, 0, false, "") + AARCH64_FL_SVE | AARCH64_FL_SVE2, 0, false, "svesha3") /* Enabling "sve2-bitperm" also enables "simd", "fp16", "fp", "sve", and "sve2". Disabling "sve2-bitperm" just disables "sve2-bitperm". */ AARCH64_OPT_EXTENSION("sve2-bitperm", AARCH64_FL_SVE2_BITPERM, AARCH64_FL_SIMD | \ AARCH64_FL_F16 | AARCH64_FL_FP | AARCH64_FL_SVE | \ - AARCH64_FL_SVE2, 0, false, "") + AARCH64_FL_SVE2, 0, false, "svebitperm") /* Enabling or disabling "tme" only changes "tme". */ AARCH64_OPT_EXTENSION("tme", AARCH64_FL_TME, 0, 0, false, "") |