aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorEric Botcazou <ebotcazou@adacore.com>2018-01-31 10:24:19 +0000
committerEric Botcazou <ebotcazou@gcc.gnu.org>2018-01-31 10:24:19 +0000
commit73df9303b7a4cbe5bef8420a8584e9e1c3d3548f (patch)
treed5e6f39e418fa68428097f4b8c781c10048b06ca
parent39058d4b4c7bd7570a494fd8e907f1791b1d51b7 (diff)
downloadgcc-73df9303b7a4cbe5bef8420a8584e9e1c3d3548f.zip
gcc-73df9303b7a4cbe5bef8420a8584e9e1c3d3548f.tar.gz
gcc-73df9303b7a4cbe5bef8420a8584e9e1c3d3548f.tar.bz2
Revert
2018-01-12 Eric Botcazou <ebotcazou@adacore.com> * config/sparc/sparc.md (vxworks_load_got): Set the GOT register. From-SVN: r257227
-rw-r--r--gcc/ChangeLog7
-rw-r--r--gcc/config/sparc/sparc.md4
2 files changed, 9 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 5c19779..84efedd 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,12 @@
2018-01-31 Eric Botcazou <ebotcazou@adacore.com>
+ Revert
+ 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
+
+ * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
+
+2018-01-31 Eric Botcazou <ebotcazou@adacore.com>
+
PR rtl-optimization/84071
* combine.c (record_dead_and_set_regs_1): Record the source unmodified
for a paradoxical SUBREG on a WORD_REGISTER_OPERATIONS target.
diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md
index 3255e5c..7988dec 100644
--- a/gcc/config/sparc/sparc.md
+++ b/gcc/config/sparc/sparc.md
@@ -1797,7 +1797,7 @@
"flag_pic"
"or\t%1, %%lo(%a3-(%a2-.)), %0")
-;; Set up the GOT register for VxWorks.
+;; Set up the PIC register for VxWorks.
(define_expand "vxworks_load_got"
[(set (match_dup 0)
@@ -1808,7 +1808,7 @@
(mem:SI (lo_sum:SI (match_dup 0) (match_dup 2))))]
"TARGET_VXWORKS_RTP"
{
- operands[0] = global_offset_table_rtx;
+ operands[0] = pic_offset_table_rtx;
operands[1] = gen_rtx_SYMBOL_REF (SImode, VXWORKS_GOTT_BASE);
operands[2] = gen_rtx_SYMBOL_REF (SImode, VXWORKS_GOTT_INDEX);
})