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| author | H.J. Lu <hjl.tools@gmail.com> | 2020-07-13 09:07:00 -0700 |
|---|---|---|
| committer | H.J. Lu <hjl.tools@gmail.com> | 2020-07-17 05:29:30 -0700 |
| commit | 737355072af4cd0c24a4a8967e1485c1f3a80bfe (patch) | |
| tree | a3602011a50e094907d0681f8708ac4468a5791d | |
| parent | 8bc83ee378e1cac65d75752b5137ec35d9e1aca1 (diff) | |
| download | gcc-737355072af4cd0c24a4a8967e1485c1f3a80bfe.zip gcc-737355072af4cd0c24a4a8967e1485c1f3a80bfe.tar.gz gcc-737355072af4cd0c24a4a8967e1485c1f3a80bfe.tar.bz2 | |
x86: Rename VF_AVX512VL_VF1_128_256 to VF1_AVX512ER_128_256
Since ix86_emit_swsqrtsf shouldn't be called with DF vector modes, rename
VF_AVX512VL_VF1_128_256 to VF1_AVX512ER_128_256 and drop DF vector modes.
gcc/
PR target/96186
PR target/88713
* config/i386/sse.md (VF_AVX512VL_VF1_128_256): Renamed to ...
(VF1_AVX512ER_128_256): This. Drop DF vector modes.
(rsqrt<mode>2): Replace VF_AVX512VL_VF1_128_256 with
VF1_AVX512ER_128_256.
gcc/testsuite/
PR target/96186
PR target/88713
* gcc.target/i386/pr88713-3.c: New test.
| -rw-r--r-- | gcc/config/i386/sse.md | 14 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/i386/pr88713-3.c | 17 |
2 files changed, 23 insertions, 8 deletions
diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index d3ad583..b6348de 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -326,11 +326,9 @@ [V16SF (V8SF "TARGET_AVX512VL") (V4SF "TARGET_AVX512VL") V8DF (V4DF "TARGET_AVX512VL") (V2DF "TARGET_AVX512VL")]) -;; AVX512VL SF/DF plus 128- and 256-bit SF vector modes -(define_mode_iterator VF_AVX512VL_VF1_128_256 - [(V16SF "TARGET_AVX512F") (V8SF "TARGET_AVX") V4SF - (V8DF "TARGET_AVX512F") (V4DF "TARGET_AVX512VL") - (V2DF "TARGET_AVX512VL")]) +;; AVX512ER SF plus 128- and 256-bit SF vector modes +(define_mode_iterator VF1_AVX512ER_128_256 + [(V16SF "TARGET_AVX512ER") (V8SF "TARGET_AVX") V4SF]) (define_mode_iterator VF2_AVX512VL [V8DF (V4DF "TARGET_AVX512VL") (V2DF "TARGET_AVX512VL")]) @@ -2076,9 +2074,9 @@ (set_attr "mode" "<ssescalarmode>")]) (define_expand "rsqrt<mode>2" - [(set (match_operand:VF_AVX512VL_VF1_128_256 0 "register_operand") - (unspec:VF_AVX512VL_VF1_128_256 - [(match_operand:VF_AVX512VL_VF1_128_256 1 "vector_operand")] + [(set (match_operand:VF1_AVX512ER_128_256 0 "register_operand") + (unspec:VF1_AVX512ER_128_256 + [(match_operand:VF1_AVX512ER_128_256 1 "vector_operand")] UNSPEC_RSQRT))] "TARGET_SSE && TARGET_SSE_MATH" { diff --git a/gcc/testsuite/gcc.target/i386/pr88713-3.c b/gcc/testsuite/gcc.target/i386/pr88713-3.c new file mode 100644 index 0000000..85b6cf8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr88713-3.c @@ -0,0 +1,17 @@ +/* { dg-do compile } */ +/* { dg-options "-Ofast -mno-avx512er -march=skylake-avx512" } */ + +#include <math.h> + +double square(double d[3], double rad) +{ + double res[3]; + + for (int i = 0; i < 3; i++) + { + res[i] = d[i] * d[i]; + res[i] *= rad/sqrt(res[i]); + } + + return res[0]; +} |