diff options
author | Ilya Enkovich <enkovich.gnu@gmail.com> | 2016-03-22 19:00:14 +0000 |
---|---|---|
committer | Jeff Law <law@gcc.gnu.org> | 2016-03-22 13:00:14 -0600 |
commit | 72c9526d3dc0742ee9a5f5cc4f90bf3375fb0bba (patch) | |
tree | 9b91738600d49a50c9ab537dfc5b418c67172fdd | |
parent | a3ca1bc5bd6bdded34df1040fdb595c4de032071 (diff) | |
download | gcc-72c9526d3dc0742ee9a5f5cc4f90bf3375fb0bba.zip gcc-72c9526d3dc0742ee9a5f5cc4f90bf3375fb0bba.tar.gz gcc-72c9526d3dc0742ee9a5f5cc4f90bf3375fb0bba.tar.bz2 |
re PR target/70302 (crash on valid code at -O2 and -O3 in 32-bit mode on x86_64-linux-gnu (in convert_op, at config/i386/i386.c:3414))
2016-03-22 Ilya Enkovich <enkovich.gnu@gmail.com>
PR target/70302
* config/i386/i386.c (scalar_chain::convert_op): Support
uninitialized register usage case.
PR target/70302
* gcc.target/i386/pr70302.c: New test.
From-SVN: r234406
-rw-r--r-- | gcc/ChangeLog | 6 | ||||
-rw-r--r-- | gcc/config/i386/i386.c | 14 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/i386/pr70302.c | 22 |
4 files changed, 47 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 92391ef..6848496 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2016-03-22 Ilya Enkovich <enkovich.gnu@gmail.com> + + PR target/70302 + * config/i386/i386.c (scalar_chain::convert_op): Support + uninitialized register usage case. + 2016-03-22 Richard Biener <rguenther@suse.de> PR middle-end/70251 diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index f325831..1639704 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -3409,6 +3409,20 @@ scalar_chain::convert_op (rtx *op, rtx_insn *insn) fprintf (dump_file, " Preloading operand for insn %d into r%d\n", INSN_UID (insn), REGNO (tmp)); } + else if (REG_P (*op)) + { + /* We may have not converted register usage in case + this register has no definition. Otherwise it + should be converted in convert_reg. */ + df_ref ref; + FOR_EACH_INSN_USE (ref, insn) + if (DF_REF_REGNO (ref) == REGNO (*op)) + { + gcc_assert (!DF_REF_CHAIN (ref)); + break; + } + *op = gen_rtx_SUBREG (V2DImode, *op, 0); + } else { gcc_assert (SUBREG_P (*op)); diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 00c8262..43217b8 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2016-03-22 Ilya Enkovich <enkovich.gnu@gmail.com> + + PR target/70302 + * gcc.target/i386/pr70302.c: New test. + 2016-03-22 Richard Biener <rguenther@suse.de> PR middle-end/70251 diff --git a/gcc/testsuite/gcc.target/i386/pr70302.c b/gcc/testsuite/gcc.target/i386/pr70302.c new file mode 100644 index 0000000..9b82a0c --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr70302.c @@ -0,0 +1,22 @@ +/* { dg-do compile { target { ia32 } } } */ +/* { dg-options "-O2 -msse2" } */ + +long a, c, e; +int b, d; +unsigned long long f; + +extern void fn2 (const char *, int, int, int); + +void +fn1(long long p1) +{ + unsigned long long g; + int i; + for (; i;) + if (e) + g = c; + if (a) + f = p1; + if (!f && !g) + fn2("", b, d, d); +} |