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author | Martin Aberg <maberg@gaisler.com> | 2017-11-29 15:41:45 +0000 |
---|---|---|
committer | Daniel Hellstrom <danielh@gcc.gnu.org> | 2017-11-29 16:41:45 +0100 |
commit | 6f9bc5a70fb1066611e42efea9547fa36f398065 (patch) | |
tree | bb3802df86c7f46f3da644f73d16e6a8ee882952 | |
parent | 97c30075e88f65351d4140a53a0f9acec76a075a (diff) | |
download | gcc-6f9bc5a70fb1066611e42efea9547fa36f398065.zip gcc-6f9bc5a70fb1066611e42efea9547fa36f398065.tar.gz gcc-6f9bc5a70fb1066611e42efea9547fa36f398065.tar.bz2 |
[SPARC] Prevent -mfix-ut699 from generating b2bst errata sequences
The sequence
st
fdivd / fsqrtd
std
was generated in some cases with -mfix-ut699 when there was
a st before the div/sqrt. This sequence could trigger the b2bst errata.
Now the following safe sequence is generated instead:
st
nop
fdivd / fsqrtd
std
2017-11-29 Martin Aberg <maberg@gaisler.com>
gcc/
* config/sparc/sparc.md (divdf3_fix): Add NOP and adjust length
to prevent b2bst errata sequence.
(sqrtdf2_fix): Likewise.
From-SVN: r255238
-rw-r--r-- | gcc/ChangeLog | 6 | ||||
-rw-r--r-- | gcc/config/sparc/sparc.md | 8 |
2 files changed, 10 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 7c12d02..a00174a 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2017-11-29 Martin Aberg <maberg@gaisler.com> + + * config/sparc/sparc.md (divdf3_fix): Add NOP and adjust length + to prevent b2bst errata sequence. + (sqrtdf2_fix): Likewise. + 2017-11-29 Daniel Cederman <cederman@gaisler.com> * config/sparc/sparc.c (fpop_reg_depend_p): New function. diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md index d1af680..4753c9b 100644 --- a/gcc/config/sparc/sparc.md +++ b/gcc/config/sparc/sparc.md @@ -6212,10 +6212,10 @@ visl") (div:DF (match_operand:DF 1 "register_operand" "e") (match_operand:DF 2 "register_operand" "e")))] "TARGET_FPU && sparc_fix_ut699" - "fdivd\t%1, %2, %0\n\tstd\t%0, [%%sp-8]\n\tnop" + "fdivd\t%1, %2, %0\n\tnop\n\tstd\t%0, [%%sp-8]\n\tnop" [(set_attr "type" "fpdivd") (set_attr "fptype" "double") - (set_attr "length" "3")]) + (set_attr "length" "4")]) (define_insn "divsf3" [(set (match_operand:SF 0 "register_operand" "=f") @@ -6464,10 +6464,10 @@ visl") [(set (match_operand:DF 0 "register_operand" "=e") (sqrt:DF (match_operand:DF 1 "register_operand" "e")))] "TARGET_FPU && sparc_fix_ut699" - "fsqrtd\t%1, %0\n\tstd\t%0, [%%sp-8]\n\tnop" + "fsqrtd\t%1, %0\n\tnop\n\tstd\t%0, [%%sp-8]\n\tnop" [(set_attr "type" "fpsqrtd") (set_attr "fptype" "double") - (set_attr "length" "3")]) + (set_attr "length" "4")]) (define_insn "sqrtsf2" [(set (match_operand:SF 0 "register_operand" "=f") |