diff options
author | Andreas Schwab <schwab@linux-m68k.org> | 2011-12-19 10:14:13 +0000 |
---|---|---|
committer | Andreas Schwab <schwab@gcc.gnu.org> | 2011-12-19 10:14:13 +0000 |
commit | 6a2b269b06fc3fb0f1bdba0fb88bfe358b4f51c0 (patch) | |
tree | 4c8e7c6d2e00c462c4996f1a0f922960b862c042 | |
parent | 7063212f9a3b6db6ae912451963cc184ceff94ea (diff) | |
download | gcc-6a2b269b06fc3fb0f1bdba0fb88bfe358b4f51c0.zip gcc-6a2b269b06fc3fb0f1bdba0fb88bfe358b4f51c0.tar.gz gcc-6a2b269b06fc3fb0f1bdba0fb88bfe358b4f51c0.tar.bz2 |
re PR target/51532 (Invalid Code Generated for cpu32.)
PR target/51532
* config/m68k/m68k.h (FL_CAS, TARGET_CAS): Define.
* config/m68k/m68k.c (FL_FOR_isa_20): Add FL_CAS.
* config/m68k/sync.md: Use TARGET_CAS instead of (TARGET_68020 ||
TARGET_68040).
From-SVN: r182475
-rw-r--r-- | gcc/ChangeLog | 8 | ||||
-rw-r--r-- | gcc/config/m68k/m68k.c | 2 | ||||
-rw-r--r-- | gcc/config/m68k/m68k.h | 2 | ||||
-rw-r--r-- | gcc/config/m68k/sync.md | 8 |
4 files changed, 15 insertions, 5 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 1377d99..4c70d21 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2011-12-19 Andreas Schwab <schwab@linux-m68k.org> + + PR target/51532 + * config/m68k/m68k.h (FL_CAS, TARGET_CAS): Define. + * config/m68k/m68k.c (FL_FOR_isa_20): Add FL_CAS. + * config/m68k/sync.md: Use TARGET_CAS instead of (TARGET_68020 || + TARGET_68040). + 2011-12-18 Anatoly Sokolov <aesok@post.ru> * config/ia64/ia64.h (REG_OK_FOR_BASE_P, REG_OK_FOR_INDEX_P, diff --git a/gcc/config/m68k/m68k.c b/gcc/config/m68k/m68k.c index 61267a8..e0edd5b 100644 --- a/gcc/config/m68k/m68k.c +++ b/gcc/config/m68k/m68k.c @@ -325,7 +325,7 @@ struct gcc_target targetm = TARGET_INITIALIZER; generated 68881 code for 68020 and 68030 targets unless explicitly told not to. */ #define FL_FOR_isa_20 (FL_FOR_isa_10 | FL_ISA_68020 \ - | FL_BITFIELD | FL_68881) + | FL_BITFIELD | FL_68881 | FL_CAS) #define FL_FOR_isa_40 (FL_FOR_isa_20 | FL_ISA_68040) #define FL_FOR_isa_cpu32 (FL_FOR_isa_10 | FL_ISA_68020) diff --git a/gcc/config/m68k/m68k.h b/gcc/config/m68k/m68k.h index c8bd3ee..dbb9756 100644 --- a/gcc/config/m68k/m68k.h +++ b/gcc/config/m68k/m68k.h @@ -226,6 +226,7 @@ along with GCC; see the file COPYING3. If not see #define FL_ISA_B (1 << 15) #define FL_ISA_C (1 << 16) #define FL_FIDOA (1 << 17) +#define FL_CAS (1 << 18) /* Support cas insn. */ #define FL_MMU 0 /* Used by multilib machinery. */ #define FL_UCLINUX 0 /* Used by multilib machinery. */ @@ -236,6 +237,7 @@ along with GCC; see the file COPYING3. If not see #define TARGET_COLDFIRE_FPU (m68k_fpu == FPUTYPE_COLDFIRE) #define TARGET_68881 (m68k_fpu == FPUTYPE_68881) #define TARGET_FIDOA ((m68k_cpu_flags & FL_FIDOA) != 0) +#define TARGET_CAS ((m68k_cpu_flags & FL_CAS) != 0) /* Size (in bytes) of FPU registers. */ #define TARGET_FP_REG_SIZE (TARGET_COLDFIRE ? 8 : 12) diff --git a/gcc/config/m68k/sync.md b/gcc/config/m68k/sync.md index 9a5bcda4..13e29ec 100644 --- a/gcc/config/m68k/sync.md +++ b/gcc/config/m68k/sync.md @@ -28,7 +28,7 @@ (match_operand:SI 5 "const_int_operand" "") ;; is_weak (match_operand:SI 6 "const_int_operand" "") ;; success model (match_operand:SI 7 "const_int_operand" "")] ;; failure model - "TARGET_68020 || TARGET_68040" + "TARGET_CAS" { emit_insn (gen_atomic_compare_and_swap<mode>_1 (operands[0], operands[1], operands[2], @@ -52,7 +52,7 @@ (unspec_volatile:QI [(match_dup 2) (match_dup 3) (match_dup 4)] UNSPECV_CAS_2))] - "TARGET_68020 || TARGET_68040" + "TARGET_CAS" ;; Elide the seq if operands[0] is dead. "cas<sz> %1,%4,%2\;seq %0") @@ -60,7 +60,7 @@ [(match_operand:QI 0 "register_operand" "") (match_operand:QI 1 "memory_operand" "") (match_operand:QI 2 "general_operand" "")] - "!(TARGET_68020 || TARGET_68040)" + "!TARGET_CAS" { if (operands[2] != const1_rtx) FAIL; @@ -76,5 +76,5 @@ UNSPECV_TAS_1)) (set (match_dup 1) (unspec_volatile:QI [(match_dup 1)] UNSPECV_TAS_2))] - "!(TARGET_68020 || TARGET_68040)" + "!TARGET_CAS" "tas %1\;sne %0") |