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author | Michael Meissner <meissner@linux.vnet.ibm.com> | 2014-02-11 21:05:35 +0000 |
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committer | Michael Meissner <meissner@gcc.gnu.org> | 2014-02-11 21:05:35 +0000 |
commit | 69b7afeda5b28b2e3016961b8bf9f96cc2ca265c (patch) | |
tree | 65b0125e1694ebc40016831bc46d402f63bd5dcd | |
parent | 879287d96b5a37c7cc167ad792ac795075a457fd (diff) | |
download | gcc-69b7afeda5b28b2e3016961b8bf9f96cc2ca265c.zip gcc-69b7afeda5b28b2e3016961b8bf9f96cc2ca265c.tar.gz gcc-69b7afeda5b28b2e3016961b8bf9f96cc2ca265c.tar.bz2 |
re PR target/60137 (Code fails with -mcpu=power8 -O3 -mno-vsx)
[gcc]
2014-02-11 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/60137
* config/rs6000/rs6000.md (128-bit GPR splitter): Add a splitter
for VSX/Altivec vectors that land in GPR registers.
[gcc/testsuite]
2014-02-11 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/60137
* gcc.target/powerpc/pr60137.c: New file.
From-SVN: r207699
-rw-r--r-- | gcc/ChangeLog | 6 | ||||
-rw-r--r-- | gcc/config/rs6000/rs6000.md | 9 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/testsuite/gcc.target/powerpc/pr60137.c | 17 |
4 files changed, 37 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 2d5a09c..ffcf857 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2014-02-11 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/60137 + * config/rs6000/rs6000.md (128-bit GPR splitter): Add a splitter + for VSX/Altivec vectors that land in GPR registers. + 2014-02-11 Richard Henderson <rth@redhat.com> Jakub Jelinek <jakub@redhat.com> diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 726b3b0..afb843a 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -9963,6 +9963,15 @@ [(set_attr "length" "12") (set_attr "type" "three")]) +(define_split + [(set (match_operand:FMOVE128_GPR 0 "nonimmediate_operand" "") + (match_operand:FMOVE128_GPR 1 "input_operand" ""))] + "reload_completed + && (int_reg_operand (operands[0], <MODE>mode) + || int_reg_operand (operands[1], <MODE>mode))" + [(pc)] +{ rs6000_split_multireg_move (operands[0], operands[1]); DONE; }) + ;; Move SFmode to a VSX from a GPR register. Because scalar floating point ;; type is stored internally as double precision in the VSX registers, we have ;; to convert it from the vector format. diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index b9a4cd1..34c1f04 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2014-02-11 Michael Meissner <meissner@linux.vnet.ibm.com> + + PR target/60137 + * gcc.target/powerpc/pr60137.c: New file. + 2014-02-11 Jakub Jelinek <jakub@redhat.com> PR fortran/52370 diff --git a/gcc/testsuite/gcc.target/powerpc/pr60137.c b/gcc/testsuite/gcc.target/powerpc/pr60137.c new file mode 100644 index 0000000..4777a53 --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr60137.c @@ -0,0 +1,17 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-options "-mcpu=power8 -O3 -mno-vsx" } */ + +/* target/60137, compiler got a 'could not split insn error'. */ + +extern int target_flags; +extern char fixed_regs[53]; +extern char call_used_regs[53]; + +void init_reg_sets_1(void) +{ + int i; + for (i = 0; i < 53; i++) + fixed_regs[i] = call_used_regs[i] = (call_used_regs[i] &((target_flags & 0x02000000) ? 2 : 1)) != 0; +} |