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author | Tom Wood <wood@gnu.org> | 1992-10-13 17:08:49 +0000 |
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committer | Tom Wood <wood@gnu.org> | 1992-10-13 17:08:49 +0000 |
commit | 68403115dd3819c02a4e75fc085192b95f69dce0 (patch) | |
tree | d73b7996921626f446f1c7b26dce414dea6a891e | |
parent | 696223d7cdd7498f04a7046f4b8276952726e36a (diff) | |
download | gcc-68403115dd3819c02a4e75fc085192b95f69dce0.zip gcc-68403115dd3819c02a4e75fc085192b95f69dce0.tar.gz gcc-68403115dd3819c02a4e75fc085192b95f69dce0.tar.bz2 |
(ext shift patterns): No longer needed.
From-SVN: r2427
-rw-r--r-- | gcc/config/m88k/m88k.md | 33 |
1 files changed, 1 insertions, 32 deletions
diff --git a/gcc/config/m88k/m88k.md b/gcc/config/m88k/m88k.md index d559474..2e26800 100644 --- a/gcc/config/m88k/m88k.md +++ b/gcc/config/m88k/m88k.md @@ -28,7 +28,7 @@ (define_expand "m88k_sccs_id" [(match_operand:SI 0 "" "")] "" - "{ static char sccs_id[] = \"@(#)m88k.md 2.2.13.2 10/09/92 13:24:17\"; + "{ static char sccs_id[] = \"@(#)m88k.md 2.2.13.3 10/13/92 13:03:43\"; FAIL; }") ;; Attribute specifications @@ -329,37 +329,6 @@ ;; produce the necessary insns to support TARGET_*_LARGE_SHIFT, so nothing ;; special needs to be done here. -;; (a << int1) >> int2 optimizations into a single extract. -;; These patterns need to occur before the normal shift patterns - -(define_insn "" - [(set (match_operand:SI 0 "register_operand" "=r") - (ashiftrt:SI (ashift:SI (match_operand:SI 1 "register_operand" "r") - (match_operand:SI 2 "int5_operand" "")) - (match_operand:SI 3 "int5_operand" "")))] - "INTVAL (operands [2]) <= INTVAL (operands [3])" - "* -{ - operands[4] = gen_rtx (CONST_INT, SImode, - INTVAL (operands[3]) - INTVAL (operands[2])); - return \"ext %0,%1,%w3<%4>\"; /* <(%3-%2)> */ -}" - [(set_attr "type" "bit")]) - -(define_insn "" - [(set (match_operand:SI 0 "register_operand" "=r") - (lshiftrt:SI (ashift:SI (match_operand:SI 1 "register_operand" "r") - (match_operand:SI 2 "int5_operand" "")) - (match_operand:SI 3 "int5_operand" "")))] - "INTVAL (operands [2]) <= INTVAL (operands [3])" - "* -{ - operands[4] = gen_rtx (CONST_INT, SImode, - INTVAL (operands[3]) - INTVAL (operands[2])); - return \"extu %0,%1,%w3<%4>\"; /* <(%3-%2)> */ -}" - [(set_attr "type" "bit")]) - ;; Optimize possible cases of the set instruction. (define_insn "" |