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| author | Jakub Jelinek <jj@sunsite.ms.mff.cuni.cz> | 1998-09-09 04:19:08 +0200 |
|---|---|---|
| committer | David S. Miller <davem@gcc.gnu.org> | 1998-09-08 19:19:08 -0700 |
| commit | 67cb8900b033503cf7c7b00f636506e7a51c2e2c (patch) | |
| tree | 00ee39dbe76de1b6820e19d2b285777a840f9501 | |
| parent | b54ccf71d5b67087aa1848fa8f580446dba28104 (diff) | |
| download | gcc-67cb8900b033503cf7c7b00f636506e7a51c2e2c.zip gcc-67cb8900b033503cf7c7b00f636506e7a51c2e2c.tar.gz gcc-67cb8900b033503cf7c7b00f636506e7a51c2e2c.tar.bz2 | |
sparc.h (TARGET_CM_MEDMID): Fix documentation.
* config/sparc/sparc.h (TARGET_CM_MEDMID): Fix documentation.
(CASE_VECTOR_MODE): Set to SImode even if PTR64, when MEDLOW and
not doing pic.
(ASM_OUTPUT_ADDR_{VEC,DIFF}_ELT): Check CASE_VECTOR_MODE not
Pmode.
* config/sparc/sparc.md (tablejump): Likewise, and sign extend op0
to Pmode if CASE_VECTOR_MODE is something else.
From-SVN: r22344
| -rw-r--r-- | gcc/ChangeLog | 10 | ||||
| -rw-r--r-- | gcc/config/sparc/sparc.h | 12 | ||||
| -rw-r--r-- | gcc/config/sparc/sparc.md | 9 |
3 files changed, 24 insertions, 7 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 43e9d64..98311b7 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,13 @@ +Wed Sep 9 01:07:30 1998 Jakub Jelinek <jj@sunsite.ms.mff.cuni.cz> + + * config/sparc/sparc.h (TARGET_CM_MEDMID): Fix documentation. + (CASE_VECTOR_MODE): Set to SImode even if PTR64, when MEDLOW and + not doing pic. + (ASM_OUTPUT_ADDR_{VEC,DIFF}_ELT): Check CASE_VECTOR_MODE not + Pmode. + * config/sparc/sparc.md (tablejump): Likewise, and sign extend op0 + to Pmode if CASE_VECTOR_MODE is something else. + Wed Sep 9 00:10:31 1998 Jeffrey A Law (law@cygnus.com) * prefix.c (update_path): Correctly handle cases where PATH is diff --git a/gcc/config/sparc/sparc.h b/gcc/config/sparc/sparc.h index 14ab604..3891fd6 100644 --- a/gcc/config/sparc/sparc.h +++ b/gcc/config/sparc/sparc.h @@ -55,7 +55,8 @@ Boston, MA 02111-1307, USA. */ TARGET_CM_MEDMID: 64 bit address space. The executable must be in the low 16 TB of memory. This corresponds to the low 44 bits, and the %[hml]44 - relocs are used. + relocs are used. The text segment has a maximum size + of 31 bits. TARGET_CM_MEDANY: 64 bit address space. The text and data segments have a maximum size of 31 @@ -2469,7 +2470,10 @@ extern struct rtx_def *legitimize_pic_address (); /* Specify the machine mode that this machine uses for the index in the tablejump instruction. */ -#define CASE_VECTOR_MODE Pmode +/* If we ever implement any of the full models (such as CM_FULLANY), + this has to be DImode in that case */ +#define CASE_VECTOR_MODE \ +(! TARGET_PTR64 ? SImode : flag_pic ? SImode : TARGET_CM_MEDLOW ? SImode : DImode) /* Define as C expression which evaluates to nonzero if the tablejump instruction expects the table to contain offsets from the address of the @@ -2967,7 +2971,7 @@ extern int ultrasparc_variable_issue (); do { \ char label[30]; \ ASM_GENERATE_INTERNAL_LABEL (label, "L", VALUE); \ - if (Pmode == SImode) \ + if (CASE_VECTOR_MODE == SImode) \ fprintf (FILE, "\t.word\t"); \ else \ fprintf (FILE, "\t.xword\t"); \ @@ -2982,7 +2986,7 @@ do { \ do { \ char label[30]; \ ASM_GENERATE_INTERNAL_LABEL (label, "L", (VALUE)); \ - if (Pmode == SImode) \ + if (CASE_VECTOR_MODE == SImode) \ fprintf (FILE, "\t.word\t"); \ else \ fprintf (FILE, "\t.xword\t"); \ diff --git a/gcc/config/sparc/sparc.md b/gcc/config/sparc/sparc.md index 2af5b39..781719c 100644 --- a/gcc/config/sparc/sparc.md +++ b/gcc/config/sparc/sparc.md @@ -7109,7 +7109,7 @@ "" " { - if (GET_MODE (operands[0]) != Pmode) + if (GET_MODE (operands[0]) != CASE_VECTOR_MODE) abort (); /* In pic mode, our address differences are against the base of the @@ -7117,9 +7117,12 @@ the two address loads. */ if (flag_pic) { - rtx tmp; + rtx tmp, tmp2; tmp = gen_rtx_LABEL_REF (Pmode, operands[1]); - tmp = gen_rtx_PLUS (Pmode, operands[0], tmp); + tmp2 = operands[0]; + if (CASE_VECTOR_MODE != Pmode) + tmp2 = gen_rtx_SIGN_EXTEND (Pmode, tmp2); + tmp = gen_rtx_PLUS (Pmode, tmp2, tmp); operands[0] = memory_address (Pmode, tmp); } }") |