aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorChung-Ju Wu <jasonwucj@gmail.com>2018-04-08 11:14:09 +0000
committerChung-Ju Wu <jasonwucj@gcc.gnu.org>2018-04-08 11:14:09 +0000
commit5f2a98c3f5a3ce1cb169abaf23fe7a031ae88043 (patch)
tree969e2f39722169d85a7a85b3c7a70d147964a1c9
parent63ab910dd75cce3d9e595879465d6ea5fdf13602 (diff)
downloadgcc-5f2a98c3f5a3ce1cb169abaf23fe7a031ae88043.zip
gcc-5f2a98c3f5a3ce1cb169abaf23fe7a031ae88043.tar.gz
gcc-5f2a98c3f5a3ce1cb169abaf23fe7a031ae88043.tar.bz2
[NDS32] Add strict_aligned_p to machine_function and implement TARGET_EXPAND_TO_RTL_HOOK.
gcc/ * config/nds32/nds32.c (nds32_init_machine_status, nds32_legitimate_index_p, nds32_legitimate_address_p): Consider strict_aligned_p field. (nds32_expand_to_rtl_hook): New function. (TARGET_EXPAND_TO_RTL_HOOK): Define. * config/nds32/nds32.h (machine_function): Add strict_aligned_p field. From-SVN: r259222
-rw-r--r--gcc/ChangeLog9
-rw-r--r--gcc/config/nds32/nds32.c44
-rw-r--r--gcc/config/nds32/nds32.h9
3 files changed, 58 insertions, 4 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 0238883..f1d773b 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2018-04-08 Chung-Ju Wu <jasonwucj@gmail.com>
+
+ * config/nds32/nds32.c (nds32_init_machine_status,
+ nds32_legitimate_index_p, nds32_legitimate_address_p): Consider
+ strict_aligned_p field.
+ (nds32_expand_to_rtl_hook): New function.
+ (TARGET_EXPAND_TO_RTL_HOOK): Define.
+ * config/nds32/nds32.h (machine_function): Add strict_aligned_p field.
+
2018-04-08 Kito Cheng <kito.cheng@gmail.com>
Chung-Ju Wu <jasonwucj@gmail.com>
diff --git a/gcc/config/nds32/nds32.c b/gcc/config/nds32/nds32.c
index 76980d3..36417cb 100644
--- a/gcc/config/nds32/nds32.c
+++ b/gcc/config/nds32/nds32.c
@@ -342,6 +342,9 @@ nds32_init_machine_status (void)
/* Initially assume this function does NOT use fp_as_gp optimization. */
machine->fp_as_gp_p = 0;
+ /* Initially this function is not under strictly aligned situation. */
+ machine->strict_aligned_p = 0;
+
return machine;
}
@@ -1414,8 +1417,12 @@ nds32_legitimate_index_p (machine_mode outer_mode,
/* Further check if the value is legal for the 'outer_mode'. */
if (satisfies_constraint_Is16 (index))
{
+ /* If it is not under strictly aligned situation,
+ we can return true without checking alignment. */
+ if (!cfun->machine->strict_aligned_p)
+ return true;
/* Make sure address is half word alignment. */
- if (NDS32_HALF_WORD_ALIGN_P (INTVAL (index)))
+ else if (NDS32_HALF_WORD_ALIGN_P (INTVAL (index)))
return true;
}
break;
@@ -1430,8 +1437,12 @@ nds32_legitimate_index_p (machine_mode outer_mode,
return false;
}
+ /* If it is not under strictly aligned situation,
+ we can return true without checking alignment. */
+ if (!cfun->machine->strict_aligned_p)
+ return true;
/* Make sure address is word alignment. */
- if (NDS32_SINGLE_WORD_ALIGN_P (INTVAL (index)))
+ else if (NDS32_SINGLE_WORD_ALIGN_P (INTVAL (index)))
return true;
}
break;
@@ -1446,11 +1457,15 @@ nds32_legitimate_index_p (machine_mode outer_mode,
return false;
}
+ /* If it is not under strictly aligned situation,
+ we can return true without checking alignment. */
+ if (!cfun->machine->strict_aligned_p)
+ return true;
/* Make sure address is word alignment.
Currently we do not have 64-bit load/store yet,
so we will use two 32-bit load/store instructions to do
memory access and they are single word alignment. */
- if (NDS32_SINGLE_WORD_ALIGN_P (INTVAL (index)))
+ else if (NDS32_SINGLE_WORD_ALIGN_P (INTVAL (index)))
return true;
}
break;
@@ -1589,6 +1604,20 @@ nds32_adjust_insn_length (rtx_insn *insn, int length)
}
}
+/* Storage Layout. */
+
+/* This function will be called just before expansion into rtl. */
+static void
+nds32_expand_to_rtl_hook (void)
+{
+ /* We need to set strictly aligned situation.
+ After that, the memory address checking in nds32_legitimate_address_p()
+ will take alignment offset into consideration so that it will not create
+ unaligned [base + offset] access during the rtl optimization. */
+ cfun->machine->strict_aligned_p = 1;
+}
+
+
/* Register Usage. */
static void
@@ -2469,11 +2498,15 @@ nds32_legitimate_address_p (machine_mode mode, rtx x, bool strict)
{
if (satisfies_constraint_Is14 (op1))
{
+ /* If it is not under strictly aligned situation,
+ we can return true without checking alignment. */
+ if (!cfun->machine->strict_aligned_p)
+ return true;
/* Make sure address is word alignment.
Currently we do not have 64-bit load/store yet,
so we will use two 32-bit load/store instructions to do
memory access and they are single word alignment. */
- if (NDS32_SINGLE_WORD_ALIGN_P (INTVAL (op1)))
+ else if (NDS32_SINGLE_WORD_ALIGN_P (INTVAL (op1)))
return true;
}
}
@@ -4827,6 +4860,9 @@ nds32_use_blocks_for_constant_p (machine_mode mode,
#define TARGET_PROMOTE_FUNCTION_MODE \
default_promote_function_mode_always_promote
+#undef TARGET_EXPAND_TO_RTL_HOOK
+#define TARGET_EXPAND_TO_RTL_HOOK nds32_expand_to_rtl_hook
+
/* Layout of Source Language Data Types. */
diff --git a/gcc/config/nds32/nds32.h b/gcc/config/nds32/nds32.h
index 03deda9..d68820c 100644
--- a/gcc/config/nds32/nds32.h
+++ b/gcc/config/nds32/nds32.h
@@ -296,6 +296,15 @@ struct GTY(()) machine_function
/* Indicate that whether this function
uses fp_as_gp optimization. */
int fp_as_gp_p;
+ /* Indicate that whether this function is under strictly aligned
+ situation for legitimate address checking. This flag informs
+ nds32_legitimate_address_p() how to treat offset alignment:
+ 1. The IVOPT phase needs to detect available range for memory access,
+ such as checking [base + 32767] ~ [base + (-32768)].
+ For this case we do not want address to be strictly aligned.
+ 2. The rtl lowering and optimization are close to target code.
+ For this case we need address to be strictly aligned. */
+ int strict_aligned_p;
};
/* A C structure that contains the arguments information. */