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authorMaciej W. Rozycki <macro@codesourcery.com>2012-07-18 18:13:09 +0000
committerCatherine Moore <clm@gcc.gnu.org>2012-07-18 14:13:09 -0400
commit5cb5a23fe2133765ebc1b31ceb84c85bfa076c61 (patch)
tree42e6bc3e3e49ff41143e588767c81298dd363ef7
parent16926032665d72b6cbf1a96fdb3fab83932bee97 (diff)
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mips.opt (mmcu): New option.
2012-07-18 Maciej W. Rozycki <macro@codesourcery.com> Chao-ying Fu <fu@mips.com> * config/mips/mips.opt (mmcu): New option. * config/mips/mips.h (TARGET_CPU_CPP_BUILTINS): Define _mips_mcu when TARGET_MCU. (ASM_SPEC): Pass mcu options to the assembler. * doc/invoke.texi (MIPS Options): Document -mmcu and -mno-mcu. Co-Authored-By: Chao-ying Fu <fu@mips.com> From-SVN: r189624
-rw-r--r--gcc/ChangeLog9
-rw-r--r--gcc/config/mips/mips.h4
-rw-r--r--gcc/config/mips/mips.opt4
-rw-r--r--gcc/doc/invoke.texi7
4 files changed, 24 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 2de6077..d4bd184 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,12 @@
+2012-07-18 Maciej W. Rozycki <macro@codesourcery.com>
+ Chao-ying Fu <fu@mips.com>
+
+ * config/mips/mips.opt (mmcu): New option.
+ * config/mips/mips.h (TARGET_CPU_CPP_BUILTINS): Define
+ _mips_mcu when TARGET_MCU.
+ (ASM_SPEC): Pass mcu options to the assembler.
+ * doc/invoke.texi (MIPS Options): Document -mmcu and -mno-mcu.
+
2012-07-18 Ralf Corsépius <ralf.corsepius@rtems.org>
* config.gcc (v850-*-rtems*): New target.
diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h
index 6ee6b6e..c227e82 100644
--- a/gcc/config/mips/mips.h
+++ b/gcc/config/mips/mips.h
@@ -386,6 +386,9 @@ struct mips_cpu_info {
if (TARGET_SMARTMIPS) \
builtin_define ("__mips_smartmips"); \
\
+ if (TARGET_MCU) \
+ builtin_define ("__mips_mcu"); \
+ \
if (TARGET_DSP) \
{ \
builtin_define ("__mips_dsp"); \
@@ -1120,6 +1123,7 @@ struct mips_cpu_info {
%{mdmx} %{mno-mdmx:-no-mdmx} \
%{mdsp} %{mno-dsp} \
%{mdspr2} %{mno-dspr2} \
+%{mmcu} %{mno-mcu} \
%{msmartmips} %{mno-smartmips} \
%{mmt} %{mno-mt} \
%{mfix-vr4120} %{mfix-vr4130} \
diff --git a/gcc/config/mips/mips.opt b/gcc/config/mips/mips.opt
index e3294a7..2e91970 100644
--- a/gcc/config/mips/mips.opt
+++ b/gcc/config/mips/mips.opt
@@ -269,6 +269,10 @@ mno-float
Target Report RejectNegative Var(TARGET_NO_FLOAT) Condition(TARGET_SUPPORTS_NO_FLOAT)
Prevent the use of all floating-point operations
+mmcu
+Target Report Var(TARGET_MCU)
+Use MCU instructions
+
mno-flush-func
Target RejectNegative
Do not use a cache-flushing function before calling stack trampolines
diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi
index d83f589..cba685d 100644
--- a/gcc/doc/invoke.texi
+++ b/gcc/doc/invoke.texi
@@ -734,6 +734,7 @@ Objective-C and Objective-C++ Dialects}.
-mshared -mno-shared -mplt -mno-plt -mxgot -mno-xgot @gol
-mgp32 -mgp64 -mfp32 -mfp64 -mhard-float -msoft-float @gol
-msingle-float -mdouble-float -mdsp -mno-dsp -mdspr2 -mno-dspr2 @gol
+-mmcu -mmno-mcu @gol
-mfpu=@var{fpu-type} @gol
-msmartmips -mno-smartmips @gol
-mpaired-single -mno-paired-single -mdmx -mno-mdmx @gol
@@ -15723,6 +15724,12 @@ The option @option{-mips3d} implies @option{-mpaired-single}.
@opindex mno-mt
Use (do not use) MT Multithreading instructions.
+@item -mmcu
+@itemx -mno-mcu
+@opindex mmcu
+@opindex mno-mcu
+Use (do not use) the MIPS MCU ASE instructions.
+
@item -mlong64
@opindex mlong64
Force @code{long} types to be 64 bits wide. See @option{-mlong32} for