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| author | Nathan Froyd <froydnj@codesourcery.com> | 2008-07-30 15:30:59 +0000 |
|---|---|---|
| committer | Nathan Froyd <froydnj@gcc.gnu.org> | 2008-07-30 15:30:59 +0000 |
| commit | 54ce9cc22770a28a7381f56c959c02e28f7b9a05 (patch) | |
| tree | 4cb41c14ec0cf6ccbf741868d7a9cb7fce5b183a | |
| parent | efd417141c38938b2e61689c8703af94b8a9e340 (diff) | |
| download | gcc-54ce9cc22770a28a7381f56c959c02e28f7b9a05.zip gcc-54ce9cc22770a28a7381f56c959c02e28f7b9a05.tar.gz gcc-54ce9cc22770a28a7381f56c959c02e28f7b9a05.tar.bz2 | |
re PR target/35866 (Vector load/store from a packed struct does not work (without -mstrict-align))
PR target/35866
* config/rs6000/rs6000.h (SLOW_UNALIGNED_ACCESS): Add clause for
vector modes.
From-SVN: r138316
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.h | 5 |
2 files changed, 11 insertions, 1 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 423ac34..4b8f2d6 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2008-07-30 Nathan Froyd <froydnj@codesourcery.com> + + PR target/35866 + + * config/rs6000/rs6000.h (SLOW_UNALIGNED_ACCESS): Add clause for + vector modes. + 2008-07-30 Rafael Avila de Espindola <espindola@google.com> * final.c (call_from_call_insn): New. diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index 8a926e4..def3b53 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -644,12 +644,15 @@ extern enum rs6000_nop_insertion rs6000_sched_insert_nops; /* Define this macro to be the value 1 if unaligned accesses have a cost many times greater than aligned accesses, for example if they are emulated in a trap handler. */ +/* Altivec vector memory instructions simply ignore the low bits; SPE + vector memory instructions trap on unaligned accesses. */ #define SLOW_UNALIGNED_ACCESS(MODE, ALIGN) \ (STRICT_ALIGNMENT \ || (((MODE) == SFmode || (MODE) == DFmode || (MODE) == TFmode \ || (MODE) == SDmode || (MODE) == DDmode || (MODE) == TDmode \ || (MODE) == DImode) \ - && (ALIGN) < 32)) + && (ALIGN) < 32) \ + || (VECTOR_MODE_P ((MODE)) && (ALIGN) < GET_MODE_BITSIZE ((MODE)))) /* Standard register usage. */ |