diff options
| author | Renlin Li <renlin.li@arm.com> | 2015-05-05 10:16:46 +0000 |
|---|---|---|
| committer | Renlin Li <renlin@gcc.gnu.org> | 2015-05-05 10:16:46 +0000 |
| commit | 53e38f0275f495b20e274cedeaf8647b8005feca (patch) | |
| tree | 2d2d560bae7b3ce85372ddce13bd7c7e76c5de73 | |
| parent | ae8ffbbb8dde0c7c184270865949af463e769826 (diff) | |
| download | gcc-53e38f0275f495b20e274cedeaf8647b8005feca.zip gcc-53e38f0275f495b20e274cedeaf8647b8005feca.tar.gz gcc-53e38f0275f495b20e274cedeaf8647b8005feca.tar.bz2 | |
[PATCH][AARCH64]Use mov for add with large immediate.
gcc/
2015-05-05 Renlin Li <renlin.li@arm.com>
* config/aarch64/aarch64.md (add<mode>3): Use mov when allowed.
From-SVN: r222800
| -rw-r--r-- | gcc/ChangeLog | 4 | ||||
| -rw-r--r-- | gcc/config/aarch64/aarch64.md | 28 |
2 files changed, 23 insertions, 9 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 83509a0..5667dd4 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,7 @@ +2015-05-05 Renlin Li <renlin.li@arm.com> + + * config/aarch64/aarch64.md (add<mode>3): Use mov when allowed. + 2015-05-05 Yvan Roux <yvan.roux@linaro.org> * config/aarch64/aarch64-elf-raw.h (CA53_ERR_843419_SPEC): Define. diff --git a/gcc/config/aarch64/aarch64.md b/gcc/config/aarch64/aarch64.md index 11c4709..1c2c5fb 100644 --- a/gcc/config/aarch64/aarch64.md +++ b/gcc/config/aarch64/aarch64.md @@ -1414,18 +1414,28 @@ " if (! aarch64_plus_operand (operands[2], VOIDmode)) { - rtx subtarget = ((optimize && can_create_pseudo_p ()) - ? gen_reg_rtx (<MODE>mode) : operands[0]); HOST_WIDE_INT imm = INTVAL (operands[2]); - if (imm < 0) - imm = -(-imm & ~0xfff); + if (aarch64_move_imm (imm, <MODE>mode) && can_create_pseudo_p ()) + { + rtx tmp = gen_reg_rtx (<MODE>mode); + emit_move_insn (tmp, operands[2]); + operands[2] = tmp; + } else - imm &= ~0xfff; - - emit_insn (gen_add<mode>3 (subtarget, operands[1], GEN_INT (imm))); - operands[1] = subtarget; - operands[2] = GEN_INT (INTVAL (operands[2]) - imm); + { + rtx subtarget = ((optimize && can_create_pseudo_p ()) + ? gen_reg_rtx (<MODE>mode) : operands[0]); + + if (imm < 0) + imm = -(-imm & ~0xfff); + else + imm &= ~0xfff; + + emit_insn (gen_add<mode>3 (subtarget, operands[1], GEN_INT (imm))); + operands[1] = subtarget; + operands[2] = GEN_INT (INTVAL (operands[2]) - imm); + } } " ) |