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| author | Thomas Preud'homme <thomas.preudhomme@arm.com> | 2016-11-22 10:44:29 +0000 |
|---|---|---|
| committer | Thomas Preud'homme <thopre01@gcc.gnu.org> | 2016-11-22 10:44:29 +0000 |
| commit | 4ac52f1614e8d199e55b915dc23e687a76327ba8 (patch) | |
| tree | f2c54a383ddd5469be1f5ce11f3d99745f6590d6 | |
| parent | e4fe8c9f6b1d28c37680939c24e6ebfb5706bb9e (diff) | |
| download | gcc-4ac52f1614e8d199e55b915dc23e687a76327ba8.zip gcc-4ac52f1614e8d199e55b915dc23e687a76327ba8.tar.gz gcc-4ac52f1614e8d199e55b915dc23e687a76327ba8.tar.bz2 | |
re PR target/77904 ([ARM Cortex-M0] Frame pointer thrashes registers if assembly statements with "sp" clobber are used)
2016-11-22 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
PR target/77904
* config/arm/arm.c (thumb1_compute_save_reg_mask): Mark frame pointer
in save register mask if it is needed.
gcc/testsuite/
PR target/77904
* gcc.target/arm/pr77904.c: New test.
From-SVN: r242693
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/arm/arm.c | 4 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/arm/pr77904.c | 45 |
4 files changed, 60 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 1bc5856..f5e1e54 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2016-11-22 Thomas Preud'homme <thomas.preudhomme@arm.com> + + PR target/77904 + * config/arm/arm.c (thumb1_compute_save_reg_mask): Mark frame pointer + in save register mask if it is needed. + 2016-11-22 Jakub Jelinek <jakub@redhat.com> PR tree-optimization/78436 diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index dc88853..abd3276 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -18275,6 +18275,10 @@ thumb1_compute_save_reg_mask (void) if (df_regs_ever_live_p (reg) && callee_saved_reg_p (reg)) mask |= 1 << reg; + /* Handle the frame pointer as a special case. */ + if (frame_pointer_needed) + mask |= 1 << HARD_FRAME_POINTER_REGNUM; + if (flag_pic && !TARGET_SINGLE_PIC_BASE && arm_pic_register != INVALID_REGNUM diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 3aec5a1..edcc79e 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2016-11-22 Thomas Preud'homme <thomas.preudhomme@arm.com> + + PR target/77904 + * gcc.target/arm/pr77904.c: New test. + 2016-11-22 Toma Tabacu <toma.tabacu@imgtec.com> * gcc.target/mips/interrupt_handler-bug-1.c (dg-options): Add diff --git a/gcc/testsuite/gcc.target/arm/pr77904.c b/gcc/testsuite/gcc.target/arm/pr77904.c new file mode 100644 index 0000000..76728c0 --- /dev/null +++ b/gcc/testsuite/gcc.target/arm/pr77904.c @@ -0,0 +1,45 @@ +/* { dg-do run } */ +/* { dg-options "-O2" } */ + +__attribute__ ((noinline, noclone)) void +clobber_sp (void) +{ + __asm volatile ("" : : : "sp"); +} + +int +main (void) +{ + int ret; + + __asm volatile ("mov\tr4, #0xf4\n\t" + "mov\tr5, #0xf5\n\t" + "mov\tr6, #0xf6\n\t" + "mov\tr7, #0xf7\n\t" + "mov\tr0, #0xf8\n\t" + "mov\tr8, r0\n\t" + "mov\tr0, #0xfa\n\t" + "mov\tr10, r0" + : : : "r0", "r4", "r5", "r6", "r7", "r8", "r10"); + clobber_sp (); + + __asm volatile ("cmp\tr4, #0xf4\n\t" + "bne\tfail\n\t" + "cmp\tr5, #0xf5\n\t" + "bne\tfail\n\t" + "cmp\tr6, #0xf6\n\t" + "bne\tfail\n\t" + "cmp\tr7, #0xf7\n\t" + "bne\tfail\n\t" + "mov\tr0, r8\n\t" + "cmp\tr0, #0xf8\n\t" + "bne\tfail\n\t" + "mov\tr0, r10\n\t" + "cmp\tr0, #0xfa\n\t" + "bne\tfail\n\t" + "mov\t%0, #1\n" + "fail:\n\t" + "sub\tr0, #1" + : "=r" (ret) : :); + return ret; +} |