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| author | Carl Love <carll@gcc.gnu.org> | 2017-06-17 03:14:53 +0000 |
|---|---|---|
| committer | Carl Love <carll@gcc.gnu.org> | 2017-06-17 03:14:53 +0000 |
| commit | 394a527f8556c4e3952b783e41d1d22b6589bec8 (patch) | |
| tree | 44673e2dfac3eb421af45706cbd6c26c4d31d768 | |
| parent | b36a612c99166cee8222ce257b62fcc0895d41b7 (diff) | |
| download | gcc-394a527f8556c4e3952b783e41d1d22b6589bec8.zip gcc-394a527f8556c4e3952b783e41d1d22b6589bec8.tar.gz gcc-394a527f8556c4e3952b783e41d1d22b6589bec8.tar.bz2 | |
altivec.md (define_mode_attr VF_sxddp): Move to vsx.md.
gcc/ChangeLog:
2017-06-16 Carl Love <cel@us.ibm.com>
* config/rs6000/altivec.md (define_mode_attr VF_sxddp): Move to vsx.md.
* config/rs6000/vsx.md (define_mode_attr VF_sxddp
define_expand "floate<mode>",
define_expand "floato<mode>"): Add VF_sxddp definition, replace
undefined VFC_inst with VF_sxddp definition
From-SVN: r249337
| -rw-r--r-- | gcc/config/rs6000/altivec.md | 3 | ||||
| -rw-r--r-- | gcc/config/rs6000/vsx.md | 9 |
2 files changed, 6 insertions, 6 deletions
diff --git a/gcc/config/rs6000/altivec.md b/gcc/config/rs6000/altivec.md index fd15286..25b2768 100644 --- a/gcc/config/rs6000/altivec.md +++ b/gcc/config/rs6000/altivec.md @@ -207,9 +207,6 @@ ;; versus floating point (define_mode_attr VS_sxwsp [(V4SI "sxw") (V4SF "sp")]) -;; Mode attribute for vector floate and floato conversions -(define_mode_attr VF_sxddp [(V2DI "sxd") (V2DF "dp")]) - ;; Specific iterator for parity which does not have a byte/half-word form, but ;; does have a quad word form (define_mode_iterator VParity [V4SI diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index 284c87b..7aa6d32 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -21,6 +21,9 @@ ;; Iterator for comparison types (define_code_iterator CMP_TEST [eq lt gt unordered]) +;; Mode attribute for vector floate and floato conversions +(define_mode_attr VF_sxddp [(V2DI "sxd") (V2DF "dp")]) + ;; Iterator for both scalar and vector floating point types supported by VSX (define_mode_iterator VSX_B [DF V4SF V2DF]) @@ -2056,7 +2059,7 @@ rtx_tmp, rtx_tmp, rtx_val)); } else - emit_insn (gen_vsx_xvcv<VFC_inst>sp (operands[0], operands[1])); + emit_insn (gen_vsx_xvcv<VF_sxddp>sp (operands[0], operands[1])); DONE; }) @@ -2095,7 +2098,7 @@ "VECTOR_UNIT_VSX_P (V4SFmode)" { if (VECTOR_ELT_ORDER_BIG) - emit_insn (gen_vsx_xvcv<VFC_inst>sp (operands[0], operands[1])); + emit_insn (gen_vsx_xvcv<VF_sxddp>sp (operands[0], operands[1])); else { /* Shift left one word to put odd word correct location */ @@ -2103,7 +2106,7 @@ rtx rtx_val = GEN_INT (4); rtx_tmp = gen_reg_rtx (V4SFmode); - emit_insn (gen_vsx_xvcv<VFC_inst>sp (rtx_tmp, operands[1])); + emit_insn (gen_vsx_xvcv<VF_sxddp>sp (rtx_tmp, operands[1])); emit_insn (gen_altivec_vsldoi_v4sf (operands[0], rtx_tmp, rtx_tmp, rtx_val)); } |