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authorH.J. Lu <hongjiu.lu@intel.com>2019-05-15 15:21:04 +0000
committerH.J. Lu <hjl@gcc.gnu.org>2019-05-15 08:21:04 -0700
commit2ed7ae1641c2e3c96f7ca4f7c940399793408921 (patch)
treee5979eee6df103f137a19b75034123c6090009d6
parent018a45bdf3e3cbed5fbdd6db19457c63fea5f7bf (diff)
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i386: Emulate MMX movntq with SSE2 movntidi
Emulate MMX movntq with SSE2 movntidi. Only register source operand is allowed. PR target/89021 * config/i386/mmx.md (sse_movntq): Add SSE2 emulation. From-SVN: r271238
-rw-r--r--gcc/ChangeLog5
-rw-r--r--gcc/config/i386/mmx.md14
2 files changed, 14 insertions, 5 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 84cf0aa..01cdde4 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,6 +1,11 @@
2019-05-15 H.J. Lu <hongjiu.lu@intel.com>
PR target/89021
+ * config/i386/mmx.md (sse_movntq): Add SSE2 emulation.
+
+2019-05-15 H.J. Lu <hongjiu.lu@intel.com>
+
+ PR target/89021
* config/i386/mmx.md (mmx_psadbw): Add SSE emulation.
2019-05-15 H.J. Lu <hongjiu.lu@intel.com>
diff --git a/gcc/config/i386/mmx.md b/gcc/config/i386/mmx.md
index 15fd355..6cc9547 100644
--- a/gcc/config/i386/mmx.md
+++ b/gcc/config/i386/mmx.md
@@ -239,12 +239,16 @@
})
(define_insn "sse_movntq"
- [(set (match_operand:DI 0 "memory_operand" "=m")
- (unspec:DI [(match_operand:DI 1 "register_operand" "y")]
+ [(set (match_operand:DI 0 "memory_operand" "=m,m")
+ (unspec:DI [(match_operand:DI 1 "register_operand" "y,r")]
UNSPEC_MOVNTQ))]
- "TARGET_SSE || TARGET_3DNOW_A"
- "movntq\t{%1, %0|%0, %1}"
- [(set_attr "type" "mmxmov")
+ "(TARGET_MMX || TARGET_MMX_WITH_SSE)
+ && (TARGET_SSE || TARGET_3DNOW_A)"
+ "@
+ movntq\t{%1, %0|%0, %1}
+ movnti\t{%1, %0|%0, %1}"
+ [(set_attr "mmx_isa" "native,x64")
+ (set_attr "type" "mmxmov,ssemov")
(set_attr "mode" "DI")])
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