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authorMichael Meissner <meissner@gcc.gnu.org>1993-04-16 20:37:41 +0000
committerMichael Meissner <meissner@gcc.gnu.org>1993-04-16 20:37:41 +0000
commit2def78883190a0a001cb34c537769ac18b196962 (patch)
tree60b7012eeda3d9e98d8cb1f6a427fd094d517fd4
parent8a18e16fa65b3e63064eeaaa0481e73942a6972a (diff)
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Allow iris to have its version of the trampoline code.
From-SVN: r4162
-rw-r--r--gcc/config/mips/iris3.h31
1 files changed, 31 insertions, 0 deletions
diff --git a/gcc/config/mips/iris3.h b/gcc/config/mips/iris3.h
index 7fe40a8b..079da38 100644
--- a/gcc/config/mips/iris3.h
+++ b/gcc/config/mips/iris3.h
@@ -96,4 +96,35 @@ the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
/* Plain char is unsigned in the SGI compiler. */
#define DEFAULT_SIGNED_CHAR 0
+
+/* A C statement to initialize the variable parts of a trampoline.
+ ADDR is an RTX for the address of the trampoline; FNADDR is an
+ RTX for the address of the nested function; STATIC_CHAIN is an
+ RTX for the static chain value that should be passed to the
+ function when it is called.
+
+ Silicon Graphics machines are supposed to not have a mprotect
+ function to enable execute protection, but the stack already
+ has execute protection turned on. Because the MIPS chips have
+ no method to flush the icache without a system call, this can lose
+ if the same address is used for multiple trampolines. */
+
+#define INITIALIZE_TRAMPOLINE(ADDR, FUNC, CHAIN) \
+{ \
+ rtx addr = ADDR; \
+ emit_move_insn (gen_rtx (MEM, SImode, plus_constant (addr, 28)), FUNC); \
+ emit_move_insn (gen_rtx (MEM, SImode, plus_constant (addr, 32)), CHAIN); \
+}
+
+
+/* Attempt to turn on access permissions for the stack. */
+
+#define TRANSFER_FROM_TRAMPOLINE \
+ \
+void \
+__enable_execute_stack (addr) \
+ char *addr; \
+{ \
+}
+
#include "mips/mips.h"