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| author | Segher Boessenkool <segher@kernel.crashing.org> | 2015-07-30 04:34:09 +0200 |
|---|---|---|
| committer | Segher Boessenkool <segher@gcc.gnu.org> | 2015-07-30 04:34:09 +0200 |
| commit | 2d590ab09c2931ab634379b63644855f2e789ded (patch) | |
| tree | ffd084e196b1be8c47f41e359e293f2739194042 | |
| parent | dfe8fbc22ca31d1df3139693d14967821d6656d4 (diff) | |
| download | gcc-2d590ab09c2931ab634379b63644855f2e789ded.zip gcc-2d590ab09c2931ab634379b63644855f2e789ded.tar.gz gcc-2d590ab09c2931ab634379b63644855f2e789ded.tar.bz2 | |
re PR target/66217 (PowerPC rotate/shift/mask instructions not optimal)
PR target/66217
PR target/67045
* config/rs6000/rs6000.md (and<mode>3): Put a CONST_INT_P check
around those cases that need one.
From-SVN: r226378
| -rw-r--r-- | gcc/ChangeLog | 7 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.md | 35 |
2 files changed, 26 insertions, 16 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f4a5061..d1a9600 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2015-07-29 Segher Boessenkool <segher@kernel.crashing.org> + + PR target/66217 + PR target/67045 + * config/rs6000/rs6000.md (and<mode>3): Put a CONST_INT_P check + around those cases that need one. + 2015-07-29 Aditya Kumar <hiraditya@msn.com> * params.def (PARAM_GRAPHITE_MAX_NB_SCOP_PARAMS): Default to 3. diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index f7fa399..527ad98 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -2898,26 +2898,29 @@ DONE; } - if (rs6000_is_valid_and_mask (operands[2], <MODE>mode)) + if (CONST_INT_P (operands[2])) { - emit_insn (gen_and<mode>3_mask (operands[0], operands[1], operands[2])); - DONE; - } + if (rs6000_is_valid_and_mask (operands[2], <MODE>mode)) + { + emit_insn (gen_and<mode>3_mask (operands[0], operands[1], operands[2])); + DONE; + } - if (logical_const_operand (operands[2], <MODE>mode) - && rs6000_gen_cell_microcode) - { - emit_insn (gen_and<mode>3_imm (operands[0], operands[1], operands[2])); - DONE; - } + if (logical_const_operand (operands[2], <MODE>mode) + && rs6000_gen_cell_microcode) + { + emit_insn (gen_and<mode>3_imm (operands[0], operands[1], operands[2])); + DONE; + } - if (rs6000_is_valid_2insn_and (operands[2], <MODE>mode)) - { - rs6000_emit_2insn_and (<MODE>mode, operands, true, 0); - DONE; - } + if (rs6000_is_valid_2insn_and (operands[2], <MODE>mode)) + { + rs6000_emit_2insn_and (<MODE>mode, operands, true, 0); + DONE; + } - operands[2] = force_reg (<MODE>mode, operands[2]); + operands[2] = force_reg (<MODE>mode, operands[2]); + } }) |