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| author | Andrea Corallo <andrea.corallo@arm.com> | 2020-09-17 17:17:52 +0100 |
|---|---|---|
| committer | Andrea Corallo <andrea.corallo@arm.com> | 2020-09-21 14:09:17 +0200 |
| commit | 2c62952f8160bdc8d4111edb34a4bc75096c1e05 (patch) | |
| tree | 5963266b8e34003d7ae23bbb2ccc2a0818686c85 | |
| parent | 0df746afc50a47d1eb53a401e017c4373cf05641 (diff) | |
| download | gcc-2c62952f8160bdc8d4111edb34a4bc75096c1e05.zip gcc-2c62952f8160bdc8d4111edb34a4bc75096c1e05.tar.gz gcc-2c62952f8160bdc8d4111edb34a4bc75096c1e05.tar.bz2 | |
aarch64: Do not alter value on a force_reg returned rtx expanding __jcvt
2020-09-17 Andrea Corallo <andrea.corallo@arm.com>
* config/aarch64/aarch64-builtins.c
(aarch64_general_expand_builtin): Use expand machinery not to
alter the value of an rtx returned by force_reg.
| -rw-r--r-- | gcc/config/aarch64/aarch64-builtins.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/gcc/config/aarch64/aarch64-builtins.c b/gcc/config/aarch64/aarch64-builtins.c index 2f4753b..1cfb5c0 100644 --- a/gcc/config/aarch64/aarch64-builtins.c +++ b/gcc/config/aarch64/aarch64-builtins.c @@ -2140,14 +2140,14 @@ aarch64_general_expand_builtin (unsigned int fcode, tree exp, rtx target, return target; case AARCH64_JSCVT: - arg0 = CALL_EXPR_ARG (exp, 0); - op0 = force_reg (DFmode, expand_normal (arg0)); - if (!target) - target = gen_reg_rtx (SImode); - else - target = force_reg (SImode, target); - emit_insn (GEN_FCN (CODE_FOR_aarch64_fjcvtzs) (target, op0)); - return target; + { + expand_operand ops[2]; + create_output_operand (&ops[0], target, SImode); + op0 = expand_normal (CALL_EXPR_ARG (exp, 0)); + create_input_operand (&ops[1], op0, DFmode); + expand_insn (CODE_FOR_aarch64_fjcvtzs, 2, ops); + return ops[0].value; + } case AARCH64_SIMD_BUILTIN_FCMLA_LANEQ0_V2SF: case AARCH64_SIMD_BUILTIN_FCMLA_LANEQ90_V2SF: |