Updated sources with changes from devo.

From-SVN: r23369

6 files changed, 166 insertions, 49 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 21a25cc..3f382a6 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -3,7 +3,12 @@ Tue Oct 27 13:15:02 1998  Nick Clifton  <nickc@cygnus.com>
 	* toplev.c (display_help): Ignore empty target specific
 	options, and if -W is also specified on the command line then
 	display undocumented options.
-	
+
+	* config/arm/arm.c: Updated with changes in devo sources.
+	* config/arm/arm.h: Updated with changes in devo sources.
+	* config/arm/lib1funcs.asm: Updated with changes in devo sources.
+	* config/arm/lib1thumb.asm: Add ELF support.
+
 Tue Oct 27 16:11:43 1998  David Edelsohn  <edelsohn@mhpcc.edu>
 	
 	* collect2.c (aix64_flag): New variable.
diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c
index a096d898..3cfdeb3 100644
--- a/gcc/config/arm/arm.c
+++ b/gcc/config/arm/arm.c
@@ -1520,7 +1520,7 @@ arm_rtx_costs (x, code, outer_code)
 	  int j;
 	  /* Tune as appropriate */ 
 	  int booth_unit_size = ((tune_flags & FL_FAST_MULT) ? 8 : 2);
-
+	  
 	  for (j = 0; i && j < 32; j += booth_unit_size)
 	    {
 	      i >>= booth_unit_size;
diff --git a/gcc/config/arm/arm.h b/gcc/config/arm/arm.h
index 6521a86..f47f653 100644
--- a/gcc/config/arm/arm.h
+++ b/gcc/config/arm/arm.h
@@ -589,7 +589,7 @@ extern int arm_arch4;
 #ifndef STRUCTURE_SIZE_BOUNDARY
 #define STRUCTURE_SIZE_BOUNDARY 32
 #endif
-     
+
 /* Used when parsing command line option -mstructure_size_boundary.  */
 extern char * structure_size_string;
 
@@ -759,7 +759,7 @@ extern char * structure_size_string;
    via the stack pointer) in functions that seem suitable.  
    If we have to have a frame pointer we might as well make use of it.
    APCS says that the frame pointer does not need to be pushed in leaf
-   functions.  */
+   functions, or simple tail call functions.  */
 #define FRAME_POINTER_REQUIRED		\
   (current_function_has_nonlocal_label || (TARGET_APCS && !leaf_function_p ()))
 
@@ -1848,7 +1848,7 @@ extern int arm_compare_fp;
 #define ASM_OUTPUT_INTERNAL_LABEL(STREAM, PREFIX, NUM)  	\
   do                                    	      	   	\
     {						      	   	\
-      char *s = (char *) alloca (40 + strlen (PREFIX));	   	\
+      char * s = (char *) alloca (40 + strlen (PREFIX));	\
       extern int arm_target_label, arm_ccfsm_state;	   	\
       extern rtx arm_target_insn;				\
 						           	\
@@ -1862,15 +1862,15 @@ extern int arm_compare_fp;
 	ASM_OUTPUT_LABEL (STREAM, s);		                \
     } while (0)
 #endif
-     
+
 /* Output a push or a pop instruction (only used when profiling).  */
 #define ASM_OUTPUT_REG_PUSH(STREAM,REGNO) \
-  fprintf(STREAM,"\tstmfd\t%ssp!,{%s%s}\n", \
-	  REGISTER_PREFIX, REGISTER_PREFIX, reg_names[REGNO])
+  fprintf (STREAM,"\tstmfd\t%ssp!,{%s%s}\n", \
+	  REGISTER_PREFIX, REGISTER_PREFIX, reg_names [REGNO])
 
 #define ASM_OUTPUT_REG_POP(STREAM,REGNO) \
-  fprintf(STREAM,"\tldmfd\t%ssp!,{%s%s}\n", \
-	  REGISTER_PREFIX, REGISTER_PREFIX, reg_names[REGNO])
+  fprintf (STREAM,"\tldmfd\t%ssp!,{%s%s}\n", \
+	  REGISTER_PREFIX, REGISTER_PREFIX, reg_names [REGNO])
 
 /* Target characters.  */
 #define TARGET_BELL	007
@@ -1913,7 +1913,7 @@ extern int arm_compare_fp;
       {									\
 	rtx base = XEXP (X, 0);						\
 	rtx index = XEXP (X, 1);					\
-	char *base_reg_name;						\
+	char * base_reg_name;						\
 	HOST_WIDE_INT offset = 0;					\
 	if (GET_CODE (base) != REG)					\
 	  {								\
diff --git a/gcc/config/arm/lib1funcs.asm b/gcc/config/arm/lib1funcs.asm
index 5baab8a..1e592a2 100644
--- a/gcc/config/arm/lib1funcs.asm
+++ b/gcc/config/arm/lib1funcs.asm
@@ -43,6 +43,10 @@ Boston, MA 02111-1307, USA.  */
 #define RETCOND
 #endif
 
+#ifndef __USER_LABEL_PREFIX__
+#error  __USER_LABEL_PREFIX__ not defined
+#endif
+
 #ifdef __elf__
 #define __PLT__ (PLT)
 #define TYPE(x) .type SYM(x),function
@@ -53,10 +57,6 @@ Boston, MA 02111-1307, USA.  */
 #define SIZE(x)
 #endif
 
-#ifndef __USER_LABEL_PREFIX__
-#define __USER_LABEL_PREFIX__ _
-#endif
-
 /* ANSI concatenation macros.  */
 
 #define CONCAT1(a, b) CONCAT2(a, b)
@@ -78,7 +78,7 @@ lr		.req	r14
 pc		.req	r15
 	
 	.text
-	.globl	SYM(__udivsi3)
+	.globl	SYM (__udivsi3)
 	TYPE 	(__udivsi3)
 	.align	0
 
@@ -156,8 +156,8 @@ lr		.req	r14
 pc		.req	r15
 	
 	.text
-	.globl SYM (__umodsi3)
-	TYPE  (__umodsi3)
+	.globl	SYM (__umodsi3)
+	TYPE	(__umodsi3)
 	.align 0
 
 SYM (__umodsi3):
@@ -246,8 +246,8 @@ lr		.req	r14
 pc		.req	r15
 	
 	.text
-	.globl SYM (__divsi3)
-	TYPE   (__divsi3)
+	.globl	SYM (__divsi3)
+	TYPE	(__divsi3)
 	.align 0
 
 SYM (__divsi3):
@@ -331,8 +331,8 @@ lr		.req	r14
 pc		.req	r15
 	
 	.text
-	.globl SYM (__modsi3)
-	TYPE   (__modsi3)
+	.globl	SYM (__modsi3)
+	TYPE	(__modsi3)
 	.align 0
 
 SYM (__modsi3):
@@ -422,8 +422,8 @@ Ldiv0:
 
 #ifdef L_dvmd_tls
 
-	.globl SYM (__div0)
-	TYPE   (__div0)
+	.globl	SYM (__div0)
+	TYPE	(__div0)
 	.align 0
 SYM (__div0):
 	RET	pc, lr
@@ -439,8 +439,8 @@ SYM (__div0):
 	
 #define SIGFPE	8			@ cant use <asm/signal.h> as it
 					@ contains too much C rubbish
-	.globl SYM (__div0)
-	TYPE   (__div0)
+	.globl	SYM (__div0)
+	TYPE	(__div0)
 	.align 0
 SYM (__div0):
 	stmfd	sp!, {r1, lr}
@@ -472,10 +472,13 @@ SYM (__div0):
 	.code 16
 .macro call_via register
 	.globl	SYM (_call_via_\register)
+	TYPE	(_call_via_\register)
 	.thumb_func
 SYM (_call_via_\register):
 	bx	\register
 	nop
+
+	SIZE	(_call_via_\register)
 .endm
 
 	call_via r0
@@ -513,6 +516,7 @@ SYM (_call_via_\register):
 	.align 0
 
 	.code   32
+	.globl _arm_return
 _arm_return:		
 	ldmia 	r13!, {r12}
 	bx 	r12
@@ -521,6 +525,7 @@ _arm_return:
 .macro interwork register					
 	.code   16
 	.globl	SYM (_interwork_call_via_\register)
+	TYPE	(_interwork_call_via_\register)
 	.thumb_func
 SYM (_interwork_call_via_\register):
 	bx 	pc
@@ -533,6 +538,8 @@ SYM (_interwork_call_via_\register):
 	stmeqdb	r13!, {lr}
 	adreq	lr, _arm_return
 	bx	\register
+
+	SIZE	(_interwork_call_via_\register)
 .endm
 	
 	interwork r0
@@ -549,6 +556,25 @@ SYM (_interwork_call_via_\register):
 	interwork fp
 	interwork ip
 	interwork sp
-	interwork lr
-		
+	
+	/* The lr case has to be handled a little differently...*/
+	.code 16
+	.globl	SYM (_interwork_call_via_lr)
+	TYPE	(_interwork_call_via_lr)
+	.thumb_func
+SYM (_interwork_call_via_lr):
+	bx 	pc
+	nop
+	
+	.code 32
+	.globl .Lchange_lr
+.Lchange_lr:
+	tst	lr, #1
+	stmeqdb	r13!, {lr}
+	mov	ip, lr
+	adreq	lr, _arm_return
+	bx	ip
+	
+	SIZE	(_interwork_call_via_lr)
+	
 #endif /* L_interwork_call_via_rX */
diff --git a/gcc/config/arm/lib1thumb.asm b/gcc/config/arm/lib1thumb.asm
index d50d35d..daf8361 100644
--- a/gcc/config/arm/lib1thumb.asm
+++ b/gcc/config/arm/lib1thumb.asm
@@ -1,7 +1,7 @@
 @ libgcc1 routines for ARM cpu.
 @ Division routines, written by Richard Earnshaw, (rearnsha@armltd.co.uk)
 
-/* Copyright (C) 1995, 1996 Free Software Foundation, Inc.
+/* Copyright (C) 1995, 1996, 1998 Free Software Foundation, Inc.
 
 This file is free software; you can redistribute it and/or modify it
 under the terms of the GNU General Public License as published by the
@@ -36,7 +36,17 @@ Boston, MA 02111-1307, USA.  */
 	.code	 16
 	
 #ifndef __USER_LABEL_PREFIX__
-#error USER_LABEL_PREFIX not defined
+#error  __USER_LABEL_PREFIX__ not defined
+#endif
+
+#ifdef __elf__
+#define __PLT__ (PLT)
+#define TYPE(x) .type SYM(x),function
+#define SIZE(x) .size SYM(x), . - SYM(x)
+#else
+#define __PLT__
+#define TYPE(x)
+#define SIZE(x)
 #endif
 
 #define RET	mov	pc, lr
@@ -64,8 +74,9 @@ lr		.req	r14
 pc		.req	r15
 	
 	.text
-	.globl SYM (__udivsi3)
-	.align 0
+	.globl	SYM (__udivsi3)
+	TYPE 	(__udivsi3)
+	.align	0
 	.thumb_func
 SYM (__udivsi3):
 	cmp	divisor, #0
@@ -151,10 +162,12 @@ Lgot_result:
 
 Ldiv0:
 	push	{ lr }
-	bl	SYM (__div0)
+	bl	SYM (__div0) __PLT__
 	mov	r0, #0			@ about as wrong as it could be
 	pop	{ pc }
 
+	SIZE	(__udivsi3)
+	
 #endif /* L_udivsi3 */
 
 #ifdef L_umodsi3
@@ -167,9 +180,11 @@ ip		.req	r12
 sp		.req	r13
 lr		.req	r14
 pc		.req	r15
+	
 	.text
-	.globl SYM (__umodsi3)
-	.align 0
+	.globl	SYM (__umodsi3)
+	TYPE	(__umodsi3)
+	.align	0
 	.thumb_func
 SYM (__umodsi3):
 	cmp	divisor, #0
@@ -302,10 +317,12 @@ Over10:
 
 Ldiv0:
 	push	{ lr }
-	bl	SYM (__div0)
+	bl	SYM (__div0) __PLT__
 	mov	r0, #0			@ about as wrong as it could be
 	pop	{ pc }
 
+	SIZE	(__umodsi3)
+	
 #endif /* L_umodsi3 */
 
 #ifdef L_divsi3
@@ -318,9 +335,11 @@ ip		.req	r12
 sp		.req	r13
 lr		.req	r14
 pc		.req	r15
+	
 	.text
-	.globl SYM (__divsi3)
-	.align 0
+	.globl	SYM (__divsi3)
+	TYPE	(__divsi3)
+	.align	0
 	.thumb_func
 SYM (__divsi3):
 	cmp	divisor, #0
@@ -421,10 +440,12 @@ Over7:
 
 Ldiv0:
 	push	{ lr }
-	bl	SYM (__div0)
+	bl	SYM (__div0) __PLT__
 	mov	r0, #0			@ about as wrong as it could be
 	pop	{ pc }
 
+	SIZE	(__divsi3)
+	
 #endif /* L_divsi3 */
 
 #ifdef L_modsi3
@@ -437,9 +458,11 @@ ip		.req	r12
 sp		.req	r13
 lr		.req	r14
 pc		.req	r15
+	
 	.text
-	.globl SYM (__modsi3)
-	.align 0
+	.globl	SYM (__modsi3)
+	TYPE	(__modsi3)
+	.align	0
 	.thumb_func
 SYM (__modsi3):
 	mov	curbit, #1
@@ -581,20 +604,25 @@ Over10:
 
 Ldiv0:
 	push    { lr }
-	bl	SYM (__div0)
+	bl	SYM (__div0) __PLT__
 	mov	r0, #0			@ about as wrong as it could be
 	pop	{ pc }
 	
+	SIZE	(__modsi3)
+		
 #endif /* L_modsi3 */
 
 #ifdef L_dvmd_tls
 
-	.globl SYM (__div0)
-	.align 0
+	.globl	SYM (__div0)
+	TYPE	(__div0)
+	.align	0
 	.thumb_func
 SYM (__div0):
 	RET	
 
+	SIZE	(__div0)
+	
 #endif /* L_divmodsi_tools */
 
 	
@@ -611,10 +639,13 @@ SYM (__div0):
 
 .macro call_via register
 	.globl	SYM (_call_via_\register)
+	TYPE	(_call_via_\register)
 	.thumb_func
 SYM (_call_via_\register):
 	bx	\register
 	nop
+	
+	SIZE	(_call_via_\register)
 .endm
 
 	call_via r0
@@ -652,13 +683,16 @@ SYM (_call_via_\register):
 	.align 0
 
 	.code 32
+	.globl _arm_return
 _arm_return:		
 	ldmia 	r13!, {r12}
 	bx 	r12
-	.code 16
-
+	
 .macro interwork register					
+	.code 16
+	
 	.globl	SYM (_interwork_call_via_\register)
+	TYPE	(_interwork_call_via_\register)
 	.thumb_func
 SYM (_interwork_call_via_\register):
 	bx 	pc
@@ -671,7 +705,8 @@ SYM (_interwork_call_via_\register):
 	stmeqdb	r13!, {lr}
 	adreq	lr, _arm_return
 	bx	\register
-	.code 16
+
+	SIZE	(_interwork_call_via_\register)
 .endm
 	
 	interwork r0
@@ -688,8 +723,27 @@ SYM (_interwork_call_via_\register):
 	interwork fp
 	interwork ip
 	interwork sp
-	interwork lr
-		
+
+	/* The lr case has to be handled a little differently...*/
+	.code 16
+	.globl	SYM (_interwork_call_via_lr)
+	TYPE	(_interwork_call_via_lr)
+	.thumb_func
+SYM (_interwork_call_via_lr):
+	bx 	pc
+	nop
+	
+	.code 32
+	.globl .Lchange_lr
+.Lchange_lr:
+	tst	lr, #1
+	stmeqdb	r13!, {lr}
+	mov	ip, lr
+	adreq	lr, _arm_return
+	bx	ip
+
+	SIZE	(_interwork_call_via_lr)
+	
 #endif /* L_interwork_call_via_rX */
 
 	
diff --git a/gcc/config/arm/linux-elf26.h b/gcc/config/arm/linux-elf26.h
new file mode 100644
index 0000000..aa65ae7
--- /dev/null
+++ b/gcc/config/arm/linux-elf26.h
@@ -0,0 +1,32 @@
+/* Definitions for 26-bit ARM running Linux-based GNU systems using ELF
+   Copyright (C) 1998 Free Software Foundation, Inc.
+   Contributed by Philip Blundell <philb@gnu.org>
+
+This file is part of GNU CC.
+
+GNU CC is free software; you can redistribute it and/or modify
+it under the terms of the GNU General Public License as published by
+the Free Software Foundation; either version 2, or (at your option)
+any later version.
+
+GNU CC is distributed in the hope that it will be useful,
+but WITHOUT ANY WARRANTY; without even the implied warranty of
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+GNU General Public License for more details.
+
+You should have received a copy of the GNU General Public License
+along with this program; see the file COPYING.  If not, write to
+the Free Software Foundation, 59 Temple Place - Suite 330,
+Boston, MA 02111-1307, USA.  */
+
+#define SUBTARGET_DEFAULT_APCS26
+
+#define SUBTARGET_LINK_SPEC	\
+	" %{mapcs-32:-m elf32arm} %{!mapcs-32:-m elf32arm26}"
+
+#define SUBTARGET_EXTRA_ASM_SPEC	\
+	" %{mapcs-32:-mapcs-32} %(!mapcs-32:-mapcs-26}"
+
+#define TARGET_DEFAULT (ARM_FLAG_SHORT_BYTE)
+
+#include "arm/linux-elf.h"