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| author | Andrew Stubbs <ams@codesourcery.com> | 2020-03-19 17:44:59 +0000 |
|---|---|---|
| committer | Andrew Stubbs <ams@codesourcery.com> | 2020-04-24 20:02:58 +0100 |
| commit | 28b733ea04f4f5d85cab621e901aa8ba7b6b1ae4 (patch) | |
| tree | fd5ade61a28309271b68e334fd91310a2fab5aa2 | |
| parent | 9c725245beed2f056b67f5dc218fef6cb869c5f2 (diff) | |
| download | gcc-28b733ea04f4f5d85cab621e901aa8ba7b6b1ae4.zip gcc-28b733ea04f4f5d85cab621e901aa8ba7b6b1ae4.tar.gz gcc-28b733ea04f4f5d85cab621e901aa8ba7b6b1ae4.tar.bz2 | |
amdgcn: Fix wrong-code bug in 64-bit masked add
2020-04-24 Andrew Stubbs <ams@codesourcery.com>
gcc/
* config/gcn/gcn-valu.md (add<mode>_zext_dup2_exec): Fix merge
of high-part.
(add<mode>_sext_dup2_exec): Likewise.
| -rw-r--r-- | gcc/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/config/gcn/gcn-valu.md | 6 |
2 files changed, 10 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 4b6456e..30e9675 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2020-04-24 Andrew Stubbs <ams@codesourcery.com> + + * config/gcn/gcn-valu.md (add<mode>_zext_dup2_exec): Fix merge + of high-part. + (add<mode>_sext_dup2_exec): Likewise. + 2020-04-24 Segher Boessenkool <segher@kernel.crashing.org> PR target/94710 diff --git a/gcc/config/gcn/gcn-valu.md b/gcc/config/gcn/gcn-valu.md index 0422e15..d3badb4 100644 --- a/gcc/config/gcn/gcn-valu.md +++ b/gcc/config/gcn/gcn-valu.md @@ -1497,7 +1497,8 @@ rtx dsthi = gcn_operand_part (<MODE>mode, operands[0], 1); emit_insn (gen_vec_duplicate<vnsi>_exec (dsthi, gcn_operand_part (DImode, operands[2], 1), - gcn_gen_undef (<VnSI>mode), operands[4])); + gcn_operand_part (<MODE>mode, operands[3], 1), + operands[4])); emit_insn (gen_addc<vnsi>3_exec (dsthi, dsthi, const0_rtx, vcc, vcc, gcn_operand_part (<MODE>mode, operands[3], 1), @@ -1564,7 +1565,8 @@ rtx dsthi = gcn_operand_part (<MODE>mode, operands[0], 1); emit_insn (gen_vec_duplicate<vnsi>_exec (dsthi, gcn_operand_part (DImode, operands[2], 1), - gcn_gen_undef (<VnSI>mode), operands[4])); + gcn_operand_part (<MODE>mode, operands[3], 1), + operands[4])); emit_insn (gen_addc<vnsi>3_exec (dsthi, dsthi, operands[5], vcc, vcc, gcn_operand_part (<MODE>mode, operands[3], 1), |