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| author | Segher Boessenkool <segher@kernel.crashing.org> | 2018-10-19 17:40:57 +0200 |
|---|---|---|
| committer | Segher Boessenkool <segher@gcc.gnu.org> | 2018-10-19 17:40:57 +0200 |
| commit | 273f3d4bb4734845ce527bf92b4781e288e4aae2 (patch) | |
| tree | 2f34e9f382748104399c2b3637da4cf1ad9add2a | |
| parent | cba40f681af46fc114b1c98fcf0a259407410dc7 (diff) | |
| download | gcc-273f3d4bb4734845ce527bf92b4781e288e4aae2.zip gcc-273f3d4bb4734845ce527bf92b4781e288e4aae2.tar.gz gcc-273f3d4bb4734845ce527bf92b4781e288e4aae2.tar.bz2 | |
rs6000: Put CR0 first in REG_ALLOC_ORDER
IRA and LRA prefer to use CR7 (which is first in REG_ALLOC_ORDER) over
CR0, although the latter often is cheaper ("x" vs. "y" constraints).
We should figure out why this is and fix it; but until that is done,
this patch makes CR0 the first allocated register: it improves the
current code, and it is required for later patches to be effective.
(It changes two testcases to no longer look at what CR field is
allocated).
* config/rs6000/rs6000.h (REG_ALLOC_ORDER): Move 68 (that is, CR0) to
be the first CR field allocated.
gcc/testsuite/
* gcc.target/powerpc/safe-indirect-jump-2.c: Do not check assigned CR
field number.
* gcc.target/powerpc/safe-indirect-jump-3.c: Ditto.
From-SVN: r265318
| -rw-r--r-- | gcc/ChangeLog | 5 | ||||
| -rw-r--r-- | gcc/config/rs6000/rs6000.h | 2 | ||||
| -rw-r--r-- | gcc/testsuite/ChangeLog | 6 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/powerpc/safe-indirect-jump-2.c | 6 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.target/powerpc/safe-indirect-jump-3.c | 6 |
5 files changed, 16 insertions, 9 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 082ef49..970f72a 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2018-10-19 Segher Boessenkool <segher@kernel.crashing.org> + + * config/rs6000/rs6000.h (REG_ALLOC_ORDER): Move 68 (that is, CR0) to + be the first CR field allocated. + 2018-10-19 Richard Biener <rguenther@suse.de> PR target/87657 diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index 86a7fb8..4ab027c 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -952,7 +952,7 @@ enum data_align { align_abi, align_opt, align_both }; 33, \ 63, 62, 61, 60, 59, 58, 57, 56, 55, 54, 53, 52, 51, \ 50, 49, 48, 47, 46, \ - 75, 73, 74, 69, 68, 72, 71, 70, \ + 68, 75, 73, 74, 69, 72, 71, 70, \ MAYBE_R2_AVAILABLE \ 9, 10, 8, 7, 6, 5, 4, \ 3, EARLY_R12 11, 0, \ diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 45b9bce..80c0b4b 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,9 @@ +2018-10-19 Segher Boessenkool <segher@kernel.crashing.org> + + * gcc.target/powerpc/safe-indirect-jump-2.c: Do not check assigned CR + field number. + * gcc.target/powerpc/safe-indirect-jump-3.c: Ditto. + 2018-10-19 Richard Biener <rguenther@suse.de> PR middle-end/87645 diff --git a/gcc/testsuite/gcc.target/powerpc/safe-indirect-jump-2.c b/gcc/testsuite/gcc.target/powerpc/safe-indirect-jump-2.c index d3d040f..d6fc6a3 100644 --- a/gcc/testsuite/gcc.target/powerpc/safe-indirect-jump-2.c +++ b/gcc/testsuite/gcc.target/powerpc/safe-indirect-jump-2.c @@ -27,8 +27,6 @@ int foo (int x) return spaz (x) / 2; } -/* The following assumes CR7 as the first chosen volatile. */ - -/* { dg-final { scan-assembler "crset 30" } } */ -/* { dg-final { scan-assembler "beqctr- 7" } } */ +/* { dg-final { scan-assembler "crset" } } */ +/* { dg-final { scan-assembler "beqctr-" } } */ /* { dg-final { scan-assembler {b \$} } } */ diff --git a/gcc/testsuite/gcc.target/powerpc/safe-indirect-jump-3.c b/gcc/testsuite/gcc.target/powerpc/safe-indirect-jump-3.c index c338e30..87881fb 100644 --- a/gcc/testsuite/gcc.target/powerpc/safe-indirect-jump-3.c +++ b/gcc/testsuite/gcc.target/powerpc/safe-indirect-jump-3.c @@ -46,8 +46,6 @@ int foo (int x) return a; } -/* The following assumes CR7 as the first chosen volatile. */ - -/* { dg-final { scan-assembler "crset 30" } } */ -/* { dg-final { scan-assembler "beqctr- 7" } } */ +/* { dg-final { scan-assembler "crset" } } */ +/* { dg-final { scan-assembler "beqctr-" } } */ /* { dg-final { scan-assembler {b \$} } } */ |