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authorH.J. Lu <hongjiu.lu@intel.com>2010-12-06 14:42:56 +0000
committerH.J. Lu <hjl@gcc.gnu.org>2010-12-06 06:42:56 -0800
commit1a23b861078884027c54ddb27438cf08acc9ef20 (patch)
treeee10082f5012438ff403b2681f750c11c9add801
parent35758e5b0108d43c495b94012a9a71a7eb879a76 (diff)
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Turn on unaligned SSE load/store for Core i7.
2010-12-06 H.J. Lu <hongjiu.lu@intel.com> * config/i386/i386.c (m_COREI7): New. (initial_ix86_tune_features): Turn on X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL and X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL for Core i7. From-SVN: r167496
-rw-r--r--gcc/ChangeLog7
-rw-r--r--gcc/config/i386/i386.c5
2 files changed, 10 insertions, 2 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 6c21b40..b2d4d6d 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,5 +1,12 @@
2010-12-06 H.J. Lu <hongjiu.lu@intel.com>
+ * config/i386/i386.c (m_COREI7): New.
+ (initial_ix86_tune_features): Turn on
+ X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL and
+ X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL for Core i7.
+
+2010-12-06 H.J. Lu <hongjiu.lu@intel.com>
+
* config.gcc: Allow corei7-avx for --with-arch/--with-cpu.
* config/i386/driver-i386.c (host_detect_local_cpu): Support
diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c
index c80a479..e9c14d0 100644
--- a/gcc/config/i386/i386.c
+++ b/gcc/config/i386/i386.c
@@ -1644,6 +1644,7 @@ const struct processor_costs *ix86_cost = &pentium_cost;
#define m_CORE2_64 (1<<PROCESSOR_CORE2_64)
#define m_COREI7_32 (1<<PROCESSOR_COREI7_32)
#define m_COREI7_64 (1<<PROCESSOR_COREI7_64)
+#define m_COREI7 (m_COREI7_32 | m_COREI7_64)
#define m_CORE2I7_32 (m_CORE2_32 | m_COREI7_32)
#define m_CORE2I7_64 (m_CORE2_64 | m_COREI7_64)
#define m_CORE2I7 (m_CORE2I7_32 | m_CORE2I7_64)
@@ -1810,10 +1811,10 @@ static unsigned int initial_ix86_tune_features[X86_TUNE_LAST] = {
| m_AMDFAM10 | m_BDVER1,
/* X86_TUNE_SSE_UNALIGNED_LOAD_OPTIMAL */
- m_AMDFAM10 | m_BDVER1,
+ m_AMDFAM10 | m_BDVER1 | m_COREI7,
/* X86_TUNE_SSE_UNALIGNED_STORE_OPTIMAL */
- m_BDVER1,
+ m_BDVER1 | m_COREI7,
/* X86_TUNE_SSE_PACKED_SINGLE_INSN_OPTIMAL */
m_BDVER1,