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authorJeffrey A Law <law@cygnus.com>1997-10-24 23:36:42 +0000
committerJeff Law <law@gcc.gnu.org>1997-10-24 17:36:42 -0600
commit17ad8a3bb9d5d8ccee55b08abba6fb154e5cf32b (patch)
treeb60a19035cb59659228b6a4a7063174f6ceb2f5d
parente16b49d379421f64b3d12b4f099ce2ae354c2355 (diff)
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mn10200.c (indirect_memory_operand): Delete unused function.
* mn10200.c (indirect_memory_operand): Delete unused function. * mn10200.h (EXTRA_CONSTRAINT): Handle 'R'. * mn10200.md (bset, bclr insns): Handle output in a reg too. From-SVN: r16169
-rw-r--r--gcc/ChangeLog6
-rw-r--r--gcc/config/mn10200/mn10200.c10
-rw-r--r--gcc/config/mn10200/mn10200.h7
-rw-r--r--gcc/config/mn10200/mn10200.md50
4 files changed, 43 insertions, 30 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index a38782f..d26d464 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,9 @@
+Fri Oct 24 17:40:34 1997 Jeffrey A Law (law@cygnus.com)
+
+ * mn10200.c (indirect_memory_operand): Delete unused function.
+ * mn10200.h (EXTRA_CONSTRAINT): Handle 'R'.
+ * mn10200.md (bset, bclr insns): Handle output in a reg too.
+
Fri Oct 24 15:54:57 1997 Richard Henderson <rth@cygnus.com>
* alpha.md (call patterns): Revert Oct 16 change; if we are to elide
diff --git a/gcc/config/mn10200/mn10200.c b/gcc/config/mn10200/mn10200.c
index 774755f..25d5e20 100644
--- a/gcc/config/mn10200/mn10200.c
+++ b/gcc/config/mn10200/mn10200.c
@@ -864,16 +864,6 @@ call_address_operand (op, mode)
return (GET_CODE (op) == SYMBOL_REF || GET_CODE (op) == REG);
}
-/* Return true if OP is an indirect memory operand, the "bset" and "bclr"
- insns use this predicate. */
-int
-indirect_memory_operand (op, mode)
- rtx op;
- enum machine_mode mode;
-{
- return (GET_CODE (op) == MEM && GET_CODE (XEXP (op, 0)) == REG);
-}
-
/* Return true if OP is a memory operand with a constant address.
A special PSImode move pattern uses this predicate. */
int
diff --git a/gcc/config/mn10200/mn10200.h b/gcc/config/mn10200/mn10200.h
index 4ab05e9..3b2f74c 100644
--- a/gcc/config/mn10200/mn10200.h
+++ b/gcc/config/mn10200/mn10200.h
@@ -614,10 +614,15 @@ extern struct rtx_def *function_arg();
#define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
/* Extra constraints. */
+#define OK_FOR_R(OP) \
+ (GET_CODE (OP) == MEM \
+ && GET_MODE (OP) == QImode \
+ && REG_P (XEXP (OP, 0)))
/* Q is used for sp + <something> in the {zero,sign}_extendpsisi2 patterns. */
#define EXTRA_CONSTRAINT(OP, C) \
- ((C) == 'S' ? GET_CODE (OP) == SYMBOL_REF : \
+ ((C) == 'R' ? OK_FOR_R (OP) : \
+ (C) == 'S' ? GET_CODE (OP) == SYMBOL_REF : \
(C) == 'Q' ? GET_CODE (OP) == PLUS : 0)
/* Maximum number of registers that can appear in a valid memory address. */
diff --git a/gcc/config/mn10200/mn10200.md b/gcc/config/mn10200/mn10200.md
index 2fffb91c..443fc8b 100644
--- a/gcc/config/mn10200/mn10200.md
+++ b/gcc/config/mn10200/mn10200.md
@@ -650,54 +650,66 @@
;; BIT INSTRUCTIONS
;; -----------------------------------------------------------------
-;; When clearing a set of bits in memory, we load the inverted bitmask into
-;; a register, then use bclr.
+;; These clears a constant set of bits in memory or in a register.
+;; We must support register destinations to make reload happy.
(define_insn ""
- [(set (match_operand:QI 0 "indirect_memory_operand" "")
+ [(set (match_operand:QI 0 "general_operand" "R,d")
(subreg:QI
(and:HI (subreg:HI (match_dup 0) 0)
(match_operand 1 "const_int_operand" "")) 0))
- (clobber (match_scratch:HI 2 "=&d"))]
+ (clobber (match_scratch:HI 2 "=&d,X"))]
""
- "mov %N1,%2\;bclr %2,%0"
+ "@
+ mov %N1,%2\;bclr %2,%0
+ and %1,%0"
[(set_attr "cc" "clobber")])
-;; These clear a non-constant set of bits in memory.
+;; This clears a variable set of bits in memory or in a register.
(define_insn ""
- [(set (match_operand:QI 0 "indirect_memory_operand" "")
+ [(set (match_operand:QI 0 "general_operand" "R,d")
(subreg:QI
(and:HI (subreg:HI (match_dup 0) 0)
- (not:HI (match_operand:HI 1 "general_operand" "d"))) 0))]
+ (not:HI (match_operand:HI 1 "general_operand" "d,d"))) 0))
+ (clobber (match_scratch:HI 2 "=X,&d"))]
""
- "bclr %1,%0"
+ "@
+ bclr %1,%0
+ mov %1,%2\;not %2\;and %2,%0"
[(set_attr "cc" "clobber")])
(define_insn ""
- [(set (match_operand:QI 0 "indirect_memory_operand" "")
+ [(set (match_operand:QI 0 "general_operand" "R,d")
(subreg:QI
- (and:HI (not:HI (match_operand:HI 1 "general_operand" "d"))
- (subreg:HI (match_dup 0) 0)) 0))]
+ (and:HI (not:HI (match_operand:HI 1 "general_operand" "d,d"))
+ (subreg:HI (match_dup 0) 0)) 0))
+ (clobber (match_scratch:HI 2 "=X,&d"))]
""
- "bclr %1,%0"
+ "@
+ bclr %1,%0
+ mov %1,%2\;not %2\;and %2,%0"
[(set_attr "cc" "clobber")])
;; These set bits in memory.
(define_insn ""
- [(set (match_operand:QI 0 "indirect_memory_operand" "")
+ [(set (match_operand:QI 0 "general_operand" "R,d")
(subreg:QI
(ior:HI (subreg:HI (match_dup 0) 0)
- (match_operand:HI 1 "general_operand" "d")) 0))]
+ (match_operand:HI 1 "general_operand" "d,d")) 0))]
""
- "bset %1,%0"
+ "@
+ bset %1,%0
+ or %1,%0"
[(set_attr "cc" "clobber")])
(define_insn ""
- [(set (match_operand:QI 0 "indirect_memory_operand" "")
+ [(set (match_operand:QI 0 "general_operand" "R,d")
(subreg:QI
- (ior:HI (match_operand:HI 1 "general_operand" "d")
+ (ior:HI (match_operand:HI 1 "general_operand" "d,d")
(subreg:HI (match_dup 0) 0)) 0))]
""
- "bset %1,%0"
+ "@
+ bset %1,%0
+ or %1,%0"
[(set_attr "cc" "clobber")])
;; Not any shorter/faster than using cmp, but it might save a