rs6000-c.c: Add support for built-in functions vector bool char vec_revb (vector bool char)...

gcc/ChangeLog:

2017-07-12  Carl Love  <cel@us.ibm.com>

	* config/rs6000/rs6000-c.c: Add support for built-in functions
	vector bool char vec_revb (vector bool char);
	vector bool short vec_revb (vector short char);
	vector bool int vec_revb (vector bool int);
	vector bool long long vec_revb (vector bool long long);
	* doc/extend.texi: Update the built-in documentation file for the
	new built-in functions.

gcc/testsuite/ChangeLog:

2017-07-12  Carl Love  <cel@us.ibm.com>

	* gcc.target/powerpc/p9-xxbr-1.c (rev_bool_char, rev_bool_short,
	rev_bool_int): Add test cases for builtins.
	* gcc.target/powerpc/p9-xxbr-2.c (rev_long_long, rev_ulong_ulong): Add
	test cases for builtins.

From-SVN: r250155

6 files changed, 61 insertions, 4 deletions

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index fa2a872..c580394 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,13 @@
+2017-07-12  Carl Love  <cel@us.ibm.com>
+
+	* config/rs6000/rs6000-c.c: Add support for built-in functions
+	vector bool char vec_revb (vector bool char);
+	vector bool short vec_revb (vector short char);
+	vector bool int vec_revb (vector bool int);
+	vector bool long long vec_revb (vector bool long long);
+	* doc/extend.texi: Update the built-in documentation file for the
+	new built-in functions.
+
 2017-07-12  Andreas Krebbel  <krebbel@linux.vnet.ibm.com>
 
 	* config/s390/s390.md: Remove movcc splitter.
diff --git a/gcc/config/rs6000/rs6000-c.c b/gcc/config/rs6000/rs6000-c.c
index abe4479..c769442 100644
--- a/gcc/config/rs6000/rs6000-c.c
+++ b/gcc/config/rs6000/rs6000-c.c
@@ -5525,6 +5525,8 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
   { P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRQ_V16QI,
     RS6000_BTI_unsigned_V16QI, RS6000_BTI_unsigned_V16QI, 0, 0 },
   { P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRQ_V16QI,
+    RS6000_BTI_bool_V16QI, RS6000_BTI_bool_V16QI, 0, 0 },
+  { P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRQ_V16QI,
     RS6000_BTI_V16QI, RS6000_BTI_V16QI, 0, 0 },
   { P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRQ_V1TI,
     RS6000_BTI_unsigned_V1TI, RS6000_BTI_unsigned_V1TI, 0, 0 },
@@ -5537,12 +5539,16 @@ const struct altivec_builtin_types altivec_overloaded_builtins[] = {
   { P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRD_V2DF,
     RS6000_BTI_V2DF, RS6000_BTI_V2DF, 0, 0 },
   { P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRW_V4SI,
+    RS6000_BTI_bool_V4SI, RS6000_BTI_bool_V4SI, 0, 0 },
+  { P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRW_V4SI,
     RS6000_BTI_unsigned_V4SI, RS6000_BTI_unsigned_V4SI, 0, 0 },
   { P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRW_V4SI,
     RS6000_BTI_V4SI, RS6000_BTI_V4SI, 0, 0 },
   { P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRW_V4SF,
     RS6000_BTI_V4SF, RS6000_BTI_V4SF, 0, 0 },
   { P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRH_V8HI,
+    RS6000_BTI_bool_V8HI, RS6000_BTI_bool_V8HI, 0, 0 },
+  { P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRH_V8HI,
     RS6000_BTI_unsigned_V8HI, RS6000_BTI_unsigned_V8HI, 0, 0 },
   { P9V_BUILTIN_VEC_REVB, P9V_BUILTIN_XXBRH_V8HI,
     RS6000_BTI_V8HI, RS6000_BTI_V8HI, 0, 0 },
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 0d22d67..530a82d 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -18510,13 +18510,17 @@ of each element.
 If the ISA 3.0 instruction set additions (@option{-mcpu=power9})
 are available:
 @smallexample
+vector signed bool char vec_revb (vector signed char);
 vector signed char vec_revb (vector signed char);
 vector unsigned char vec_revb (vector unsigned char);
+vector bool short vec_revb (vector bool short);
 vector short vec_revb (vector short);
 vector unsigned short vec_revb (vector unsigned short);
+vector bool int vec_revb (vector bool int);
 vector int vec_revb (vector int);
 vector unsigned int vec_revb (vector unsigned int);
 vector float vec_revb (vector float);
+vector bool long long vec_revb (vector bool long long);
 vector long long vec_revb (vector long long);
 vector unsigned long long vec_revb (vector unsigned long long);
 vector double vec_revb (vector double);
diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index 0fd9555..2afa99c 100644
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,5 +1,12 @@
 2017-07-12  Carl Love  <cel@us.ibm.com>
 
+	* gcc.target/powerpc/p9-xxbr-1.c (rev_bool_char, rev_bool_short,
+	rev_bool_int): Add test cases for builtins.
+	* gcc.target/powerpc/p9-xxbr-2.c (rev_long_long, rev_ulong_ulong): Add
+	test cases for builtins.
+
+2017-07-12  Carl Love  <cel@us.ibm.com>
+
 	* gcc.target/powerpc/builtins-1-p9-runnable.c (dg-ddo run): Add
 	lp64 && p9vector_hw.
 
diff --git a/gcc/testsuite/gcc.target/powerpc/p9-xxbr-1.c b/gcc/testsuite/gcc.target/powerpc/p9-xxbr-1.c
index cd4ba73..164f11f 100644
--- a/gcc/testsuite/gcc.target/powerpc/p9-xxbr-1.c
+++ b/gcc/testsuite/gcc.target/powerpc/p9-xxbr-1.c
@@ -13,6 +13,12 @@ rev_char (vector char a)
   return vec_revb (a);		/* XXBRQ.  */
 }
 
+vector bool char
+rev_bool_char (vector bool char a)
+{
+  return vec_revb (a);		/* XXBRQ.  */
+}
+
 vector signed char
 rev_schar (vector signed char a)
 {
@@ -31,6 +37,12 @@ rev_short (vector short a)
   return vec_revb (a);		/* XXBRH.  */
 }
 
+vector bool short
+rev_bool_short (vector bool short a)
+{
+  return vec_revb (a);		/* XXBRH.  */
+}
+
 vector unsigned short
 rev_ushort (vector unsigned short a)
 {
@@ -43,6 +55,12 @@ rev_int (vector int a)
   return vec_revb (a);		/* XXBRW.  */
 }
 
+vector bool int
+rev_bool_int (vector bool int a)
+{
+  return vec_revb (a);		/* XXBRW.  */
+}
+
 vector unsigned int
 rev_uint (vector unsigned int a)
 {
@@ -62,6 +80,6 @@ rev_double (vector double a)
 }
 
 /* { dg-final { scan-assembler-times "xxbrd" 1 } } */
-/* { dg-final { scan-assembler-times "xxbrh" 2 } } */
-/* { dg-final { scan-assembler-times "xxbrq" 3 } } */
-/* { dg-final { scan-assembler-times "xxbrw" 3 } } */
+/* { dg-final { scan-assembler-times "xxbrh" 3 } } */
+/* { dg-final { scan-assembler-times "xxbrq" 4 } } */
+/* { dg-final { scan-assembler-times "xxbrw" 4 } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/p9-xxbr-2.c b/gcc/testsuite/gcc.target/powerpc/p9-xxbr-2.c
index 97f6186..a4a1939 100644
--- a/gcc/testsuite/gcc.target/powerpc/p9-xxbr-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/p9-xxbr-2.c
@@ -20,6 +20,18 @@ rev_ulong (vector unsigned long a)
   return vec_revb (a);		/* XXBRD.  */
 }
 
+vector long long
+rev_long_long (vector long long a)
+{
+  return vec_revb (a);		/* XXBRD.  */
+}
+
+vector unsigned long long
+rev_ulong_ulong (vector unsigned long long a)
+{
+  return vec_revb (a);		/* XXBRD.  */
+}
+
 vector __int128_t
 rev_int128 (vector __int128_t a)
 {
@@ -32,5 +44,5 @@ rev_uint128 (vector __uint128_t a)
   return vec_revb (a);		/* XXBRQ.  */
 }
 
-/* { dg-final { scan-assembler-times "xxbrd" 2 } } */
+/* { dg-final { scan-assembler-times "xxbrd" 4 } } */
 /* { dg-final { scan-assembler-times "xxbrq" 2 } } */