aboutsummaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorKito Cheng <kito.cheng@sifive.com>2020-07-07 16:20:53 +0800
committerKito Cheng <kito.cheng@sifive.com>2020-07-09 14:51:00 +0800
commit1073b500e5d33af8b75567108a8c04fe2598df2b (patch)
tree53722ec431b5e5d16c38b3c81f16cd6fb862d800
parent4c0d1322033ce979532425d336530b217f6b5fd3 (diff)
downloadgcc-1073b500e5d33af8b75567108a8c04fe2598df2b.zip
gcc-1073b500e5d33af8b75567108a8c04fe2598df2b.tar.gz
gcc-1073b500e5d33af8b75567108a8c04fe2598df2b.tar.bz2
RISC-V: Implement __builtin_thread_pointer
RISC-V has a dedicate register for thread pointer which is specified in psABI doc, so we could support __builtin_thread_pointer in straightforward way. Note: clang/llvm was supported __builtin_thread_pointer for RISC-V port recently. - https://reviews.llvm.org/rGaabc24acf0d5f8677bd22fe9c108581e07c3e180 gcc/ChangeLog: * config/riscv/riscv.md (get_thread_pointer<mode>): New. (TP_REGNUM): Ditto. * doc/extend.texi (Target Builtins): Add RISC-V built-in section. Document __builtin_thread_pointer. gcc/testsuite/ChangeLog: * gcc.target/riscv/read-thread-pointer.c: New.
-rw-r--r--gcc/config/riscv/riscv.md8
-rw-r--r--gcc/doc/extend.texi11
-rw-r--r--gcc/testsuite/gcc.target/riscv/read-thread-pointer.c7
3 files changed, 26 insertions, 0 deletions
diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index 36012ad..95a02eca 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -70,6 +70,7 @@
(define_constants
[(RETURN_ADDR_REGNUM 1)
(GP_REGNUM 3)
+ (TP_REGNUM 4)
(T0_REGNUM 5)
(T1_REGNUM 6)
(S0_REGNUM 8)
@@ -2515,6 +2516,13 @@
DONE;
})
+;; Named pattern for expanding thread pointer reference.
+(define_expand "get_thread_pointer<mode>"
+ [(set (match_operand:P 0 "register_operand" "=r")
+ (reg:P TP_REGNUM))]
+ ""
+{})
+
(include "sync.md")
(include "peephole.md")
(include "pic.md")
diff --git a/gcc/doc/extend.texi b/gcc/doc/extend.texi
index 3f92171..d1510dd 100644
--- a/gcc/doc/extend.texi
+++ b/gcc/doc/extend.texi
@@ -13859,6 +13859,7 @@ instructions, but allow the compiler to schedule those calls.
* PowerPC Hardware Transactional Memory Built-in Functions::
* PowerPC Atomic Memory Operation Functions::
* PowerPC Matrix-Multiply Assist Built-in Functions::
+* RISC-V Built-in Functions::
* RX Built-in Functions::
* S/390 System z Built-in Functions::
* SH Built-in Functions::
@@ -21471,6 +21472,16 @@ vec_t __builtin_vsx_xvcvspbf16 (vec_t);
vec_t __builtin_vsx_xvcvbf16sp (vec_t);
@end smallexample
+@node RISC-V Built-in Functions
+@subsection RISC-V Built-in Functions
+
+These built-in functions are available for the RISC-V family of
+processors.
+
+@deftypefn {Built-in Function} {void *} __builtin_thread_pointer (void)
+Returns the value that is currently set in the @samp{tp} register.
+@end deftypefn
+
@node RX Built-in Functions
@subsection RX Built-in Functions
GCC supports some of the RX instructions which cannot be expressed in
diff --git a/gcc/testsuite/gcc.target/riscv/read-thread-pointer.c b/gcc/testsuite/gcc.target/riscv/read-thread-pointer.c
new file mode 100644
index 0000000..760f8ea
--- /dev/null
+++ b/gcc/testsuite/gcc.target/riscv/read-thread-pointer.c
@@ -0,0 +1,7 @@
+/* { dg-do compile } */
+
+void *get_tp()
+{
+ return __builtin_thread_pointer ();
+}
+/* { dg-final { scan-assembler "mv\[ \t\]*[at][0-9]+,tp" } } */