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author | Bill Schmidt <wschmidt@linux.ibm.com> | 2020-03-04 07:30:29 -0600 |
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committer | Bill Schmidt <wschmidt@linux.ibm.com> | 2020-03-04 07:30:29 -0600 |
commit | 0b0908c1f27d12a3cbbd3c9fd55aec1fe87586a6 (patch) | |
tree | 927889a16066474037dc6ad411bffa0a4568eab0 | |
parent | 48c16b2867917883b1efc0cb7d9142c833fb5ec4 (diff) | |
download | gcc-0b0908c1f27d12a3cbbd3c9fd55aec1fe87586a6.zip gcc-0b0908c1f27d12a3cbbd3c9fd55aec1fe87586a6.tar.gz gcc-0b0908c1f27d12a3cbbd3c9fd55aec1fe87586a6.tar.bz2 |
rs6000: Fix -mpower9-vector -mno-altivec ICE (PR87560)
PR87560 reports an ICE when a test case is compiled with -mpower9-vector
and -mno-altivec. This patch terminates compilation with an error when
this combination (and other unreasonable ones) are requested.
Bootstrapped and tested on powerpc64le-unknown-linux-gnu with no
regressions. Reported error is now:
f951: Error: '-mno-altivec' turns off '-mpower9-vector'
2020-03-02 Bill Schmidt <wschmidt@linux.ibm.com>
PR target/87560
* rs6000-cpus.def (OTHER_ALTIVEC_MASKS): New #define.
* rs6000.c (rs6000_disable_incompatible_switches): Add table entry
for OPTION_MASK_ALTIVEC.
-rw-r--r-- | gcc/ChangeLog | 7 | ||||
-rw-r--r-- | gcc/config/rs6000/rs6000-cpus.def | 4 | ||||
-rw-r--r-- | gcc/config/rs6000/rs6000.c | 1 |
3 files changed, 12 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index b32bd44..b7c9d86 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,10 @@ +2020-03-04 Bill Schmidt <wschmidt@linux.ibm.com> + + PR target/87560 + * rs6000-cpus.def (OTHER_ALTIVEC_MASKS): New #define. + * rs6000.c (rs6000_disable_incompatible_switches): Add table entry + for OPTION_MASK_ALTIVEC. + 2020-03-04 Jakub Jelinek <jakub@redhat.com> PR debug/93888 diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def index 193d77e..ff1db60 100644 --- a/gcc/config/rs6000/rs6000-cpus.def +++ b/gcc/config/rs6000/rs6000-cpus.def @@ -101,6 +101,10 @@ | OPTION_MASK_FLOAT128_KEYWORD \ | OPTION_MASK_P8_VECTOR) +/* Flags that need to be turned off if -mno-altivec. */ +#define OTHER_ALTIVEC_MASKS (OTHER_VSX_VECTOR_MASKS \ + | OPTION_MASK_VSX) + #define POWERPC_7400_MASK (OPTION_MASK_PPC_GFXOPT | OPTION_MASK_ALTIVEC) /* Deal with ports that do not have -mstrict-align. */ diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index 9910b27..ecbf7ae 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -23632,6 +23632,7 @@ rs6000_disable_incompatible_switches (void) { OPTION_MASK_P9_VECTOR, OTHER_P9_VECTOR_MASKS, "power9-vector" }, { OPTION_MASK_P8_VECTOR, OTHER_P8_VECTOR_MASKS, "power8-vector" }, { OPTION_MASK_VSX, OTHER_VSX_VECTOR_MASKS, "vsx" }, + { OPTION_MASK_ALTIVEC, OTHER_ALTIVEC_MASKS, "altivec" }, }; for (i = 0; i < ARRAY_SIZE (flags); i++) |