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| author | Alexander Ivchenko <alexander.ivchenko@intel.com> | 2014-10-14 08:52:11 +0000 |
|---|---|---|
| committer | Kirill Yukhin <kyukhin@gcc.gnu.org> | 2014-10-14 08:52:11 +0000 |
| commit | 0ab03ea08c3886ad009afda41f3cd2df7733cfb1 (patch) | |
| tree | dce6bb9a9e836ae11628ebd98de3cf85ed807553 | |
| parent | 805e20ad3883e0fd3a11454d40460e1505690fe9 (diff) | |
| download | gcc-0ab03ea08c3886ad009afda41f3cd2df7733cfb1.zip gcc-0ab03ea08c3886ad009afda41f3cd2df7733cfb1.tar.gz gcc-0ab03ea08c3886ad009afda41f3cd2df7733cfb1.tar.bz2 | |
AVX-512. 74/n. Add byte/word max/mix reduction.
gcc/
* config/i386/i386.c
(emit_reduc_half): Handle V64QI and V32HI mode.
* config/i386/sse.md
(define_mode_iterator VI_AVX512BW): New.
(define_expand "reduc_<code>_<mode>"): Use VI512_48F_12BW.
Co-Authored-By: Andrey Turetskiy <andrey.turetskiy@intel.com>
Co-Authored-By: Anna Tikhonova <anna.tikhonova@intel.com>
Co-Authored-By: Ilya Tocar <ilya.tocar@intel.com>
Co-Authored-By: Ilya Verbin <ilya.verbin@intel.com>
Co-Authored-By: Kirill Yukhin <kirill.yukhin@intel.com>
Co-Authored-By: Maxim Kuznetsov <maxim.kuznetsov@intel.com>
Co-Authored-By: Michael Zolotukhin <michael.v.zolotukhin@intel.com>
From-SVN: r216192
| -rw-r--r-- | gcc/ChangeLog | 15 | ||||
| -rw-r--r-- | gcc/config/i386/i386.c | 2 | ||||
| -rw-r--r-- | gcc/config/i386/sse.md | 8 |
3 files changed, 22 insertions, 3 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index fd59c2a..79dcc11 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -7,6 +7,21 @@ Kirill Yukhin <kirill.yukhin@intel.com> Michael Zolotukhin <michael.v.zolotukhin@intel.com> + * config/i386/i386.c + (emit_reduc_half): Handle V64QI and V32HI mode. + * config/i386/sse.md + (define_mode_iterator VI_AVX512BW): New. + (define_expand "reduc_<code>_<mode>"): Use VI512_48F_12BW. + +2014-10-14 Alexander Ivchenko <alexander.ivchenko@intel.com> + Maxim Kuznetsov <maxim.kuznetsov@intel.com> + Anna Tikhonova <anna.tikhonova@intel.com> + Ilya Tocar <ilya.tocar@intel.com> + Andrey Turetskiy <andrey.turetskiy@intel.com> + Ilya Verbin <ilya.verbin@intel.com> + Kirill Yukhin <kirill.yukhin@intel.com> + Michael Zolotukhin <michael.v.zolotukhin@intel.com> + * config/i386/sse.md (define_mode_iterator REDUC_SMINMAX_MODE): Add V64QI and V32HI modes. diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index c4f2da1..9deee91 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -41210,6 +41210,8 @@ emit_reduc_half (rtx dest, rtx src, int i) GEN_INT (i / 2)); } break; + case V64QImode: + case V32HImode: case V16SImode: case V16SFmode: case V8DImode: diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index 6169b39..fa2babf 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -514,6 +514,8 @@ (define_mode_iterator VI48_256 [V8SI V4DI]) (define_mode_iterator VI48_512 [V16SI V8DI]) (define_mode_iterator VI4_256_8_512 [V8SI V8DI]) +(define_mode_iterator VI_AVX512BW + [V16SI V8DI (V32HI "TARGET_AVX512BW") (V64QI "TARGET_AVX512BW")]) ;; Int-float size matches (define_mode_iterator VI4F_128 [V4SI V4SF]) @@ -2337,9 +2339,9 @@ }) (define_expand "reduc_<code>_<mode>" - [(umaxmin:VI48_512 - (match_operand:VI48_512 0 "register_operand") - (match_operand:VI48_512 1 "register_operand"))] + [(umaxmin:VI_AVX512BW + (match_operand:VI_AVX512BW 0 "register_operand") + (match_operand:VI_AVX512BW 1 "register_operand"))] "TARGET_AVX512F" { ix86_expand_reduc (gen_<code><mode>3, operands[0], operands[1]); |