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author | Georg-Johann Lay <avr@gjlay.de> | 2017-02-06 13:38:56 +0000 |
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committer | Georg-Johann Lay <gjl@gcc.gnu.org> | 2017-02-06 13:38:56 +0000 |
commit | 0898c74df400ebd92a991b6deb8e07a649b67d94 (patch) | |
tree | a51ce978240c0ed9853ecaab15ca537bbd9caad2 | |
parent | 406fde6e17b0a4b4f9d0c602e6a827d0592db420 (diff) | |
download | gcc-0898c74df400ebd92a991b6deb8e07a649b67d94.zip gcc-0898c74df400ebd92a991b6deb8e07a649b67d94.tar.gz gcc-0898c74df400ebd92a991b6deb8e07a649b67d94.tar.bz2 |
re PR rtl-optimization/78883 ([avr] ICE triggered by change to combine.c (r243578))
gcc/
PR target/78883
* config/avr/avr.c (rtl-iter.h): Include it.
(TARGET_LEGITIMATE_COMBINED_INSN): New hook define...
(avr_legitimate_combined_insn): ...and implementation.
gcc/testsuite/
PR target/78883
* gcc.c-torture/compile/pr78883.c: New test.
From-SVN: r245209
-rw-r--r-- | gcc/ChangeLog | 2 | ||||
-rw-r--r-- | gcc/config/avr/avr.c | 32 | ||||
-rw-r--r-- | gcc/testsuite/ChangeLog | 5 | ||||
-rw-r--r-- | gcc/testsuite/gcc.c-torture/compile/pr78883.c | 12 |
4 files changed, 51 insertions, 0 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 17f415a..759ab99 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,5 @@ +2017-02-06 Georg-Johann Lay <avr@gjlay.de> + 2017-02-06 Dominik Vogt <vogt@linux.vnet.ibm.com> * config/s390/predicates.md ("larl_operand"): Use macros from hwint.h. diff --git a/gcc/config/avr/avr.c b/gcc/config/avr/avr.c index 9dc7fa0..cde63f1 100644 --- a/gcc/config/avr/avr.c +++ b/gcc/config/avr/avr.c @@ -49,6 +49,7 @@ #include "context.h" #include "tree-pass.h" #include "print-rtl.h" +#include "rtl-iter.h" /* This file should be included last. */ #include "target-def.h" @@ -12823,6 +12824,34 @@ avr_convert_to_type (tree type, tree expr) } +/* Implement `TARGET_LEGITIMATE_COMBINED_INSN'. */ + +/* PR78883: Filter out paradoxical SUBREGs of MEM which are not handled + properly by following passes. As INSN_SCHEDULING is off and hence + general_operand accepts such expressions, ditch them now. */ + +static bool +avr_legitimate_combined_insn (rtx_insn *insn) +{ + subrtx_iterator::array_type array; + + FOR_EACH_SUBRTX (iter, array, PATTERN (insn), NONCONST) + { + const_rtx op = *iter; + + if (SUBREG_P (op) + && MEM_P (SUBREG_REG (op)) + && (GET_MODE_SIZE (GET_MODE (op)) + > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op))))) + { + return false; + } + } + + return true; +} + + /* PR63633: The middle-end might come up with hard regs as input operands. RMASK is a bit mask representing a subset of hard registers R0...R31: @@ -14364,6 +14393,9 @@ avr_fold_builtin (tree fndecl, int n_args ATTRIBUTE_UNUSED, tree *arg, #define TARGET_USE_BY_PIECES_INFRASTRUCTURE_P \ avr_use_by_pieces_infrastructure_p +#undef TARGET_LEGITIMATE_COMBINED_INSN +#define TARGET_LEGITIMATE_COMBINED_INSN avr_legitimate_combined_insn + struct gcc_target targetm = TARGET_INITIALIZER; diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 3214eef..2396bd0 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2017-02-06 Georg-Johann Lay <avr@gjlay.de> + + PR target/78883 + * gcc.c-torture/compile/pr78883.c: New test. + 2017-02-05 Jan Hubicka <hubicka@ucw.cz> PR tree-ssa/79347 diff --git a/gcc/testsuite/gcc.c-torture/compile/pr78883.c b/gcc/testsuite/gcc.c-torture/compile/pr78883.c new file mode 100644 index 0000000..8401f88 --- /dev/null +++ b/gcc/testsuite/gcc.c-torture/compile/pr78883.c @@ -0,0 +1,12 @@ +/* { dg-do compile } */ + +int foo (int *p) +{ + int i; + for (i = 0; i < 5; i++) + { + if (p[i] & 1) + return i; + } + return -1; +} |