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author | Vladimir Makarov <vmakarov@gcc.gnu.org> | 1998-12-18 10:46:41 +0000 |
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committer | Vladimir Makarov <vmakarov@gcc.gnu.org> | 1998-12-18 10:46:41 +0000 |
commit | 0197d76bfafb3d84b4df1b80b5e01f02a9272a37 (patch) | |
tree | 2810c501168f10f075a65cce45537d7f543d97cf | |
parent | 847fe79126aff98c81d1c6c4e281954c172a74de (diff) | |
download | gcc-0197d76bfafb3d84b4df1b80b5e01f02a9272a37.zip gcc-0197d76bfafb3d84b4df1b80b5e01f02a9272a37.tar.gz gcc-0197d76bfafb3d84b4df1b80b5e01f02a9272a37.tar.bz2 |
[multiple changes]
1998-12-17 Vladimir N. Makarov <vmakarov@cygnus.com>
* config/i60/i960.md (extendqihi2): Fix typo (usage ',' instead of
';').
1998-12-17 Michael Tiemann <tiemann@axon.cygnus.com>
* i960.md (extend*, zero_extend*): Don't generate rtl that looks
like (subreg:SI (reg:SI N) 0), because it's wrong, and it hides
optimizations from the combiner.
From-SVN: r24371
-rw-r--r-- | gcc/ChangeLog | 11 | ||||
-rw-r--r-- | gcc/config/i960/i960.md | 18 |
2 files changed, 23 insertions, 6 deletions
diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 51964fc..7cfdd14 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -25,6 +25,17 @@ Thu Dec 17 12:31:12 1998 Jim Wilson <wilson@cygnus.com> * Makefile.in (INTERNAL_CFLAGS): Add SCHED_CFLAGS. (ALL_CFLAGS): Delete SCHED_CFLAGS. +1998-12-17 Vladimir N. Makarov <vmakarov@cygnus.com> + + * config/i60/i960.md (extendqihi2): Fix typo (usage ',' instead of + ';'). + +1998-12-17 Michael Tiemann <tiemann@axon.cygnus.com> + + * i960.md (extend*, zero_extend*): Don't generate rtl that looks + like (subreg:SI (reg:SI N) 0), because it's wrong, and it hides + optimizations from the combiner. + Thu Dec 17 08:27:03 1998 J"orn Rennecke <amylaar@cygnus.co.uk> * loop.c (combine_givs_used_by_other): Don't depend on n_times_set. diff --git a/gcc/config/i960/i960.md b/gcc/config/i960/i960.md index ef88484..ff73bd7 100644 --- a/gcc/config/i960/i960.md +++ b/gcc/config/i960/i960.md @@ -1193,7 +1193,8 @@ op1_subreg_word = SUBREG_WORD (operand1); operand1 = SUBREG_REG (operand1); } - operand1 = gen_rtx (SUBREG, SImode, operand1, op1_subreg_word); + if (GET_MODE (operand1) != SImode) + operand1 = gen_rtx (SUBREG, SImode, operand1, op1_subreg_word); emit_insn (gen_ashlsi3 (temp, operand1, shift_16)); emit_insn (gen_ashrsi3 (operand0, temp, shift_16)); @@ -1227,7 +1228,8 @@ op1_subreg_word = SUBREG_WORD (operand1); operand1 = SUBREG_REG (operand1); } - operand1 = gen_rtx (SUBREG, SImode, operand1, op1_subreg_word), + if (GET_MODE (operand1) != SImode) + operand1 = gen_rtx (SUBREG, SImode, operand1, op1_subreg_word); emit_insn (gen_ashlsi3 (temp, operand1, shift_24)); emit_insn (gen_ashrsi3 (operand0, temp, shift_24)); @@ -1263,7 +1265,8 @@ op1_subreg_word = SUBREG_WORD (operand1); operand1 = SUBREG_REG (operand1); } - operand1 = gen_rtx (SUBREG, SImode, operand1, op1_subreg_word); + if (GET_MODE (operand1) != SImode) + operand1 = gen_rtx (SUBREG, SImode, operand1, op1_subreg_word); if (GET_CODE (operand0) == SUBREG) { @@ -1306,7 +1309,8 @@ op1_subreg_word = SUBREG_WORD (operand1); operand1 = SUBREG_REG (operand1); } - operand1 = gen_rtx (SUBREG, SImode, operand1, op1_subreg_word); + if (GET_MODE (operand1) != SImode) + operand1 = gen_rtx (SUBREG, SImode, operand1, op1_subreg_word); emit_insn (gen_ashlsi3 (temp, operand1, shift_16)); emit_insn (gen_lshrsi3 (operand0, temp, shift_16)); @@ -1345,7 +1349,8 @@ op1_subreg_word = SUBREG_WORD (operand1); operand1 = SUBREG_REG (operand1); } - operand1 = gen_rtx (SUBREG, SImode, operand1, op1_subreg_word); + if (GET_MODE (operand1) != SImode) + operand1 = gen_rtx (SUBREG, SImode, operand1, op1_subreg_word); emit_insn (gen_ashlsi3 (temp, operand1, shift_24)); emit_insn (gen_lshrsi3 (operand0, temp, shift_24)); @@ -1381,7 +1386,8 @@ op1_subreg_word = SUBREG_WORD (operand1); operand1 = SUBREG_REG (operand1); } - operand1 = gen_rtx (SUBREG, SImode, operand1, op1_subreg_word); + if (GET_MODE (operand1) != SImode) + operand1 = gen_rtx (SUBREG, SImode, operand1, op1_subreg_word); if (GET_CODE (operand0) == SUBREG) { |