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| author | Roger Sayle <roger@nextmovesoftware.com> | 2020-08-12 22:34:29 +0100 |
|---|---|---|
| committer | Giuliano Belinassi <giuliano.belinassi@usp.br> | 2020-08-17 15:08:07 -0300 |
| commit | c539c74c7eeea1c9a05230e7aac887fd3b2c374a (patch) | |
| tree | 46620ff2dab1c5fabdb47b3044ce54121cbc60f3 | |
| parent | 020f4589fa9996a65ffb785f52d27398293043ce (diff) | |
| download | gcc-c539c74c7eeea1c9a05230e7aac887fd3b2c374a.zip gcc-c539c74c7eeea1c9a05230e7aac887fd3b2c374a.tar.gz gcc-c539c74c7eeea1c9a05230e7aac887fd3b2c374a.tar.bz2 | |
PR target/96558: Only call ix86_expand_clear with GENERAL_REGS.
The following patch tightens the predicates of the peephole2 from my recent
"Integer min/max improvements patch" to only hoist clearing a register when
that register is a general register. Calling ix86_expand_clear with regs
other than GENERAL_REGS is not supported.
2020-08-12 Roger Sayle <roger@nextmovesoftware.com>
Uroš Bizjak <ubizjak@gmail.com>
gcc/ChangeLog
PR target/96558
* config/i386/i386.md (peephole2): Only reorder register clearing
instructions to allow use of xor for general registers.
gcc/testsuite/ChangeLog
PR target/96558
* gcc.dg/pr96558.c: New test.
| -rw-r--r-- | gcc/config/i386/i386.md | 2 | ||||
| -rw-r--r-- | gcc/testsuite/gcc.dg/pr96558.c | 32 |
2 files changed, 33 insertions, 1 deletions
diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index f3799ac3..9d4e669 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -18938,7 +18938,7 @@ ;; i.e. prefer "xorl %eax,%eax; test/cmp" over "test/cmp; movl $0, %eax". (define_peephole2 [(set (reg FLAGS_REG) (match_operand 0)) - (set (match_operand:SWI 1 "register_operand") (const_int 0))] + (set (match_operand:SWI 1 "general_reg_operand") (const_int 0))] "peep2_regno_dead_p (0, FLAGS_REG) && !reg_overlap_mentioned_p (operands[1], operands[0])" [(set (match_dup 2) (match_dup 0))] diff --git a/gcc/testsuite/gcc.dg/pr96558.c b/gcc/testsuite/gcc.dg/pr96558.c new file mode 100644 index 0000000..2f5739e --- /dev/null +++ b/gcc/testsuite/gcc.dg/pr96558.c @@ -0,0 +1,32 @@ +/* PR target/96558 */ +/* { dg-do compile { target int128 } } */ +/* { dg-options "-O2 -fno-expensive-optimizations -fno-gcse" } */ + +int ky; +long int h1; +__int128 f1; + +int +sd (void); + +int __attribute__ ((simd)) +i8 (void) +{ + __int128 vh; + + if (sd () == 0) + h1 = 0; + + do + { + long int lf = (long int) f1 ? h1 : 0; + + ky += lf; + vh = lf | f1; + f1 = 1; + } + while (vh < (f1 ^ 2)); + + return 0; +} + |