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| author | Jacob Bachmeyer <jcb@gnu.org> | 2020-08-10 22:13:05 -0500 |
|---|---|---|
| committer | Jacob Bachmeyer <jcb@gnu.org> | 2020-08-10 22:13:05 -0500 |
| commit | 6efefce47d81095e101fe579cf2c2b41c42009b8 (patch) | |
| tree | bf559f2bd2915133fe30b4fd982b9a3deb7a89f3 | |
| parent | 8c367b5ca4a79e8ab732ef7f237ab0153ce196bb (diff) | |
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Update ChangeLog
| -rw-r--r-- | ChangeLog | 8 |
1 files changed, 8 insertions, 0 deletions
@@ -1,3 +1,11 @@ +2020-08-10 Jacob Bachmeyer <jcb@gnu.org> + + Merge patch from Kito Cheng to add support for RISC-V sim target. + + * baseboards/riscv-sim.exp: New file. + * Makefile.am (baseboard_DATA): Add riscv-sim.exp. + * Makefile.in (baseboard_DATA): Likewise. + 2020-08-02 Jacob Bachmeyer <jcb@gnu.org> * Makefile.am (TESTSUITE_FILES): Add files that were introduced |