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AM_V_RUNTEST = $(AM_V_RUNTEST_@AM_V@) AM_V_RUNTEST_ = $(AM_V_RUNTEST_@AM_DEFAULT_V@) AM_V_RUNTEST_0 = @echo " RUNTEST $(RUNTESTFLAGS) $*"; AM_V_RUNTEST_1 = DO_RUNTEST = \ LC_ALL=C; export LC_ALL; \ EXPECT=${EXPECT} ; export EXPECT ; \ runtest=$(RUNTEST); \ $$runtest $(RUNTESTFLAGS) testsuite_common_CPPFLAGS = \ -I$(srcdir)/common \ -I$(srcroot)/include \ -I../bfd @SIM_ENABLE_ARCH_arm_TRUE@armdocdir = $(docdir)/arm @SIM_ENABLE_ARCH_arm_TRUE@armdoc_DATA = arm/README @SIM_ENABLE_ARCH_bpf_TRUE@bpf_BUILD_OUTPUTS = \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/eng-le.h \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/mloop-le.c \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/stamp-mloop-le \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/eng-be.h \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/mloop-be.c \ @SIM_ENABLE_ARCH_bpf_TRUE@ bpf/stamp-mloop-be @SIM_ENABLE_ARCH_cr16_TRUE@cr16_BUILD_OUTPUTS = \ @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/gencode$(EXEEXT) \ @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/simops.h \ @SIM_ENABLE_ARCH_cr16_TRUE@ cr16/table.c @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_SOURCES = cr16/gencode.c @SIM_ENABLE_ARCH_cr16_TRUE@cr16_gencode_LDADD = cr16/cr16-opc.o @SIM_ENABLE_ARCH_cris_TRUE@cris_BUILD_OUTPUTS = \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/engv10.h \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/mloopv10f.c \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/stamp-mloop-v10f \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/engv32.h \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/mloopv32f.c \ @SIM_ENABLE_ARCH_cris_TRUE@ cris/stamp-mloop-v32f @SIM_ENABLE_ARCH_d10v_TRUE@d10v_BUILD_OUTPUTS = \ @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/gencode$(EXEEXT) \ @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/simops.h \ @SIM_ENABLE_ARCH_d10v_TRUE@ d10v/table.c @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_SOURCES = d10v/gencode.c @SIM_ENABLE_ARCH_d10v_TRUE@d10v_gencode_LDADD = d10v/d10v-opc.o @SIM_ENABLE_ARCH_erc32_TRUE@erc32docdir = $(docdir)/erc32 @SIM_ENABLE_ARCH_erc32_TRUE@erc32doc_DATA = erc32/README.erc32 erc32/README.gdb erc32/README.sis @SIM_ENABLE_ARCH_frv_TRUE@frvdocdir = $(docdir)/frv @SIM_ENABLE_ARCH_frv_TRUE@frvdoc_DATA = frv/README @SIM_ENABLE_ARCH_frv_TRUE@frv_BUILD_OUTPUTS = \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/eng.h \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/mloop.c \ @SIM_ENABLE_ARCH_frv_TRUE@ frv/stamp-mloop @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000_BUILD_OUTPUTS = \ @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/eng.h \ @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/mloop.c \ @SIM_ENABLE_ARCH_iq2000_TRUE@ iq2000/stamp-mloop @SIM_ENABLE_ARCH_lm32_TRUE@lm32_BUILD_OUTPUTS = \ @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/eng.h \ @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/mloop.c \ @SIM_ENABLE_ARCH_lm32_TRUE@ lm32/stamp-mloop @SIM_ENABLE_ARCH_m32c_TRUE@m32c_BUILD_OUTPUTS = \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/opc2c$(EXEEXT) \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/m32c.c \ @SIM_ENABLE_ARCH_m32c_TRUE@ m32c/r8c.c @SIM_ENABLE_ARCH_m32c_TRUE@m32c_opc2c_SOURCES = m32c/opc2c.c # opc2c leaks memory, and therefore makes AddressSanitizer unhappy. Disable # leak detection while running it. @SIM_ENABLE_ARCH_m32c_TRUE@m32c_OPC2C_RUN = ASAN_OPTIONS=detect_leaks=0 m32c/opc2c$(EXEEXT) @SIM_ENABLE_ARCH_m32r_TRUE@m32r_BUILD_OUTPUTS = \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/eng.h \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloop.c \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/stamp-mloop \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/engx.h \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloopx.c \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/stamp-mloop-x \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/eng2.h \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/mloop2.c \ @SIM_ENABLE_ARCH_m32r_TRUE@ m32r/stamp-mloop-2 @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_BUILD_OUTPUTS = \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/gencode$(EXEEXT) \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc11int.c \ @SIM_ENABLE_ARCH_m68hc11_TRUE@ m68hc11/m68hc12int.c @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11_gencode_SOURCES = m68hc11/gencode.c @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILT_SRC_FROM_IGEN = \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/icache.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/icache.c \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/idecode.c \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/semantics.c \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/model.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/model.c \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/support.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/support.c \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/itable.c \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/engine.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/engine.c \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/irun.c @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_BUILD_OUTPUTS = \ @SIM_ENABLE_ARCH_mn10300_TRUE@ $(mn10300_BUILT_SRC_FROM_IGEN) \ @SIM_ENABLE_ARCH_mn10300_TRUE@ mn10300/stamp-igen @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN = $(srcdir)/mn10300/mn10300.igen @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_INSN_INC = mn10300/am33.igen mn10300/am33-2.igen @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300_IGEN_DC = $(srcdir)/mn10300/mn10300.dc @SIM_ENABLE_ARCH_moxie_TRUE@dtbdir = $(datadir)/gdb/dtb @SIM_ENABLE_ARCH_moxie_TRUE@dtb_DATA = moxie/moxie-gdb.dtb @SIM_ENABLE_ARCH_or1k_TRUE@or1kdocdir = $(docdir)/or1k @SIM_ENABLE_ARCH_or1k_TRUE@or1kdoc_DATA = or1k/README @SIM_ENABLE_ARCH_or1k_TRUE@or1k_BUILD_OUTPUTS = \ @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/eng.h \ @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/mloop.c \ @SIM_ENABLE_ARCH_or1k_TRUE@ or1k/stamp-mloop @SIM_ENABLE_ARCH_ppc_TRUE@ppcdocdir = $(docdir)/ppc @SIM_ENABLE_ARCH_ppc_TRUE@ppcdoc_DATA = ppc/BUGS ppc/INSTALL ppc/README ppc/RUN @SIM_ENABLE_ARCH_rx_TRUE@rxdocdir = $(docdir)/rx @SIM_ENABLE_ARCH_rx_TRUE@rxdoc_DATA = rx/README.txt @SIM_ENABLE_ARCH_sh_TRUE@sh_BUILD_OUTPUTS = \ @SIM_ENABLE_ARCH_sh_TRUE@ sh/gencode$(EXEEXT) \ @SIM_ENABLE_ARCH_sh_TRUE@ sh/code.c \ @SIM_ENABLE_ARCH_sh_TRUE@ sh/ppi.c \ @SIM_ENABLE_ARCH_sh_TRUE@ sh/table.c @SIM_ENABLE_ARCH_sh_TRUE@sh_gencode_SOURCES = sh/gencode.c @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILT_SRC_FROM_IGEN = \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/icache.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/icache.c \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/idecode.c \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/semantics.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/semantics.c \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/model.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/model.c \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/support.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/support.c \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/itable.c \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.h \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/engine.c \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/irun.c @SIM_ENABLE_ARCH_v850_TRUE@v850_BUILD_OUTPUTS = \ @SIM_ENABLE_ARCH_v850_TRUE@ $(v850_BUILT_SRC_FROM_IGEN) \ @SIM_ENABLE_ARCH_v850_TRUE@ v850/stamp-igen @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_TRACE = # -G omit-line-numbers # -G trace-rule-selection -G trace-rule-rejection -G trace-entries @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_INSN = $(srcdir)/v850/v850.igen @SIM_ENABLE_ARCH_v850_TRUE@v850_IGEN_DC = $(srcdir)/v850/v850-dc all: config.h $(MAKE) $(AM_MAKEFLAGS) all-recursive .SUFFIXES: .SUFFIXES: .c .lo .log .o .obj .test .test$(EXEEXT) .trs am--refresh: Makefile @: $(srcdir)/Makefile.in: @MAINTAINER_MODE_TRUE@ $(srcdir)/Makefile.am $(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/arm/local.mk $(srcdir)/bpf/local.mk $(srcdir)/cr16/local.mk $(srcdir)/cris/local.mk $(srcdir)/d10v/local.mk $(srcdir)/erc32/local.mk $(srcdir)/frv/local.mk $(srcdir)/iq2000/local.mk $(srcdir)/lm32/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m32r/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/moxie/local.mk $(srcdir)/or1k/local.mk $(srcdir)/ppc/local.mk $(srcdir)/rx/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__configure_deps) @for dep in $?; do \ case '$(am__configure_deps)' in \ *$$dep*) \ echo ' cd $(srcdir) && $(AUTOMAKE) --foreign'; \ $(am__cd) $(srcdir) && $(AUTOMAKE) --foreign \ && exit 0; \ exit 1;; \ esac; \ done; \ echo ' cd $(top_srcdir) && $(AUTOMAKE) --foreign Makefile'; \ $(am__cd) $(top_srcdir) && \ $(AUTOMAKE) --foreign Makefile Makefile: $(srcdir)/Makefile.in $(top_builddir)/config.status @case '$?' in \ *config.status*) \ echo ' $(SHELL) ./config.status'; \ $(SHELL) ./config.status;; \ *) \ echo ' cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe)'; \ cd $(top_builddir) && $(SHELL) ./config.status $@ $(am__depfiles_maybe);; \ esac; $(srcdir)/common/local.mk $(srcdir)/igen/local.mk $(srcdir)/testsuite/local.mk $(srcdir)/testsuite/common/local.mk $(srcdir)/arm/local.mk $(srcdir)/bpf/local.mk $(srcdir)/cr16/local.mk $(srcdir)/cris/local.mk $(srcdir)/d10v/local.mk $(srcdir)/erc32/local.mk $(srcdir)/frv/local.mk $(srcdir)/iq2000/local.mk $(srcdir)/lm32/local.mk $(srcdir)/m32c/local.mk $(srcdir)/m32r/local.mk $(srcdir)/m68hc11/local.mk $(srcdir)/mn10300/local.mk $(srcdir)/moxie/local.mk $(srcdir)/or1k/local.mk $(srcdir)/ppc/local.mk $(srcdir)/rx/local.mk $(srcdir)/sh/local.mk $(srcdir)/v850/local.mk $(am__empty): $(top_builddir)/config.status: $(top_srcdir)/configure $(CONFIG_STATUS_DEPENDENCIES) $(SHELL) ./config.status --recheck $(top_srcdir)/configure: @MAINTAINER_MODE_TRUE@ $(am__configure_deps) $(am__cd) $(srcdir) && $(AUTOCONF) $(ACLOCAL_M4): @MAINTAINER_MODE_TRUE@ $(am__aclocal_m4_deps) $(am__cd) $(srcdir) && $(ACLOCAL) $(ACLOCAL_AMFLAGS) $(am__aclocal_m4_deps): config.h: stamp-h1 @test -f $@ || rm -f stamp-h1 @test -f $@ || $(MAKE) $(AM_MAKEFLAGS) stamp-h1 stamp-h1: $(srcdir)/config.h.in $(top_builddir)/config.status @rm -f stamp-h1 cd $(top_builddir) && $(SHELL) ./config.status config.h $(srcdir)/config.h.in: @MAINTAINER_MODE_TRUE@ $(am__configure_deps) ($(am__cd) $(top_srcdir) && $(AUTOHEADER)) rm -f stamp-h1 touch $@ distclean-hdr: -rm -f config.h stamp-h1 Make-common.sim: $(top_builddir)/config.status $(top_srcdir)/common/Make-common.in cd $(top_builddir) && $(SHELL) ./config.status $@ aarch64/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ aarch64/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/aarch64/Makefile.in cd $(top_builddir) && $(SHELL) ./config.status $@ arm/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ arm/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/arm/Makefile.in cd $(top_builddir) && $(SHELL) ./config.status $@ avr/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ avr/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/avr/Makefile.in cd $(top_builddir) && $(SHELL) ./config.status $@ bfin/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ bfin/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/bfin/Makefile.in cd $(top_builddir) && $(SHELL) ./config.status $@ cr16/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ cr16/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/cr16/Makefile.in cd $(top_builddir) && $(SHELL) ./config.status $@ cris/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ cris/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/cris/Makefile.in cd $(top_builddir) && $(SHELL) ./config.status $@ d10v/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ d10v/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/d10v/Makefile.in cd $(top_builddir) && $(SHELL) ./config.status $@ frv/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ frv/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/frv/Makefile.in cd $(top_builddir) && $(SHELL) ./config.status $@ ft32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ ft32/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/ft32/Makefile.in cd $(top_builddir) && $(SHELL) ./config.status $@ h8300/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ h8300/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/h8300/Makefile.in cd $(top_builddir) && $(SHELL) ./config.status $@ iq2000/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ iq2000/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/iq2000/Makefile.in cd $(top_builddir) && $(SHELL) ./config.status $@ lm32/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ lm32/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/lm32/Makefile.in cd $(top_builddir) && $(SHELL) ./config.status $@ m32c/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ m32c/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/m32c/Makefile.in cd $(top_builddir) && $(SHELL) ./config.status $@ m32r/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in cd $(top_builddir) && $(SHELL) ./config.status $@ m32r/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/m32r/Makefile.in cd $(top_builddir) && $(SHELL) ./config.status $@ m68hc11/.gdbinit: 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Override the default rules for it. @SIM_ENABLE_ARCH_d10v_TRUE@d10v/gencode.o: d10v/gencode.c @SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@ @SIM_ENABLE_ARCH_d10v_TRUE@d10v/d10v-opc.o: ../opcodes/d10v-opc.c @SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@ @SIM_ENABLE_ARCH_d10v_TRUE@d10v/simops.h: d10v/gencode$(EXEEXT) @SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_GEN)$< -h >$@ @SIM_ENABLE_ARCH_d10v_TRUE@d10v/table.c: d10v/gencode$(EXEEXT) @SIM_ENABLE_ARCH_d10v_TRUE@ $(AM_V_GEN)$< >$@ @SIM_ENABLE_ARCH_frv_TRUE@frv/mloop.c frv/eng.h: frv/stamp-mloop ; @true @SIM_ENABLE_ARCH_frv_TRUE@frv/stamp-mloop: $(srccom)/genmloop.sh frv/mloop.in @SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \ @SIM_ENABLE_ARCH_frv_TRUE@ -mono -scache -parallel-generic-write -parallel-only \ @SIM_ENABLE_ARCH_frv_TRUE@ -cpu frvbf \ @SIM_ENABLE_ARCH_frv_TRUE@ -infile $(srcdir)/frv/mloop.in -outfile-prefix frv/ @SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change frv/eng.hin frv/eng.h @SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change frv/mloop.cin frv/mloop.c @SIM_ENABLE_ARCH_frv_TRUE@ $(AM_V_at)touch $@ @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/mloop.c iq2000/eng.h: iq2000/stamp-mloop ; @true @SIM_ENABLE_ARCH_iq2000_TRUE@iq2000/stamp-mloop: $(srccom)/genmloop.sh iq2000/mloop.in @SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \ @SIM_ENABLE_ARCH_iq2000_TRUE@ -mono -fast -pbb -switch sem-switch.c \ @SIM_ENABLE_ARCH_iq2000_TRUE@ -cpu iq2000bf \ @SIM_ENABLE_ARCH_iq2000_TRUE@ -infile $(srcdir)/iq2000/mloop.in -outfile-prefix iq2000/ @SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/eng.hin iq2000/eng.h @SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change iq2000/mloop.cin iq2000/mloop.c @SIM_ENABLE_ARCH_iq2000_TRUE@ $(AM_V_at)touch $@ @SIM_ENABLE_ARCH_lm32_TRUE@lm32/mloop.c lm32/eng.h: lm32/stamp-mloop ; @true @SIM_ENABLE_ARCH_lm32_TRUE@lm32/stamp-mloop: $(srccom)/genmloop.sh lm32/mloop.in @SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \ @SIM_ENABLE_ARCH_lm32_TRUE@ -mono -fast -pbb -switch sem-switch.c \ @SIM_ENABLE_ARCH_lm32_TRUE@ -cpu lm32bf \ @SIM_ENABLE_ARCH_lm32_TRUE@ -infile $(srcdir)/lm32/mloop.in -outfile-prefix lm32/ @SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/eng.hin lm32/eng.h @SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change lm32/mloop.cin lm32/mloop.c @SIM_ENABLE_ARCH_lm32_TRUE@ $(AM_V_at)touch $@ # These rules are copied from automake, but tweaked to use FOR_BUILD variables. @SIM_ENABLE_ARCH_m32c_TRUE@m32c/opc2c$(EXEEXT): $(m32c_opc2c_OBJECTS) $(m32c_opc2c_DEPENDENCIES) m32c/$(am__dirstamp) @SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(m32c_opc2c_OBJECTS) $(m32c_opc2c_LDADD) # opc2c is a build-time only tool. Override the default rules for it. @SIM_ENABLE_ARCH_m32c_TRUE@m32c/opc2c.o: m32c/opc2c.c @SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@ @SIM_ENABLE_ARCH_m32c_TRUE@m32c/m32c.c: m32c/m32c.opc m32c/opc2c$(EXEEXT) @SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_GEN)$(m32c_OPC2C_RUN) -l $@.log $< > $@.tmp @SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_at)mv $@.tmp $@ @SIM_ENABLE_ARCH_m32c_TRUE@m32c/r8c.c: m32c/r8c.opc m32c/opc2c$(EXEEXT) @SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_GEN)$(m32c_OPC2C_RUN) -l $@.log $< > $@.tmp @SIM_ENABLE_ARCH_m32c_TRUE@ $(AM_V_at)mv $@.tmp $@ @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop.c m32r/eng.h: m32r/stamp-mloop ; @true @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop: $(srccom)/genmloop.sh m32r/mloop.in @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \ @SIM_ENABLE_ARCH_m32r_TRUE@ -mono -fast -pbb -switch sem-switch.c \ @SIM_ENABLE_ARCH_m32r_TRUE@ -cpu m32rbf \ @SIM_ENABLE_ARCH_m32r_TRUE@ -infile $(srcdir)/m32r/mloop.in -outfile-prefix m32r/ @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/eng.hin m32r/eng.h @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop.cin m32r/mloop.c @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)touch $@ @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloopx.c m32r/engx.h: m32r/stamp-mloop ; @true @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop-x: $(srccom)/genmloop.sh m32r/mloop.in @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \ @SIM_ENABLE_ARCH_m32r_TRUE@ -mono -no-fast -pbb -parallel-write -switch semx-switch.c \ @SIM_ENABLE_ARCH_m32r_TRUE@ -cpu m32rxf \ @SIM_ENABLE_ARCH_m32r_TRUE@ -infile $(srcdir)/m32r/mloopx.in -outfile-prefix m32r/ -outfile-suffix x @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/engx.hin m32r/engx.h @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloopx.cin m32r/mloopx.c @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)touch $@ @SIM_ENABLE_ARCH_m32r_TRUE@m32r/mloop2.c m32r/eng2.h: m32r/stamp-mloop ; @true @SIM_ENABLE_ARCH_m32r_TRUE@m32r/stamp-mloop-2: $(srccom)/genmloop.sh m32r/mloop.in @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \ @SIM_ENABLE_ARCH_m32r_TRUE@ -mono -no-fast -pbb -parallel-write -switch sem2-switch.c \ @SIM_ENABLE_ARCH_m32r_TRUE@ -cpu m32r2f \ @SIM_ENABLE_ARCH_m32r_TRUE@ -infile $(srcdir)/m32r/mloop2.in -outfile-prefix m32r/ -outfile-suffix 2 @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/eng2.hin m32r/eng2.h @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change m32r/mloop2.cin m32r/mloop2.c @SIM_ENABLE_ARCH_m32r_TRUE@ $(AM_V_at)touch $@ # These rules are copied from automake, but tweaked to use FOR_BUILD variables. @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode$(EXEEXT): $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_DEPENDENCIES) m68hc11/$(am__dirstamp) @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(m68hc11_gencode_OBJECTS) $(m68hc11_gencode_LDADD) # gencode is a build-time only tool. Override the default rules for it. @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/gencode.o: m68hc11/gencode.c @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@ @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/m68hc11int.c: m68hc11/gencode$(EXEEXT) @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_GEN)$< -m6811 >$@ @SIM_ENABLE_ARCH_m68hc11_TRUE@m68hc11/m68hc12int.c: m68hc11/gencode$(EXEEXT) @SIM_ENABLE_ARCH_m68hc11_TRUE@ $(AM_V_GEN)$< -m6812 >$@ @SIM_ENABLE_ARCH_mn10300_TRUE@$(mn10300_BUILT_SRC_FROM_IGEN): mn10300/stamp-igen @SIM_ENABLE_ARCH_mn10300_TRUE@mn10300/stamp-igen: $(mn10300_IGEN_INSN) $(mn10300_IGEN_INSN_INC) $(mn10300_IGEN_DC) $(IGEN) @SIM_ENABLE_ARCH_mn10300_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \ @SIM_ENABLE_ARCH_mn10300_TRUE@ $(mn10300_IGEN_TRACE) \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -G gen-direct-access \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -M mn10300,am33 -G gen-multi-sim=am33 \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -M am33_2 \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -I $(srcdir)/mn10300 \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -i $(mn10300_IGEN_INSN) \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -o $(mn10300_IGEN_DC) \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -x \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -n icache.h -hc mn10300/tmp-icache.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -n icache.c -c mn10300/tmp-icache.c \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -n semantics.h -hs mn10300/tmp-semantics.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -n semantics.c -s mn10300/tmp-semantics.c \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -n idecode.h -hd mn10300/tmp-idecode.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -n idecode.c -d mn10300/tmp-idecode.c \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -n model.h -hm mn10300/tmp-model.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -n model.c -m mn10300/tmp-model.c \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -n support.h -hf mn10300/tmp-support.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -n support.c -f mn10300/tmp-support.c \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -n itable.h -ht mn10300/tmp-itable.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -n itable.c -t mn10300/tmp-itable.c \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -n engine.h -he mn10300/tmp-engine.h \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -n engine.c -e mn10300/tmp-engine.c \ @SIM_ENABLE_ARCH_mn10300_TRUE@ -n irun.c -r mn10300/tmp-irun.c @SIM_ENABLE_ARCH_mn10300_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change mn10300/tmp-icache.h mn10300/icache.h @SIM_ENABLE_ARCH_mn10300_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change mn10300/tmp-icache.c mn10300/icache.c @SIM_ENABLE_ARCH_mn10300_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change mn10300/tmp-idecode.h mn10300/idecode.h @SIM_ENABLE_ARCH_mn10300_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change mn10300/tmp-idecode.c mn10300/idecode.c @SIM_ENABLE_ARCH_mn10300_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change mn10300/tmp-semantics.h mn10300/semantics.h @SIM_ENABLE_ARCH_mn10300_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change mn10300/tmp-semantics.c mn10300/semantics.c @SIM_ENABLE_ARCH_mn10300_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change mn10300/tmp-model.h mn10300/model.h @SIM_ENABLE_ARCH_mn10300_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change mn10300/tmp-model.c mn10300/model.c @SIM_ENABLE_ARCH_mn10300_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change mn10300/tmp-support.h mn10300/support.h @SIM_ENABLE_ARCH_mn10300_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change mn10300/tmp-support.c mn10300/support.c @SIM_ENABLE_ARCH_mn10300_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change mn10300/tmp-itable.h mn10300/itable.h @SIM_ENABLE_ARCH_mn10300_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change mn10300/tmp-itable.c mn10300/itable.c @SIM_ENABLE_ARCH_mn10300_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change mn10300/tmp-engine.h mn10300/engine.h @SIM_ENABLE_ARCH_mn10300_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change mn10300/tmp-engine.c mn10300/engine.c @SIM_ENABLE_ARCH_mn10300_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change mn10300/tmp-irun.c mn10300/irun.c @SIM_ENABLE_ARCH_mn10300_TRUE@ $(AM_V_at)touch $@ @SIM_ENABLE_ARCH_moxie_TRUE@moxie/moxie-gdb.dtb: @MAINT@ moxie/moxie-gdb.dts moxie/$(am__dirstamp) @SIM_ENABLE_ARCH_moxie_TRUE@ $(AM_V_GEN) \ @SIM_ENABLE_ARCH_moxie_TRUE@ if test "x$(DTC)" != x; then \ @SIM_ENABLE_ARCH_moxie_TRUE@ $(DTC) -O dtb -o $@.tmp ${srcdir}/moxie/moxie-gdb.dts || exit 1; \ @SIM_ENABLE_ARCH_moxie_TRUE@ $(SHELL) $(srcroot)/move-if-change $@.tmp ${srcdir}/moxie/moxie-gdb.dtb || exit 1; \ @SIM_ENABLE_ARCH_moxie_TRUE@ touch ${srcdir}/moxie/moxie-gdb.dtb; \ @SIM_ENABLE_ARCH_moxie_TRUE@ else \ @SIM_ENABLE_ARCH_moxie_TRUE@ echo "Could not update the moxie-gdb.dtb file because the device "; \ @SIM_ENABLE_ARCH_moxie_TRUE@ echo "tree compiler tool (dtc) is missing. Install the tool to "; \ @SIM_ENABLE_ARCH_moxie_TRUE@ echo "update the device tree blob."; \ @SIM_ENABLE_ARCH_moxie_TRUE@ fi # Rule to create the .dirstamp file (on which moxie-gdb.dtb depends) # as automake fails to automatically create this rule for _DATA items. @SIM_ENABLE_ARCH_moxie_TRUE@moxie/$(am__dirstamp): @SIM_ENABLE_ARCH_moxie_TRUE@ @$(MKDIR_P) moxie @SIM_ENABLE_ARCH_moxie_TRUE@ @: >moxie/$(am__dirstamp) @SIM_ENABLE_ARCH_or1k_TRUE@or1k/mloop.c or1k/eng.h: or1k/stamp-mloop ; @true @SIM_ENABLE_ARCH_or1k_TRUE@or1k/stamp-mloop: $(srccom)/genmloop.sh or1k/mloop.in @SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_GEN)$(SHELL) $(srccom)/genmloop.sh -shell $(SHELL) \ @SIM_ENABLE_ARCH_or1k_TRUE@ -mono -fast -pbb -switch sem-switch.c \ @SIM_ENABLE_ARCH_or1k_TRUE@ -cpu or1k32bf \ @SIM_ENABLE_ARCH_or1k_TRUE@ -infile $(srcdir)/or1k/mloop.in -outfile-prefix or1k/ @SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/eng.hin or1k/eng.h @SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change or1k/mloop.cin or1k/mloop.c @SIM_ENABLE_ARCH_or1k_TRUE@ $(AM_V_at)touch $@ # These rules are copied from automake, but tweaked to use FOR_BUILD variables. @SIM_ENABLE_ARCH_sh_TRUE@sh/gencode$(EXEEXT): $(sh_gencode_OBJECTS) $(sh_gencode_DEPENDENCIES) sh/$(am__dirstamp) @SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_CCLD)$(LINK_FOR_BUILD) $(sh_gencode_OBJECTS) $(sh_gencode_LDADD) # gencode is a build-time only tool. Override the default rules for it. @SIM_ENABLE_ARCH_sh_TRUE@sh/gencode.o: sh/gencode.c @SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_CC)$(COMPILE_FOR_BUILD) -c $< -o $@ @SIM_ENABLE_ARCH_sh_TRUE@sh/code.c: sh/gencode$(EXEEXT) @SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_GEN)$< -x >$@ @SIM_ENABLE_ARCH_sh_TRUE@sh/ppi.c: sh/gencode$(EXEEXT) @SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_GEN)$< -p >$@ @SIM_ENABLE_ARCH_sh_TRUE@sh/table.c: sh/gencode$(EXEEXT) @SIM_ENABLE_ARCH_sh_TRUE@ $(AM_V_GEN)$< -s >$@ @SIM_ENABLE_ARCH_v850_TRUE@$(v850_BUILT_SRC_FROM_IGEN): v850/stamp-igen @SIM_ENABLE_ARCH_v850_TRUE@v850/stamp-igen: $(v850_IGEN_INSN) $(v850_IGEN_DC) $(IGEN) @SIM_ENABLE_ARCH_v850_TRUE@ $(AM_V_GEN)$(IGEN_RUN) \ @SIM_ENABLE_ARCH_v850_TRUE@ $(v850_IGEN_TRACE) \ @SIM_ENABLE_ARCH_v850_TRUE@ -G gen-direct-access \ @SIM_ENABLE_ARCH_v850_TRUE@ -G gen-zero-r0 \ @SIM_ENABLE_ARCH_v850_TRUE@ -i $(v850_IGEN_INSN) \ @SIM_ENABLE_ARCH_v850_TRUE@ -o $(v850_IGEN_DC) \ @SIM_ENABLE_ARCH_v850_TRUE@ -x \ @SIM_ENABLE_ARCH_v850_TRUE@ -n icache.h -hc v850/tmp-icache.h \ @SIM_ENABLE_ARCH_v850_TRUE@ -n icache.c -c v850/tmp-icache.c \ @SIM_ENABLE_ARCH_v850_TRUE@ -n semantics.h -hs v850/tmp-semantics.h \ @SIM_ENABLE_ARCH_v850_TRUE@ -n semantics.c -s v850/tmp-semantics.c \ @SIM_ENABLE_ARCH_v850_TRUE@ -n idecode.h -hd v850/tmp-idecode.h \ @SIM_ENABLE_ARCH_v850_TRUE@ -n idecode.c -d v850/tmp-idecode.c \ @SIM_ENABLE_ARCH_v850_TRUE@ -n model.h -hm v850/tmp-model.h \ @SIM_ENABLE_ARCH_v850_TRUE@ -n model.c -m v850/tmp-model.c \ @SIM_ENABLE_ARCH_v850_TRUE@ -n support.h -hf v850/tmp-support.h \ @SIM_ENABLE_ARCH_v850_TRUE@ -n support.c -f v850/tmp-support.c \ @SIM_ENABLE_ARCH_v850_TRUE@ -n itable.h -ht v850/tmp-itable.h \ @SIM_ENABLE_ARCH_v850_TRUE@ -n itable.c -t v850/tmp-itable.c \ @SIM_ENABLE_ARCH_v850_TRUE@ -n engine.h -he v850/tmp-engine.h \ @SIM_ENABLE_ARCH_v850_TRUE@ -n engine.c -e v850/tmp-engine.c \ @SIM_ENABLE_ARCH_v850_TRUE@ -n irun.c -r v850/tmp-irun.c @SIM_ENABLE_ARCH_v850_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change v850/tmp-icache.h v850/icache.h @SIM_ENABLE_ARCH_v850_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change v850/tmp-icache.c v850/icache.c @SIM_ENABLE_ARCH_v850_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change v850/tmp-idecode.h v850/idecode.h @SIM_ENABLE_ARCH_v850_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change v850/tmp-idecode.c v850/idecode.c @SIM_ENABLE_ARCH_v850_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change v850/tmp-semantics.h v850/semantics.h @SIM_ENABLE_ARCH_v850_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change v850/tmp-semantics.c v850/semantics.c @SIM_ENABLE_ARCH_v850_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change v850/tmp-model.h v850/model.h @SIM_ENABLE_ARCH_v850_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change v850/tmp-model.c v850/model.c @SIM_ENABLE_ARCH_v850_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change v850/tmp-support.h v850/support.h @SIM_ENABLE_ARCH_v850_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change v850/tmp-support.c v850/support.c @SIM_ENABLE_ARCH_v850_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change v850/tmp-itable.h v850/itable.h @SIM_ENABLE_ARCH_v850_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change v850/tmp-itable.c v850/itable.c @SIM_ENABLE_ARCH_v850_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change v850/tmp-engine.h v850/engine.h @SIM_ENABLE_ARCH_v850_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change v850/tmp-engine.c v850/engine.c @SIM_ENABLE_ARCH_v850_TRUE@ $(AM_V_at)$(SHELL) $(srcroot)/move-if-change v850/tmp-irun.c v850/irun.c @SIM_ENABLE_ARCH_v850_TRUE@ $(AM_V_at)touch $@ all-recursive: $(SIM_ALL_RECURSIVE_DEPS) # Tell versions [3.59,3.63) of GNU make to not export all variables. # Otherwise a system limit (for SysV at least) may be exceeded. .NOEXPORT: