From be2f8fcd9df7d50fd17125eccecf7fc0bad6b2c8 Mon Sep 17 00:00:00 2001
From: Jan Beulich <jbeulich@suse.com>
Date: Thu, 22 Jul 2021 13:02:08 +0200
Subject: x86: correct VCVT{,U}SI2SD rounding mode handling

With EVEX.W clear the instruction doesn't ignore the rounding mode, but
(like for other insns without rounding semantics) EVEX.b set causes #UD.
Hence the handling of EVEX.W needs to be done when processing
evex_rounding_64_mode, not at the decode stages.

Derive a new 64-bit testcase from the 32-bit one to cover the different
EVEX.W treatment in both cases.
---
 opcodes/i386-dis-evex-prefix.h |  4 ++--
 opcodes/i386-dis-evex-w.h      | 10 ----------
 opcodes/i386-dis.c             |  4 +---
 3 files changed, 3 insertions(+), 15 deletions(-)

(limited to 'opcodes')

diff --git a/opcodes/i386-dis-evex-prefix.h b/opcodes/i386-dis-evex-prefix.h
index 2ed8f67..9ad9372 100644
--- a/opcodes/i386-dis-evex-prefix.h
+++ b/opcodes/i386-dis-evex-prefix.h
@@ -30,7 +30,7 @@
     { Bad_Opcode },
     { "vcvtsi2ss{%LQ|}",	{ XMScalar, VexScalar, EXxEVexR, Edq }, 0 },
     { Bad_Opcode },
-    { VEX_W_TABLE (EVEX_W_0F2A_P_3) },
+    { "vcvtsi2sd{%LQ|}",	{ XMScalar, VexScalar, EXxEVexR64, Edq }, 0 },
   },
   /* PREFIX_EVEX_0F51 */
   {
@@ -134,7 +134,7 @@
     { Bad_Opcode },
     { "vcvtusi2ss{%LQ|}",	{ XMScalar, VexScalar, EXxEVexR, Edq }, 0 },
     { VEX_W_TABLE (EVEX_W_0F7B_P_2) },
-    { VEX_W_TABLE (EVEX_W_0F7B_P_3) },
+    { "vcvtusi2sd{%LQ|}",	{ XMScalar, VexScalar, EXxEVexR64, Edq }, 0 },
   },
   /* PREFIX_EVEX_0F7E */
   {
diff --git a/opcodes/i386-dis-evex-w.h b/opcodes/i386-dis-evex-w.h
index 2c7d9bc..8af4695 100644
--- a/opcodes/i386-dis-evex-w.h
+++ b/opcodes/i386-dis-evex-w.h
@@ -37,11 +37,6 @@
   {
     { "vmovshdup",	{ XM, EXx }, 0 },
   },
-  /* EVEX_W_0F2A_P_3 */
-  {
-    { "vcvtsi2sd{%LQ|}",	{ XMScalar, VexScalar, Ed }, 0 },
-    { "vcvtsi2sd{%LQ|}",	{ XMScalar, VexScalar, EXxEVexR64, Edq }, 0 },
-  },
   /* EVEX_W_0F51_P_1 */
   {
     { "vsqrtss",	{ XMScalar, VexScalar, EXxmm_md, EXxEVexR }, 0 },
@@ -243,11 +238,6 @@
     { "vcvtps2qq",	{ XM, EXEvexHalfBcstXmmq, EXxEVexR }, 0 },
     { "vcvtpd2qq",	{ XM, EXx, EXxEVexR }, 0 },
   },
-  /* EVEX_W_0F7B_P_3 */
-  {
-    { "vcvtusi2sd{%LQ|}",	{ XMScalar, VexScalar, Ed }, 0 },
-    { "vcvtusi2sd{%LQ|}",	{ XMScalar, VexScalar, EXxEVexR64, Edq }, 0 },
-  },
   /* EVEX_W_0F7E_P_1 */
   {
     { Bad_Opcode },
diff --git a/opcodes/i386-dis.c b/opcodes/i386-dis.c
index f88276c..ccc49ff 100644
--- a/opcodes/i386-dis.c
+++ b/opcodes/i386-dis.c
@@ -1476,7 +1476,6 @@ enum
   EVEX_W_0F12_P_3,
   EVEX_W_0F16_P_0_M_1,
   EVEX_W_0F16_P_1,
-  EVEX_W_0F2A_P_3,
   EVEX_W_0F51_P_1,
   EVEX_W_0F51_P_3,
   EVEX_W_0F58_P_1,
@@ -1521,7 +1520,6 @@ enum
   EVEX_W_0F7A_P_2,
   EVEX_W_0F7A_P_3,
   EVEX_W_0F7B_P_2,
-  EVEX_W_0F7B_P_3,
   EVEX_W_0F7E_P_1,
   EVEX_W_0F7F_P_1,
   EVEX_W_0F7F_P_2,
@@ -13724,7 +13722,7 @@ OP_Rounding (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
     switch (bytemode)
       {
       case evex_rounding_64_mode:
-	if (address_mode != mode_64bit)
+	if (address_mode != mode_64bit || !vex.w)
 	  {
 	    oappend ("(bad)");
 	    break;
-- 
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