From bdfa8b951ba38b15487eab2a754b9a33b9f29634 Mon Sep 17 00:00:00 2001 From: Matthew Wahab Date: Tue, 16 Jun 2015 14:15:54 +0100 Subject: [AArch64] Support id_mmfr4 system register 2015-06-16 Matthew Wahab opcodes/ * aarch64-opc.c (aarch64_sys_regs): Add "id_mmfr4_el1". gas/testsuite * sysreg.d: Add id_mmfr4_el1, update expected output. * sysreg.s: Add id_mmfr4_el1. --- opcodes/ChangeLog | 4 ++++ opcodes/aarch64-opc.c | 1 + 2 files changed, 5 insertions(+) (limited to 'opcodes') diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index fe9134d..d76ad3b 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,7 @@ +2015-06-16 Matthew Wahab + + * arch64-opc.c (aarch64_sys_regs): Add "id_mmfr4_el1". + 2015-06-16 Szabolcs Nagy * arm-dis.c (print_insn_coprocessor): Avoid negative shift. diff --git a/opcodes/aarch64-opc.c b/opcodes/aarch64-opc.c index 5c7ef86..9880142 100644 --- a/opcodes/aarch64-opc.c +++ b/opcodes/aarch64-opc.c @@ -2772,6 +2772,7 @@ const aarch64_sys_reg aarch64_sys_regs [] = { "id_mmfr1_el1", CPENC(3,0,C0,C1,5), 0 }, /* RO */ { "id_mmfr2_el1", CPENC(3,0,C0,C1,6), 0 }, /* RO */ { "id_mmfr3_el1", CPENC(3,0,C0,C1,7), 0 }, /* RO */ + { "id_mmfr4_el1", CPENC(3,0,C0,C2,6), 0 }, /* RO */ { "id_isar0_el1", CPENC(3,0,C0,C2,0), 0 }, /* RO */ { "id_isar1_el1", CPENC(3,0,C0,C2,1), 0 }, /* RO */ { "id_isar2_el1", CPENC(3,0,C0,C2,2), 0 }, /* RO */ -- cgit v1.1