From 4fc808ae2a3dee6a791c2a90b25db9c7a3790563 Mon Sep 17 00:00:00 2001 From: Andrew Burgess Date: Tue, 28 Feb 2023 21:40:17 +0000 Subject: opcodes/arm: adjust whitespace in cpsie instruction While I was working on the disassembler styling for ARM I noticed that the whitespace in the cpsie instruction was inconsistent with most of the other ARM disassembly output, the disassembly for cpsie looks like this: cpsie if,#10 notice there's no space before the '#10' immediate, most other ARM instructions have a space before each operand. This commit updates the disassembler to add the missing space, and updates the tests I found that tested this instruction. --- opcodes/arm-dis.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) (limited to 'opcodes') diff --git a/opcodes/arm-dis.c b/opcodes/arm-dis.c index dffbad3..b71ab98 100644 --- a/opcodes/arm-dis.c +++ b/opcodes/arm-dis.c @@ -3828,11 +3828,11 @@ static const struct opcode32 arm_opcodes[] = {ARM_FEATURE_CORE_LOW (ARM_EXT_V6), 0xf1080000, 0xfffffe3f, "cpsie\t%{B:%8'a%7'i%6'f%}"}, {ARM_FEATURE_CORE_LOW (ARM_EXT_V6), - 0xf10a0000, 0xfffffe20, "cpsie\t%{B:%8'a%7'i%6'f%},%{I:#%0-4d%}"}, + 0xf10a0000, 0xfffffe20, "cpsie\t%{B:%8'a%7'i%6'f%}, %{I:#%0-4d%}"}, {ARM_FEATURE_CORE_LOW (ARM_EXT_V6), 0xf10C0000, 0xfffffe3f, "cpsid\t%{B:%8'a%7'i%6'f%}"}, {ARM_FEATURE_CORE_LOW (ARM_EXT_V6), - 0xf10e0000, 0xfffffe20, "cpsid\t%{B:%8'a%7'i%6'f%},%{I:#%0-4d%}"}, + 0xf10e0000, 0xfffffe20, "cpsid\t%{B:%8'a%7'i%6'f%}, %{I:#%0-4d%}"}, {ARM_FEATURE_CORE_LOW (ARM_EXT_V6), 0xf1000000, 0xfff1fe20, "cps\t%{I:#%0-4d%}"}, {ARM_FEATURE_CORE_LOW (ARM_EXT_V6), -- cgit v1.1