From 25982ee0222196381863a17dc135fc1d2763b385 Mon Sep 17 00:00:00 2001 From: Jim Wilson Date: Wed, 13 Dec 2017 14:59:42 -0800 Subject: Add missing RISC-V fsrmi and fsflagsi instructions. PR 22599 gas/ * testsuite/gas/riscv/fsxxi.d, testsuite/gas/riscv/fsxxi.s: New. opcodes/ * riscv-opc.c (riscv_opcodes) : New. --- opcodes/ChangeLog | 5 +++++ opcodes/riscv-opc.c | 4 ++++ 2 files changed, 9 insertions(+) (limited to 'opcodes') diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index 5e8ad9f..dbc29fa 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,8 @@ +2017-12-13 Jim Wilson + + PR 22599 + * riscv-opc.c (riscv_opcodes) : New. + 2017-12-13 Dimitar Dimitrov * disassemble.c: Enable disassembler_needs_relocs for PRU. diff --git a/opcodes/riscv-opc.c b/opcodes/riscv-opc.c index 84cdea8..10448da 100644 --- a/opcodes/riscv-opc.c +++ b/opcodes/riscv-opc.c @@ -440,9 +440,13 @@ const struct riscv_opcode riscv_opcodes[] = {"frrm", "F", "d", MATCH_FRRM, MASK_FRRM, match_opcode, 0 }, {"fsrm", "F", "s", MATCH_FSRM, MASK_FSRM | MASK_RD, match_opcode, 0 }, {"fsrm", "F", "d,s", MATCH_FSRM, MASK_FSRM, match_opcode, 0 }, +{"fsrmi", "F", "d,Z", MATCH_FSRMI, MASK_FSRMI, match_opcode, 0 }, +{"fsrmi", "F", "Z", MATCH_FSRMI, MASK_FSRMI | MASK_RD, match_opcode, 0 }, {"frflags", "F", "d", MATCH_FRFLAGS, MASK_FRFLAGS, match_opcode, 0 }, {"fsflags", "F", "s", MATCH_FSFLAGS, MASK_FSFLAGS | MASK_RD, match_opcode, 0 }, {"fsflags", "F", "d,s", MATCH_FSFLAGS, MASK_FSFLAGS, match_opcode, 0 }, +{"fsflagsi", "F", "d,Z", MATCH_FSFLAGSI, MASK_FSFLAGSI, match_opcode, 0 }, +{"fsflagsi", "F", "Z", MATCH_FSFLAGSI, MASK_FSFLAGSI | MASK_RD, match_opcode, 0 }, {"flw", "32C", "D,Cm(Cc)", MATCH_C_FLWSP, MASK_C_FLWSP, match_opcode, INSN_ALIAS }, {"flw", "32C", "CD,Ck(Cs)", MATCH_C_FLW, MASK_C_FLW, match_opcode, INSN_ALIAS }, {"flw", "F", "D,o(s)", MATCH_FLW, MASK_FLW, match_opcode, 0 }, -- cgit v1.1