From 8b082fb134d844804676e8a0f5ab08738952793c Mon Sep 17 00:00:00 2001
From: Thiemo Seufer <ths@networkno.de>
Date: Tue, 20 Feb 2007 13:28:56 +0000
Subject: 	[ gas/ChangeLog ] 	* config/tc-mips.c (mips_set_options,
 mips_opts, file_ase_dspr2, 	ISA_SUPPORTS_DSPR2_ASE, MIPS_CPU_ASE_DSPR2):
 Add DSP R2 ASE support. 	(macro_build): Add case '2'. 	(macro):
 Expand M_BALIGN to nop, packrl.ph or balign. 	(validate_mips_insn): Add
 support for balign instruction. 	(mips_ip): Handle DSP R2 instructions.
 Support balign instruction. 	(OPTION_DSPR2, OPTION_NO_DSPR2,
 OPTION_COMPAT_ARCH_BASE, 	md_parse_option, mips_after_parse_args): Add
 -mdspr2 and -mno-dspr2 	command line options. 	(s_mipsset): Add
 support for .set dspr2 and .set nodspr2 directives. 	(md_show_usage): Add
 -mdspr2 and -mno-dspr2 help output. 	* doc/c-mips.texi, doc/as.texinfo:
 Document -mdspr2, -mno-dspr2, 	.set dspr2, .set nodspr2.

	[ gas/testsuite/ChangeLog ]
	* gas/mips/mips32-dspr2.s, gas/mips/mips32-dspr2.d: New test for
	DSP R2.
	* gas/mips/mips.exp: Run new test.

	[ include/opcode/Changelog ]
	* mips.h (OP_SH_BP, OP_MASK_BP): Add support for balign instruction.
	(INSN_DSPR2): Add flag for DSP R2 instructions.
	(M_BALIGN): New macro.

	[ opcodes/ChangeLog ]
	* mips-dis.c (mips_arch_choices): Add DSP R2 support.
	(print_insn_args): Add support for balign instruction.
	* mips-opc.c (D33): New shortcut for DSP R2 instructions.
	(mips_builtin_opcodes): Add DSP R2 instructions.

	[ sim/mips/ChangeLog ]
	* Makefile.in (IGEN_INCLUDE): Add dsp2.igen.
	* configure.ac (mips*-sde-elf*, mipsisa32r2*-*-*, mipsisa64r2*-*-*):
	Add dsp2 to sim_igen_machine.
	* configure: Regenerate.
	* dsp.igen (do_ph_op): Add MUL support when op = 2.
	(do_ph_mulq): New function to support mulq_rs.ph and mulq_s.ph.
	(mulq_rs.ph): Use do_ph_mulq.
	(MFHI, MFLO, MTHI, MTLO): Move these instructions to mips.igen.
	* mips.igen: Add dsp2 model and include dsp2.igen.
	(MFHI, MFLO, MTHI, MTLO): Extend these instructions for
	for *mips32r2, *mips64r2, *dsp.
	(MADD, MADDU, MSUB, MSUBU, MULT, MULTU): Extend these instructions
	for *mips32r2, *mips64r2, *dsp2.
	* dsp2.igen: New file for MIPS DSP REV 2 ASE.

	[ sim/testsuite/sim/mips/ChangeLog ]
	* basic.exp: Run the dsp2 test.
	* utils-dsp.inc (dspckacc_astio, dspck_tsimm): New macro.
	* mips32-dsp2.s: New test.
---
 opcodes/mips-dis.c | 13 +++++++++----
 1 file changed, 9 insertions(+), 4 deletions(-)

(limited to 'opcodes/mips-dis.c')

diff --git a/opcodes/mips-dis.c b/opcodes/mips-dis.c
index 8af043c..fdeb9a8 100644
--- a/opcodes/mips-dis.c
+++ b/opcodes/mips-dis.c
@@ -400,8 +400,8 @@ const struct mips_arch_choice mips_arch_choices[] =
     mips_hwr_names_numeric },
 
   { "mips32r2",	1, bfd_mach_mipsisa32r2, CPU_MIPS32R2,
-    (ISA_MIPS32R2 | INSN_MIPS16 | INSN_SMARTMIPS | INSN_DSP | INSN_MIPS3D
-     | INSN_MT),
+    (ISA_MIPS32R2 | INSN_MIPS16 | INSN_SMARTMIPS | INSN_DSP | INSN_DSPR2
+     | INSN_MIPS3D | INSN_MT),
     mips_cp0_names_mips3264r2,
     mips_cp0sel_names_mips3264r2, ARRAY_SIZE (mips_cp0sel_names_mips3264r2),
     mips_hwr_names_mips3264r2 },
@@ -414,8 +414,8 @@ const struct mips_arch_choice mips_arch_choices[] =
     mips_hwr_names_numeric },
 
   { "mips64r2",	1, bfd_mach_mipsisa64r2, CPU_MIPS64R2,
-    (ISA_MIPS64R2 | INSN_MIPS16 | INSN_MIPS3D | INSN_DSP | INSN_DSP64
-     | INSN_MT | INSN_MDMX),
+    (ISA_MIPS64R2 | INSN_MIPS16 | INSN_MIPS3D | INSN_DSP | INSN_DSPR2
+     | INSN_DSP64 | INSN_MT | INSN_MDMX),
     mips_cp0_names_mips3264r2,
     mips_cp0sel_names_mips3264r2, ARRAY_SIZE (mips_cp0sel_names_mips3264r2),
     mips_hwr_names_mips3264r2 },
@@ -855,6 +855,11 @@ print_insn_args (const char *d,
 	    }
 	  break;
 
+	case '2':
+	  (*info->fprintf_func) (info->stream, "0x%lx",
+				 (l >> OP_SH_BP) & OP_MASK_BP);
+	  break;
+
 	case '3':
 	  (*info->fprintf_func) (info->stream, "0x%lx",
 				 (l >> OP_SH_SA3) & OP_MASK_SA3);
-- 
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