From cbd11b8818335007cf960e0cecc4dec445f80327 Mon Sep 17 00:00:00 2001 From: Richard Sandiford Date: Thu, 30 Mar 2023 11:09:12 +0100 Subject: aarch64: Add the SME2 ZT0 instructions SME2 adds lookup table instructions for quantisation. They use a new lookup table register called ZT0. LUTI2 takes an unsuffixed SVE vector index of the form Zn[], which is the first time that this syntax has been used. --- opcodes/aarch64-dis.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) (limited to 'opcodes/aarch64-dis.c') diff --git a/opcodes/aarch64-dis.c b/opcodes/aarch64-dis.c index a2f6918..0475adb 100644 --- a/opcodes/aarch64-dis.c +++ b/opcodes/aarch64-dis.c @@ -702,6 +702,8 @@ aarch64_ext_imm (const aarch64_operand *self, aarch64_opnd_info *info, if (operand_need_shift_by_two (self)) imm <<= 2; + else if (operand_need_shift_by_three (self)) + imm <<= 3; else if (operand_need_shift_by_four (self)) imm <<= 4; @@ -3072,6 +3074,19 @@ aarch64_decode_variant_using_iclass (aarch64_inst *inst) } break; + case sme_size_12_bhs: + variant = extract_field (FLD_SME_size_12, inst->value, 0); + if (variant >= 3) + return false; + break; + + case sme_size_12_hs: + variant = extract_field (FLD_SME_size_12, inst->value, 0); + if (variant != 1 && variant != 2) + return false; + variant -= 1; + break; + case sme_size_22: variant = extract_field (FLD_SME_size_22, inst->value, 0); break; -- cgit v1.1