From 27e411ef5db28b6cf591749ff81d3c5c8193f6cf Mon Sep 17 00:00:00 2001 From: Matthieu Longo Date: Wed, 19 Jun 2024 20:10:22 +0100 Subject: aarch64: add SPMU2 feature and its associated registers AArch64 defines new registers for the feature spmu2 (System Performance Monitors Extension version 2). spmu2 is an Armv9.5-A feature. This patch also adds relevant tests. Regression tested on aarch64-none-elf, and no regression found. --- include/opcode/aarch64.h | 3 +++ 1 file changed, 3 insertions(+) (limited to 'include/opcode') diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index 17c4ee9..4dc3019 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -222,6 +222,8 @@ enum aarch64_feature_bit { AARCH64_FEATURE_PMUv3_ICNTR, /* System Performance Monitors Extension */ AARCH64_FEATURE_SPMU, + /* System Performance Monitors Extension version 2 */ + AARCH64_FEATURE_SPMU2, /* Performance Monitors Synchronous-Exception-Based Event Extension. */ AARCH64_FEATURE_SEBEP, /* SVE2.1 and SME2.1 non-widening BFloat16 instructions. */ @@ -370,6 +372,7 @@ enum aarch64_feature_bit { | AARCH64_FEATBIT (X, LUT) \ | AARCH64_FEATBIT (X, FAMINMAX)\ | AARCH64_FEATBIT (X, E3DSE) \ + | AARCH64_FEATBIT (X, SPMU2) \ ) /* Architectures are the sum of the base and extensions. */ -- cgit v1.1