From aa881ecde48c7a0224b92e2cfa43b37ee9ec9fa2 Mon Sep 17 00:00:00 2001
From: Philipp Tomsich <prt@gnu.org>
Date: Thu, 7 Jan 2021 15:53:25 +0800
Subject: RISC-V: Add pause hint instruction.
Add support for the pause hint instruction, as specified in the
Zihintpause extension. The pause instruction is encoded as a
special form of a memory fence (which is available as part of the
base instruction set). The chosen encoding does not mandate any
particular memory ordering and therefore is a true hint.
bfd/
* elfxx-riscv.c (riscv_std_z_ext_strtab): Added zihintpause.
gas/
* config/tc-riscv.c (riscv_multi_subset_supports): Added
INSN_CLASS_ZIHINTPAUSE.
* testsuite/gas/riscv/pause.d: New testcase. Adding coverage for
the pause hint instruction.
* testsuite/gas/riscv/pause.s: Likewise.
include/
* opcode/riscv-opc.h: Added MATCH_PAUSE, MASK_PAUSE and DECLARE_INSN
for pause hint instruction.
* opcode/riscv.h (enum riscv_insn_class): Added INSN_CLASS_ZIHINTPAUSE.
opcodes/
* riscv-opc.c (riscv_opcodes): Add pause hint instruction.
---
include/opcode/riscv-opc.h | 3 +++
1 file changed, 3 insertions(+)
(limited to 'include/opcode/riscv-opc.h')
diff --git a/include/opcode/riscv-opc.h b/include/opcode/riscv-opc.h
index 7dbe830..38ce41d 100644
--- a/include/opcode/riscv-opc.h
+++ b/include/opcode/riscv-opc.h
@@ -157,6 +157,8 @@
#define MASK_SW 0x707f
#define MATCH_SD 0x3023
#define MASK_SD 0x707f
+#define MATCH_PAUSE 0x0100000f
+#define MASK_PAUSE 0xffffffff
#define MATCH_FENCE 0xf
#define MASK_FENCE 0x707f
#define MATCH_FENCE_I 0x100f
@@ -984,6 +986,7 @@ DECLARE_INSN(sb, MATCH_SB, MASK_SB)
DECLARE_INSN(sh, MATCH_SH, MASK_SH)
DECLARE_INSN(sw, MATCH_SW, MASK_SW)
DECLARE_INSN(sd, MATCH_SD, MASK_SD)
+DECLARE_INSN(pause, MATCH_PAUSE, MASK_PAUSE)
DECLARE_INSN(fence, MATCH_FENCE, MASK_FENCE)
DECLARE_INSN(fence_i, MATCH_FENCE_I, MASK_FENCE_I)
DECLARE_INSN(mul, MATCH_MUL, MASK_MUL)
--
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