From 657a50227bbd835c83aadc2405e649c4b982c241 Mon Sep 17 00:00:00 2001
From: Tiezhu Yang <yangtiezhu@loongson.cn>
Date: Tue, 12 Jul 2022 10:33:28 +0800
Subject: gdb: LoongArch: Add floating-point support

This commit adds floating-point support for LoongArch gdb.

Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
---
 gdb/features/Makefile          |  1 +
 gdb/features/loongarch/fpu.c   | 55 ++++++++++++++++++++++++++++++++++++++++++
 gdb/features/loongarch/fpu.xml | 50 ++++++++++++++++++++++++++++++++++++++
 3 files changed, 106 insertions(+)
 create mode 100644 gdb/features/loongarch/fpu.c
 create mode 100644 gdb/features/loongarch/fpu.xml

(limited to 'gdb/features')

diff --git a/gdb/features/Makefile b/gdb/features/Makefile
index 15d623c..061cb2e 100644
--- a/gdb/features/Makefile
+++ b/gdb/features/Makefile
@@ -231,6 +231,7 @@ FEATURE_XMLFILES = aarch64-core.xml \
 	i386/x32-core.xml \
 	loongarch/base32.xml \
 	loongarch/base64.xml \
+	loongarch/fpu.xml \
 	riscv/rv32e-xregs.xml \
 	riscv/32bit-cpu.xml \
 	riscv/32bit-fpu.xml \
diff --git a/gdb/features/loongarch/fpu.c b/gdb/features/loongarch/fpu.c
new file mode 100644
index 0000000..ea3e1dd
--- /dev/null
+++ b/gdb/features/loongarch/fpu.c
@@ -0,0 +1,55 @@
+/* THIS FILE IS GENERATED.  -*- buffer-read-only: t -*- vi:set ro:
+  Original: fpu.xml */
+
+#include "gdbsupport/tdesc.h"
+
+static int
+create_feature_loongarch_fpu (struct target_desc *result, long regnum)
+{
+  struct tdesc_feature *feature;
+
+  feature = tdesc_create_feature (result, "org.gnu.gdb.loongarch.fpu");
+  tdesc_type_with_fields *type_with_fields;
+  type_with_fields = tdesc_create_union (feature, "fputype");
+  tdesc_type *field_type;
+  field_type = tdesc_named_type (feature, "ieee_single");
+  tdesc_add_field (type_with_fields, "f", field_type);
+  field_type = tdesc_named_type (feature, "ieee_double");
+  tdesc_add_field (type_with_fields, "d", field_type);
+
+  tdesc_create_reg (feature, "f0", regnum++, 1, "float", 64, "fputype");
+  tdesc_create_reg (feature, "f1", regnum++, 1, "float", 64, "fputype");
+  tdesc_create_reg (feature, "f2", regnum++, 1, "float", 64, "fputype");
+  tdesc_create_reg (feature, "f3", regnum++, 1, "float", 64, "fputype");
+  tdesc_create_reg (feature, "f4", regnum++, 1, "float", 64, "fputype");
+  tdesc_create_reg (feature, "f5", regnum++, 1, "float", 64, "fputype");
+  tdesc_create_reg (feature, "f6", regnum++, 1, "float", 64, "fputype");
+  tdesc_create_reg (feature, "f7", regnum++, 1, "float", 64, "fputype");
+  tdesc_create_reg (feature, "f8", regnum++, 1, "float", 64, "fputype");
+  tdesc_create_reg (feature, "f9", regnum++, 1, "float", 64, "fputype");
+  tdesc_create_reg (feature, "f10", regnum++, 1, "float", 64, "fputype");
+  tdesc_create_reg (feature, "f11", regnum++, 1, "float", 64, "fputype");
+  tdesc_create_reg (feature, "f12", regnum++, 1, "float", 64, "fputype");
+  tdesc_create_reg (feature, "f13", regnum++, 1, "float", 64, "fputype");
+  tdesc_create_reg (feature, "f14", regnum++, 1, "float", 64, "fputype");
+  tdesc_create_reg (feature, "f15", regnum++, 1, "float", 64, "fputype");
+  tdesc_create_reg (feature, "f16", regnum++, 1, "float", 64, "fputype");
+  tdesc_create_reg (feature, "f17", regnum++, 1, "float", 64, "fputype");
+  tdesc_create_reg (feature, "f18", regnum++, 1, "float", 64, "fputype");
+  tdesc_create_reg (feature, "f19", regnum++, 1, "float", 64, "fputype");
+  tdesc_create_reg (feature, "f20", regnum++, 1, "float", 64, "fputype");
+  tdesc_create_reg (feature, "f21", regnum++, 1, "float", 64, "fputype");
+  tdesc_create_reg (feature, "f22", regnum++, 1, "float", 64, "fputype");
+  tdesc_create_reg (feature, "f23", regnum++, 1, "float", 64, "fputype");
+  tdesc_create_reg (feature, "f24", regnum++, 1, "float", 64, "fputype");
+  tdesc_create_reg (feature, "f25", regnum++, 1, "float", 64, "fputype");
+  tdesc_create_reg (feature, "f26", regnum++, 1, "float", 64, "fputype");
+  tdesc_create_reg (feature, "f27", regnum++, 1, "float", 64, "fputype");
+  tdesc_create_reg (feature, "f28", regnum++, 1, "float", 64, "fputype");
+  tdesc_create_reg (feature, "f29", regnum++, 1, "float", 64, "fputype");
+  tdesc_create_reg (feature, "f30", regnum++, 1, "float", 64, "fputype");
+  tdesc_create_reg (feature, "f31", regnum++, 1, "float", 64, "fputype");
+  tdesc_create_reg (feature, "fcc", regnum++, 1, "float", 64, "fputype");
+  tdesc_create_reg (feature, "fcsr", regnum++, 1, "float", 32, "uint32");
+  return regnum;
+}
diff --git a/gdb/features/loongarch/fpu.xml b/gdb/features/loongarch/fpu.xml
new file mode 100644
index 0000000..a61057e
--- /dev/null
+++ b/gdb/features/loongarch/fpu.xml
@@ -0,0 +1,50 @@
+<?xml version="1.0"?>
+<!-- Copyright (C) 2021 Free Software Foundation, Inc.
+
+     Copying and distribution of this file, with or without modification,
+     are permitted in any medium without royalty provided the copyright
+     notice and this notice are preserved.  -->
+
+<!DOCTYPE feature SYSTEM "gdb-target.dtd">
+<feature name="org.gnu.gdb.loongarch.fpu">
+
+  <union id="fputype">
+    <field name="f" type="ieee_single"/>
+    <field name="d" type="ieee_double"/>
+  </union>
+
+  <reg name="f0" bitsize="64" type="fputype" group="float"/>
+  <reg name="f1" bitsize="64" type="fputype" group="float"/>
+  <reg name="f2" bitsize="64" type="fputype" group="float"/>
+  <reg name="f3" bitsize="64" type="fputype" group="float"/>
+  <reg name="f4" bitsize="64" type="fputype" group="float"/>
+  <reg name="f5" bitsize="64" type="fputype" group="float"/>
+  <reg name="f6" bitsize="64" type="fputype" group="float"/>
+  <reg name="f7" bitsize="64" type="fputype" group="float"/>
+  <reg name="f8" bitsize="64" type="fputype" group="float"/>
+  <reg name="f9" bitsize="64" type="fputype" group="float"/>
+  <reg name="f10" bitsize="64" type="fputype" group="float"/>
+  <reg name="f11" bitsize="64" type="fputype" group="float"/>
+  <reg name="f12" bitsize="64" type="fputype" group="float"/>
+  <reg name="f13" bitsize="64" type="fputype" group="float"/>
+  <reg name="f14" bitsize="64" type="fputype" group="float"/>
+  <reg name="f15" bitsize="64" type="fputype" group="float"/>
+  <reg name="f16" bitsize="64" type="fputype" group="float"/>
+  <reg name="f17" bitsize="64" type="fputype" group="float"/>
+  <reg name="f18" bitsize="64" type="fputype" group="float"/>
+  <reg name="f19" bitsize="64" type="fputype" group="float"/>
+  <reg name="f20" bitsize="64" type="fputype" group="float"/>
+  <reg name="f21" bitsize="64" type="fputype" group="float"/>
+  <reg name="f22" bitsize="64" type="fputype" group="float"/>
+  <reg name="f23" bitsize="64" type="fputype" group="float"/>
+  <reg name="f24" bitsize="64" type="fputype" group="float"/>
+  <reg name="f25" bitsize="64" type="fputype" group="float"/>
+  <reg name="f26" bitsize="64" type="fputype" group="float"/>
+  <reg name="f27" bitsize="64" type="fputype" group="float"/>
+  <reg name="f28" bitsize="64" type="fputype" group="float"/>
+  <reg name="f29" bitsize="64" type="fputype" group="float"/>
+  <reg name="f30" bitsize="64" type="fputype" group="float"/>
+  <reg name="f31" bitsize="64" type="fputype" group="float"/>
+  <reg name="fcc" bitsize="64" type="fputype" group="float"/>
+  <reg name="fcsr" bitsize="32" type="uint32" group="float"/>
+</feature>
-- 
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