From 5990e377e5a339bce715fabfc3e45b24b459a7af Mon Sep 17 00:00:00 2001 From: Jan Beulich Date: Wed, 12 Feb 2020 16:19:03 +0100 Subject: x86-64: Intel64 adjustments for insns dealing with far pointers AMD and Intel differ in their handling of far indirect branches as well as LFS/LGS/LSS: AMD CPUs ignore REX.W while Intel ones honors it. (Note how the latter three were hybrids so far, while far branches were fully AMD-like.) --- gas/config/tc-i386-intel.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) (limited to 'gas/config/tc-i386-intel.c') diff --git a/gas/config/tc-i386-intel.c b/gas/config/tc-i386-intel.c index bb8d320..76fc997 100644 --- a/gas/config/tc-i386-intel.c +++ b/gas/config/tc-i386-intel.c @@ -694,9 +694,11 @@ i386_intel_operand (char *operand_string, int got_a_float) if (got_a_float == 1) suffix = LONG_DOUBLE_MNEM_SUFFIX; else if ((current_templates->start->operand_types[0].bitfield.fword - || current_templates->start->operand_types[0].bitfield.tbyte) + || current_templates->start->operand_types[0].bitfield.tbyte + || current_templates->start->opcode_modifier.jump == JUMP_DWORD + || current_templates->start->opcode_modifier.jump == JUMP) && flag_code == CODE_64BIT) - suffix = QWORD_MNEM_SUFFIX; /* l[fgs]s, [ls][gi]dt */ + suffix = QWORD_MNEM_SUFFIX; /* l[fgs]s, [ls][gi]dt, call, jmp */ else i.types[this_operand].bitfield.byte = 1; /* cause an error */ break; -- cgit v1.1