From 6b15ec516579f8005e97d58ec06b1c98debf947b Mon Sep 17 00:00:00 2001 From: Jan Beulich Date: Fri, 24 May 2024 12:21:57 +0200 Subject: x86: simplify VexVVVV_SRC2 handling for the XOP case As already suggested during review, rather than having an extra conditional in build_modrm_byte() (a code path used for quite a few more insns, including even certain GPR ones), adjust the attribute in the installed template to properly describe things with operands swapped. --- gas/config/tc-i386.c | 14 +++++--------- 1 file changed, 5 insertions(+), 9 deletions(-) diff --git a/gas/config/tc-i386.c b/gas/config/tc-i386.c index 69b2670..b1cc068 100644 --- a/gas/config/tc-i386.c +++ b/gas/config/tc-i386.c @@ -9264,6 +9264,9 @@ match_template (char mnem_suffix) flipping VEX.W. */ i.tm.opcode_modifier.vexw ^= VEXW0 ^ VEXW1; + /* In 3-operand insns XOP.W changes which operand goes into XOP.vvvv. */ + i.tm.opcode_modifier.vexvvvv = VexVVVV_SRC1; + swap_first_2: j = i.tm.operand_types[0].bitfield.imm8; i.tm.operand_types[j] = operand_types[j + 1]; @@ -10471,15 +10474,8 @@ build_modrm_byte (void) { /* VEX.vvvv encodes the last source register operand. */ case VexVVVV_SRC2: - if (source != op) - { - v = source++; - break; - } - /* For vprot*, vpshl*, and vpsha*, XOP.W controls the swapping of src1 - and src2, and it requires fall through when the operands are swapped. - */ - /* Fall through. */ + v = source++; + break; /* VEX.vvvv encodes the first source register operand. */ case VexVVVV_SRC1: v = dest - 1; -- cgit v1.1