From 44f85d2d790a151825fdff867128b15ae677f224 Mon Sep 17 00:00:00 2001 From: Matthieu Longo Date: Thu, 15 Feb 2024 14:39:43 +0000 Subject: aarch64: testsuite: move sysreg tests into sysreg sub-directory This patch moves the existing sysreg tests for AArch64 into a subdirectory (sysreg). The number of test files related to system registers grew relatively big with time and makes the browsing of those files difficult. Moreover, the difference of naming for the failure, working, and feature-specific scenarios causes the tests not to appear next to one another in the exploration tree when it is ordered alphabetically. --- .../gas/aarch64/armv8_8-a-sysregs-invalid.d | 1 - .../gas/aarch64/armv8_8-a-sysregs-invalid.l | 6 - .../gas/aarch64/armv8_8-a-sysregs-invalid.s | 8 - gas/testsuite/gas/aarch64/armv8_8-a-sysregs.d | 19 - gas/testsuite/gas/aarch64/armv8_8-a-sysregs.s | 12 - gas/testsuite/gas/aarch64/armv8_9-a-sysregs-bad.d | 3 - gas/testsuite/gas/aarch64/armv8_9-a-sysregs-bad.l | 126 - gas/testsuite/gas/aarch64/armv8_9-a-sysregs.d | 133 - gas/testsuite/gas/aarch64/armv8_9-a-sysregs.s | 157 - gas/testsuite/gas/aarch64/gcs-sysregs-bad.d | 3 - gas/testsuite/gas/aarch64/gcs-sysregs-bad.l | 21 - gas/testsuite/gas/aarch64/gcs-sysregs.d | 29 - gas/testsuite/gas/aarch64/gcs-sysregs.s | 20 - gas/testsuite/gas/aarch64/illegal-sysreg-2.d | 2 - gas/testsuite/gas/aarch64/illegal-sysreg-2.l | 2 - gas/testsuite/gas/aarch64/illegal-sysreg-2.s | 3 - gas/testsuite/gas/aarch64/illegal-sysreg-3.d | 3 - gas/testsuite/gas/aarch64/illegal-sysreg-3.l | 41 - gas/testsuite/gas/aarch64/illegal-sysreg-4.d | 3 - gas/testsuite/gas/aarch64/illegal-sysreg-4.l | 56 - gas/testsuite/gas/aarch64/illegal-sysreg-4b.d | 2 - gas/testsuite/gas/aarch64/illegal-sysreg-4b.l | 11 - gas/testsuite/gas/aarch64/illegal-sysreg-4b.s | 14 - gas/testsuite/gas/aarch64/illegal-sysreg-5.d | 3 - gas/testsuite/gas/aarch64/illegal-sysreg-5.l | 2 - gas/testsuite/gas/aarch64/illegal-sysreg-7.d | 2 - gas/testsuite/gas/aarch64/illegal-sysreg-7.l | 6 - gas/testsuite/gas/aarch64/illegal-sysreg-7.s | 8 - gas/testsuite/gas/aarch64/illegal-sysreg-8.d | 1 - gas/testsuite/gas/aarch64/illegal-sysreg-8.l | 377 -- gas/testsuite/gas/aarch64/illegal-sysreg-8.s | 127 - gas/testsuite/gas/aarch64/illegal-sysreg-8b.d | 1 - gas/testsuite/gas/aarch64/illegal-sysreg-8b.l | 59 - gas/testsuite/gas/aarch64/illegal-sysreg-8b.s | 51 - gas/testsuite/gas/aarch64/illegal-sysreg128.d | 2 - gas/testsuite/gas/aarch64/illegal-sysreg128.l | 11 - gas/testsuite/gas/aarch64/illegal-sysreg128.s | 8 - gas/testsuite/gas/aarch64/invalid-sysreg-assert.d | 3 - gas/testsuite/gas/aarch64/invalid-sysreg-assert.l | 2 - gas/testsuite/gas/aarch64/invalid-sysreg-assert.s | 2 - gas/testsuite/gas/aarch64/sme-sysreg-illegal.d | 3 - gas/testsuite/gas/aarch64/sme-sysreg-illegal.l | 3 - gas/testsuite/gas/aarch64/sme-sysreg-illegal.s | 3 - gas/testsuite/gas/aarch64/sme-sysreg.d | 29 - gas/testsuite/gas/aarch64/sme-sysreg.s | 23 - gas/testsuite/gas/aarch64/sve-sysreg-invalid.d | 3 - gas/testsuite/gas/aarch64/sve-sysreg-invalid.l | 19 - gas/testsuite/gas/aarch64/sve-sysreg.d | 27 - gas/testsuite/gas/aarch64/sve-sysreg.s | 22 - gas/testsuite/gas/aarch64/sysreg-1.d | 4295 -------------------- gas/testsuite/gas/aarch64/sysreg-1.s | 174 - gas/testsuite/gas/aarch64/sysreg-2.d | 60 - gas/testsuite/gas/aarch64/sysreg-2.s | 63 - gas/testsuite/gas/aarch64/sysreg-3.d | 28 - gas/testsuite/gas/aarch64/sysreg-3.s | 21 - gas/testsuite/gas/aarch64/sysreg-4.d | 59 - gas/testsuite/gas/aarch64/sysreg-4.s | 64 - gas/testsuite/gas/aarch64/sysreg-5.s | 1 - gas/testsuite/gas/aarch64/sysreg-6.d | 9 - gas/testsuite/gas/aarch64/sysreg-6.s | 2 - gas/testsuite/gas/aarch64/sysreg-7.d | 25 - gas/testsuite/gas/aarch64/sysreg-7.s | 22 - gas/testsuite/gas/aarch64/sysreg-8.d | 295 -- gas/testsuite/gas/aarch64/sysreg-8.s | 192 - gas/testsuite/gas/aarch64/sysreg-diagnostic.d | 16 - gas/testsuite/gas/aarch64/sysreg-diagnostic.l | 6 - gas/testsuite/gas/aarch64/sysreg-diagnostic.s | 8 - gas/testsuite/gas/aarch64/sysreg.d | 35 - gas/testsuite/gas/aarch64/sysreg.s | 38 - .../gas/aarch64/sysreg/aarch64-sysreg.exp | 23 + .../gas/aarch64/sysreg/armv8_8-a-sysregs-invalid.d | 1 + .../gas/aarch64/sysreg/armv8_8-a-sysregs-invalid.l | 6 + .../gas/aarch64/sysreg/armv8_8-a-sysregs-invalid.s | 8 + .../gas/aarch64/sysreg/armv8_8-a-sysregs.d | 19 + .../gas/aarch64/sysreg/armv8_8-a-sysregs.s | 12 + .../gas/aarch64/sysreg/armv8_9-a-sysregs-bad.d | 3 + .../gas/aarch64/sysreg/armv8_9-a-sysregs-bad.l | 126 + .../gas/aarch64/sysreg/armv8_9-a-sysregs.d | 133 + .../gas/aarch64/sysreg/armv8_9-a-sysregs.s | 157 + gas/testsuite/gas/aarch64/sysreg/gcs-sysregs-bad.d | 3 + gas/testsuite/gas/aarch64/sysreg/gcs-sysregs-bad.l | 21 + gas/testsuite/gas/aarch64/sysreg/gcs-sysregs.d | 29 + gas/testsuite/gas/aarch64/sysreg/gcs-sysregs.s | 20 + .../gas/aarch64/sysreg/illegal-sysreg-2.d | 2 + .../gas/aarch64/sysreg/illegal-sysreg-2.l | 2 + .../gas/aarch64/sysreg/illegal-sysreg-2.s | 3 + .../gas/aarch64/sysreg/illegal-sysreg-3.d | 3 + .../gas/aarch64/sysreg/illegal-sysreg-3.l | 41 + .../gas/aarch64/sysreg/illegal-sysreg-4.d | 3 + .../gas/aarch64/sysreg/illegal-sysreg-4.l | 56 + .../gas/aarch64/sysreg/illegal-sysreg-4b.d | 2 + .../gas/aarch64/sysreg/illegal-sysreg-4b.l | 11 + .../gas/aarch64/sysreg/illegal-sysreg-4b.s | 14 + .../gas/aarch64/sysreg/illegal-sysreg-5.d | 3 + .../gas/aarch64/sysreg/illegal-sysreg-5.l | 2 + .../gas/aarch64/sysreg/illegal-sysreg-7.d | 2 + .../gas/aarch64/sysreg/illegal-sysreg-7.l | 6 + .../gas/aarch64/sysreg/illegal-sysreg-7.s | 8 + .../gas/aarch64/sysreg/illegal-sysreg-8.d | 1 + .../gas/aarch64/sysreg/illegal-sysreg-8.l | 377 ++ .../gas/aarch64/sysreg/illegal-sysreg-8.s | 127 + .../gas/aarch64/sysreg/illegal-sysreg-8b.d | 1 + .../gas/aarch64/sysreg/illegal-sysreg-8b.l | 59 + .../gas/aarch64/sysreg/illegal-sysreg-8b.s | 51 + .../gas/aarch64/sysreg/illegal-sysreg128.d | 2 + .../gas/aarch64/sysreg/illegal-sysreg128.l | 11 + .../gas/aarch64/sysreg/illegal-sysreg128.s | 8 + .../gas/aarch64/sysreg/invalid-sysreg-assert.d | 3 + .../gas/aarch64/sysreg/invalid-sysreg-assert.l | 2 + .../gas/aarch64/sysreg/invalid-sysreg-assert.s | 2 + .../gas/aarch64/sysreg/sme-sysreg-illegal.d | 3 + .../gas/aarch64/sysreg/sme-sysreg-illegal.l | 3 + .../gas/aarch64/sysreg/sme-sysreg-illegal.s | 3 + gas/testsuite/gas/aarch64/sysreg/sme-sysreg.d | 29 + gas/testsuite/gas/aarch64/sysreg/sme-sysreg.s | 23 + .../gas/aarch64/sysreg/sve-sysreg-invalid.d | 3 + .../gas/aarch64/sysreg/sve-sysreg-invalid.l | 19 + gas/testsuite/gas/aarch64/sysreg/sve-sysreg.d | 27 + gas/testsuite/gas/aarch64/sysreg/sve-sysreg.s | 22 + gas/testsuite/gas/aarch64/sysreg/sysreg-1.d | 4295 ++++++++++++++++++++ gas/testsuite/gas/aarch64/sysreg/sysreg-1.s | 174 + gas/testsuite/gas/aarch64/sysreg/sysreg-2.d | 60 + gas/testsuite/gas/aarch64/sysreg/sysreg-2.s | 63 + gas/testsuite/gas/aarch64/sysreg/sysreg-3.d | 28 + gas/testsuite/gas/aarch64/sysreg/sysreg-3.s | 21 + gas/testsuite/gas/aarch64/sysreg/sysreg-4.d | 59 + gas/testsuite/gas/aarch64/sysreg/sysreg-4.s | 64 + gas/testsuite/gas/aarch64/sysreg/sysreg-5.s | 1 + gas/testsuite/gas/aarch64/sysreg/sysreg-6.d | 9 + gas/testsuite/gas/aarch64/sysreg/sysreg-6.s | 2 + gas/testsuite/gas/aarch64/sysreg/sysreg-7.d | 25 + gas/testsuite/gas/aarch64/sysreg/sysreg-7.s | 22 + gas/testsuite/gas/aarch64/sysreg/sysreg-8.d | 295 ++ gas/testsuite/gas/aarch64/sysreg/sysreg-8.s | 192 + .../gas/aarch64/sysreg/sysreg-diagnostic.d | 16 + .../gas/aarch64/sysreg/sysreg-diagnostic.l | 6 + .../gas/aarch64/sysreg/sysreg-diagnostic.s | 8 + gas/testsuite/gas/aarch64/sysreg/sysreg.d | 35 + gas/testsuite/gas/aarch64/sysreg/sysreg.s | 38 + gas/testsuite/gas/aarch64/sysreg/sysreg128.d | 28 + gas/testsuite/gas/aarch64/sysreg/sysreg128.s | 17 + .../gas/aarch64/sysreg/v8-r-bad-sysregs.d | 3 + .../gas/aarch64/sysreg/v8-r-bad-sysregs.l | 14 + .../gas/aarch64/sysreg/v8-r-bad-sysregs.s | 23 + .../gas/aarch64/sysreg/v8-r-sysregs-need-arch.d | 3 + .../gas/aarch64/sysreg/v8-r-sysregs-need-arch.l | 141 + gas/testsuite/gas/aarch64/sysreg/v8-r-sysregs.d | 149 + gas/testsuite/gas/aarch64/sysreg/v8-r-sysregs.s | 141 + gas/testsuite/gas/aarch64/sysreg128.d | 28 - gas/testsuite/gas/aarch64/sysreg128.s | 17 - gas/testsuite/gas/aarch64/v8-r-bad-sysregs.d | 3 - gas/testsuite/gas/aarch64/v8-r-bad-sysregs.l | 14 - gas/testsuite/gas/aarch64/v8-r-bad-sysregs.s | 23 - gas/testsuite/gas/aarch64/v8-r-sysregs-need-arch.d | 3 - gas/testsuite/gas/aarch64/v8-r-sysregs-need-arch.l | 141 - gas/testsuite/gas/aarch64/v8-r-sysregs.d | 149 - gas/testsuite/gas/aarch64/v8-r-sysregs.s | 141 - 157 files changed, 7427 insertions(+), 7404 deletions(-) delete mode 100644 gas/testsuite/gas/aarch64/armv8_8-a-sysregs-invalid.d delete mode 100644 gas/testsuite/gas/aarch64/armv8_8-a-sysregs-invalid.l delete mode 100644 gas/testsuite/gas/aarch64/armv8_8-a-sysregs-invalid.s delete mode 100644 gas/testsuite/gas/aarch64/armv8_8-a-sysregs.d delete mode 100644 gas/testsuite/gas/aarch64/armv8_8-a-sysregs.s delete mode 100644 gas/testsuite/gas/aarch64/armv8_9-a-sysregs-bad.d delete mode 100644 gas/testsuite/gas/aarch64/armv8_9-a-sysregs-bad.l delete mode 100644 gas/testsuite/gas/aarch64/armv8_9-a-sysregs.d delete mode 100644 gas/testsuite/gas/aarch64/armv8_9-a-sysregs.s delete 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create mode 100644 gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-2.s create mode 100644 gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-3.d create mode 100644 gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-3.l create mode 100644 gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-4.d create mode 100644 gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-4.l create mode 100644 gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-4b.d create mode 100644 gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-4b.l create mode 100644 gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-4b.s create mode 100644 gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-5.d create mode 100644 gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-5.l create mode 100644 gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-7.d create mode 100644 gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-7.l create mode 100644 gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-7.s create mode 100644 gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-8.d 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gas/testsuite/gas/aarch64/sysreg/sysreg-5.s create mode 100644 gas/testsuite/gas/aarch64/sysreg/sysreg-6.d create mode 100644 gas/testsuite/gas/aarch64/sysreg/sysreg-6.s create mode 100644 gas/testsuite/gas/aarch64/sysreg/sysreg-7.d create mode 100644 gas/testsuite/gas/aarch64/sysreg/sysreg-7.s create mode 100644 gas/testsuite/gas/aarch64/sysreg/sysreg-8.d create mode 100644 gas/testsuite/gas/aarch64/sysreg/sysreg-8.s create mode 100644 gas/testsuite/gas/aarch64/sysreg/sysreg-diagnostic.d create mode 100644 gas/testsuite/gas/aarch64/sysreg/sysreg-diagnostic.l create mode 100644 gas/testsuite/gas/aarch64/sysreg/sysreg-diagnostic.s create mode 100644 gas/testsuite/gas/aarch64/sysreg/sysreg.d create mode 100644 gas/testsuite/gas/aarch64/sysreg/sysreg.s create mode 100644 gas/testsuite/gas/aarch64/sysreg/sysreg128.d create mode 100644 gas/testsuite/gas/aarch64/sysreg/sysreg128.s create mode 100644 gas/testsuite/gas/aarch64/sysreg/v8-r-bad-sysregs.d create mode 100644 gas/testsuite/gas/aarch64/sysreg/v8-r-bad-sysregs.l create mode 100644 gas/testsuite/gas/aarch64/sysreg/v8-r-bad-sysregs.s create mode 100644 gas/testsuite/gas/aarch64/sysreg/v8-r-sysregs-need-arch.d create mode 100644 gas/testsuite/gas/aarch64/sysreg/v8-r-sysregs-need-arch.l create mode 100644 gas/testsuite/gas/aarch64/sysreg/v8-r-sysregs.d create mode 100644 gas/testsuite/gas/aarch64/sysreg/v8-r-sysregs.s delete mode 100644 gas/testsuite/gas/aarch64/sysreg128.d delete mode 100644 gas/testsuite/gas/aarch64/sysreg128.s delete mode 100644 gas/testsuite/gas/aarch64/v8-r-bad-sysregs.d delete mode 100644 gas/testsuite/gas/aarch64/v8-r-bad-sysregs.l delete mode 100644 gas/testsuite/gas/aarch64/v8-r-bad-sysregs.s delete mode 100644 gas/testsuite/gas/aarch64/v8-r-sysregs-need-arch.d delete mode 100644 gas/testsuite/gas/aarch64/v8-r-sysregs-need-arch.l delete mode 100644 gas/testsuite/gas/aarch64/v8-r-sysregs.d delete mode 100644 gas/testsuite/gas/aarch64/v8-r-sysregs.s diff --git a/gas/testsuite/gas/aarch64/armv8_8-a-sysregs-invalid.d b/gas/testsuite/gas/aarch64/armv8_8-a-sysregs-invalid.d deleted file mode 100644 index 5bab9fc..0000000 --- a/gas/testsuite/gas/aarch64/armv8_8-a-sysregs-invalid.d +++ /dev/null @@ -1 +0,0 @@ -#error_output: armv8_8-a-sysregs-invalid.l diff --git a/gas/testsuite/gas/aarch64/armv8_8-a-sysregs-invalid.l b/gas/testsuite/gas/aarch64/armv8_8-a-sysregs-invalid.l deleted file mode 100644 index c3cf033..0000000 --- a/gas/testsuite/gas/aarch64/armv8_8-a-sysregs-invalid.l +++ /dev/null @@ -1,6 +0,0 @@ -[^:]*: Assembler messages: -[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr allint,#-1' -[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr allint,#2' -[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr allint,#15' -[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr allint,#0x100000000' -[^:]*:[0-9]+: Warning: specified register cannot be written to at operand 1 -- `msr icc_nmiar1_el1,x0' diff --git a/gas/testsuite/gas/aarch64/armv8_8-a-sysregs-invalid.s b/gas/testsuite/gas/aarch64/armv8_8-a-sysregs-invalid.s deleted file mode 100644 index 7534f14..0000000 --- a/gas/testsuite/gas/aarch64/armv8_8-a-sysregs-invalid.s +++ /dev/null @@ -1,8 +0,0 @@ - .arch armv8.8-a - - msr allint, #-1 - msr allint, #2 - msr allint, #15 - msr allint, #0x100000000 - - msr icc_nmiar1_el1, x0 diff --git a/gas/testsuite/gas/aarch64/armv8_8-a-sysregs.d b/gas/testsuite/gas/aarch64/armv8_8-a-sysregs.d deleted file mode 100644 index 294fed2..0000000 --- a/gas/testsuite/gas/aarch64/armv8_8-a-sysregs.d +++ /dev/null @@ -1,19 +0,0 @@ -#as: -march=armv8.8-a -#objdump: -dr - -.*: file format .* - -Disassembly of section \.text: - -0+ <.*>: -[^:]+:\s+d5184300 msr allint, x0 -[^:]+:\s+d518430f msr allint, x15 -[^:]+:\s+d518431e msr allint, x30 -[^:]+:\s+d518431f msr allint, xzr -[^:]+:\s+d5384300 mrs x0, allint -[^:]+:\s+d5384310 mrs x16, allint -[^:]+:\s+d538431e mrs x30, allint -[^:]+:\s+d501401f msr allint, #0x0 -[^:]+:\s+d501411f msr allint, #0x1 -[^:]+:\s+d501421f msr s0_1_c4_c2_0, xzr -[^:]+:\s+d538c9a0 mrs x0, icc_nmiar1_el1 diff --git a/gas/testsuite/gas/aarch64/armv8_8-a-sysregs.s b/gas/testsuite/gas/aarch64/armv8_8-a-sysregs.s deleted file mode 100644 index dd43ad8..0000000 --- a/gas/testsuite/gas/aarch64/armv8_8-a-sysregs.s +++ /dev/null @@ -1,12 +0,0 @@ - msr allint, x0 - MSR ALLINT, X15 - msr allint, x30 - msr allint, xzr - mrs x0, allint - mrs X16, ALLINT - mrs x30, allint - msr allint, #0 - msr allint, #1 - .inst 0xd501421f - - mrs x0, icc_nmiar1_el1 diff --git a/gas/testsuite/gas/aarch64/armv8_9-a-sysregs-bad.d b/gas/testsuite/gas/aarch64/armv8_9-a-sysregs-bad.d deleted file mode 100644 index 2471b6b..0000000 --- a/gas/testsuite/gas/aarch64/armv8_9-a-sysregs-bad.d +++ /dev/null @@ -1,3 +0,0 @@ -#as: -march=armv8.8-a -#source: armv8_9-a-sysregs.s -#error_output: armv8_9-a-sysregs-bad.l diff --git a/gas/testsuite/gas/aarch64/armv8_9-a-sysregs-bad.l b/gas/testsuite/gas/aarch64/armv8_9-a-sysregs-bad.l deleted file mode 100644 index 02d9cac..0000000 --- a/gas/testsuite/gas/aarch64/armv8_9-a-sysregs-bad.l +++ /dev/null @@ -1,126 +0,0 @@ -.*: Assembler messages: -.*: Error: selected processor does not support system register name 'pmsdsfr_el1' -.*: Error: selected processor does not support system register name 'pmsdsfr_el1' -.*: Error: selected processor does not support system register name 'erxgsr_el1' -.*: Error: selected processor does not support system register name 'sctlr2_el1' -.*: Error: selected processor does not support system register name 'sctlr2_el12' -.*: Error: selected processor does not support system register name 'sctlr2_el2' -.*: Error: selected processor does not support system register name 'sctlr2_el3' -.*: Error: selected processor does not support system register name 'sctlr2_el1' -.*: Error: selected processor does not support system register name 'sctlr2_el12' -.*: Error: selected processor does not support system register name 'sctlr2_el2' -.*: Error: selected processor does not support system register name 'sctlr2_el3' -.*: Error: selected processor does not support system register name 'hdfgrtr2_el2' -.*: Error: selected processor does not support system register name 'hdfgwtr2_el2' -.*: Error: selected processor does not support system register name 'hfgrtr2_el2' -.*: Error: selected processor does not support system register name 'hfgwtr2_el2' -.*: Error: selected processor does not support system register name 'hdfgrtr2_el2' -.*: Error: selected processor does not support system register name 'hdfgwtr2_el2' -.*: Error: selected processor does not support system register name 'hfgrtr2_el2' -.*: Error: selected processor does not support system register name 'hfgwtr2_el2' -.*: Error: selected processor does not support system register name 'pfar_el1' -.*: Error: selected processor does not support system register name 'pfar_el2' -.*: Error: selected processor does not support system register name 'pfar_el12' -.*: Error: selected processor does not support system register name 'pfar_el1' -.*: Error: selected processor does not support system register name 'pfar_el2' -.*: Error: selected processor does not support system register name 'pfar_el12' -.*: Error: selected processor does not support system register name 's1e1a' -.*: Error: selected processor does not support system register name 's1e2a' -.*: Error: selected processor does not support system register name 's1e3a' -.*: Error: selected processor does not support system register name 'amair2_el1' -.*: Error: selected processor does not support system register name 'amair2_el12' -.*: Error: selected processor does not support system register name 'amair2_el2' -.*: Error: selected processor does not support system register name 'amair2_el3' -.*: Error: selected processor does not support system register name 'mair2_el1' -.*: Error: selected processor does not support system register name 'mair2_el12' -.*: Error: selected processor does not support system register name 'mair2_el2' -.*: Error: selected processor does not support system register name 'mair2_el3' -.*: Error: selected processor does not support system register name 'amair2_el1' -.*: Error: selected processor does not support system register name 'amair2_el12' -.*: Error: selected processor does not support system register name 'amair2_el2' -.*: Error: selected processor does not support system register name 'amair2_el3' -.*: Error: selected processor does not support system register name 'mair2_el1' -.*: Error: selected processor does not support system register name 'mair2_el12' -.*: Error: selected processor does not support system register name 'mair2_el2' -.*: Error: selected processor does not support system register name 'mair2_el3' -.*: Error: selected processor does not support system register name 'pir_el1' -.*: Error: selected processor does not support system register name 'pir_el12' -.*: Error: selected processor does not support system register name 'pir_el2' -.*: Error: selected processor does not support system register name 'pir_el3' -.*: Error: selected processor does not support system register name 'pire0_el1' -.*: Error: selected processor does not support system register name 'pire0_el12' -.*: Error: selected processor does not support system register name 'pire0_el2' -.*: Error: selected processor does not support system register name 'pir_el1' -.*: Error: selected processor does not support system register name 'pir_el12' -.*: Error: selected processor does not support system register name 'pir_el2' -.*: Error: selected processor does not support system register name 'pir_el3' -.*: Error: selected processor does not support system register name 'pire0_el1' -.*: Error: selected processor does not support system register name 'pire0_el12' -.*: Error: selected processor does not support system register name 'pire0_el2' -.*: Error: selected processor does not support system register name 's2pir_el2' -.*: Error: selected processor does not support system register name 's2pir_el2' -.*: Error: selected processor does not support system register name 'por_el0' -.*: Error: selected processor does not support system register name 'por_el1' -.*: Error: selected processor does not support system register name 'por_el12' -.*: Error: selected processor does not support system register name 'por_el2' -.*: Error: selected processor does not support system register name 'por_el3' -.*: Error: selected processor does not support system register name 'por_el0' -.*: Error: selected processor does not support system register name 'por_el1' -.*: Error: selected processor does not support system register name 'por_el12' -.*: Error: selected processor does not support system register name 'por_el2' -.*: Error: selected processor does not support system register name 'por_el3' -.*: Error: selected processor does not support system register name 's2por_el1' -.*: Error: selected processor does not support system register name 's2por_el1' -.*: Error: selected processor does not support system register name 'tcr2_el1' -.*: Error: selected processor does not support system register name 'tcr2_el12' -.*: Error: selected processor does not support system register name 'tcr2_el2' -.*: Error: selected processor does not support system register name 'tcr2_el1' -.*: Error: selected processor does not support system register name 'tcr2_el12' -.*: Error: selected processor does not support system register name 'tcr2_el2' -.*: Error: selected processor does not support system register name 'mdselr_el1' -.*: Error: selected processor does not support system register name 'mdselr_el1' -.*: Error: selected processor does not support system register name 'pmuacr_el1' -.*: Error: selected processor does not support system register name 'pmuacr_el1' -.*: Error: selected processor does not support system register name 'pmccntsvr_el1' -.*: Error: selected processor does not support system register name 'pmicntsvr_el1' -.*: Error: selected processor does not support system register name 'pmsscr_el1' -.*: Error: selected processor does not support system register name 'pmsscr_el1' -.*: Error: selected processor does not support system register name 'pmevcntsvr0_el1' -.*: Error: selected processor does not support system register name 'pmevcntsvr10_el1' -.*: Error: selected processor does not support system register name 'pmevcntsvr11_el1' -.*: Error: selected processor does not support system register name 'pmevcntsvr12_el1' -.*: Error: selected processor does not support system register name 'pmevcntsvr13_el1' -.*: Error: selected processor does not support system register name 'pmevcntsvr14_el1' -.*: Error: selected processor does not support system register name 'pmevcntsvr15_el1' -.*: Error: selected processor does not support system register name 'pmevcntsvr16_el1' -.*: Error: selected processor does not support system register name 'pmevcntsvr17_el1' -.*: Error: selected processor does not support system register name 'pmevcntsvr18_el1' -.*: Error: selected processor does not support system register name 'pmevcntsvr19_el1' -.*: Error: selected processor does not support system register name 'pmevcntsvr1_el1' -.*: Error: selected processor does not support system register name 'pmevcntsvr20_el1' -.*: Error: selected processor does not support system register name 'pmevcntsvr21_el1' -.*: Error: selected processor does not support system register name 'pmevcntsvr22_el1' -.*: Error: selected processor does not support system register name 'pmevcntsvr23_el1' -.*: Error: selected processor does not support system register name 'pmevcntsvr24_el1' -.*: Error: selected processor does not support system register name 'pmevcntsvr25_el1' -.*: Error: selected processor does not support system register name 'pmevcntsvr26_el1' -.*: Error: selected processor does not support system register name 'pmevcntsvr27_el1' -.*: Error: selected processor does not support system register name 'pmevcntsvr28_el1' -.*: Error: selected processor does not support system register name 'pmevcntsvr29_el1' -.*: Error: selected processor does not support system register name 'pmevcntsvr30_el1' -.*: Error: selected processor does not support system register name 'pmevcntsvr3_el1' -.*: Error: selected processor does not support system register name 'pmevcntsvr4_el1' -.*: Error: selected processor does not support system register name 'pmevcntsvr5_el1' -.*: Error: selected processor does not support system register name 'pmevcntsvr6_el1' -.*: Error: selected processor does not support system register name 'pmevcntsvr7_el1' -.*: Error: selected processor does not support system register name 'pmevcntsvr8_el1' -.*: Error: selected processor does not support system register name 'pmevcntsvr9_el1' -.*: Error: selected processor does not support system register name 'pmicntr_el0' -.*: Error: selected processor does not support system register name 'pmicntr_el0' -.*: Error: selected processor does not support system register name 'pmicfiltr_el0' -.*: Error: selected processor does not support system register name 'pmicfiltr_el0' -.*: Error: selected processor does not support system register name 'pmzr_el0' -.*: Error: selected processor does not support system register name 'pmecr_el1' -.*: Error: selected processor does not support system register name 'pmecr_el1' -.*: Error: selected processor does not support system register name 'pmiar_el1' -.*: Error: selected processor does not support system register name 'pmiar_el1' diff --git a/gas/testsuite/gas/aarch64/armv8_9-a-sysregs.d b/gas/testsuite/gas/aarch64/armv8_9-a-sysregs.d deleted file mode 100644 index dc1e8bc..0000000 --- a/gas/testsuite/gas/aarch64/armv8_9-a-sysregs.d +++ /dev/null @@ -1,133 +0,0 @@ -#as: -march=armv8.9-a -#objdump: -dr - -.*: file format .* - -Disassembly of section \.text: - -0+ <.*>: -.*: d53c9a83 mrs x3, pmsdsfr_el1 -.*: d51c9a83 msr pmsdsfr_el1, x3 -.*: d5385340 mrs x0, erxgsr_el1 -.*: d5181063 msr sctlr2_el1, x3 -.*: d51d1063 msr sctlr2_el12, x3 -.*: d51c1063 msr sctlr2_el2, x3 -.*: d51e1063 msr sctlr2_el3, x3 -.*: d5381063 mrs x3, sctlr2_el1 -.*: d53d1063 mrs x3, sctlr2_el12 -.*: d53c1063 mrs x3, sctlr2_el2 -.*: d53e1063 mrs x3, sctlr2_el3 -.*: d53c3103 mrs x3, hdfgrtr2_el2 -.*: d53c3123 mrs x3, hdfgwtr2_el2 -.*: d53c3143 mrs x3, hfgrtr2_el2 -.*: d53c3163 mrs x3, hfgwtr2_el2 -.*: d51c3103 msr hdfgrtr2_el2, x3 -.*: d51c3123 msr hdfgwtr2_el2, x3 -.*: d51c3143 msr hfgrtr2_el2, x3 -.*: d51c3163 msr hfgwtr2_el2, x3 -.*: d53860a0 mrs x0, pfar_el1 -.*: d53c60a0 mrs x0, pfar_el2 -.*: d53d60a0 mrs x0, pfar_el12 -.*: d51860a0 msr pfar_el1, x0 -.*: d51c60a0 msr pfar_el2, x0 -.*: d51d60a0 msr pfar_el12, x0 -.*: d5087941 at s1e1a, x1 -.*: d50c7943 at s1e2a, x3 -.*: d50e7945 at s1e3a, x5 -.*: d538a320 mrs x0, amair2_el1 -.*: d53da320 mrs x0, amair2_el12 -.*: d53ca320 mrs x0, amair2_el2 -.*: d53ea320 mrs x0, amair2_el3 -.*: d538a220 mrs x0, mair2_el1 -.*: d53da220 mrs x0, mair2_el12 -.*: d53ca120 mrs x0, mair2_el2 -.*: d53ea120 mrs x0, mair2_el3 -.*: d518a320 msr amair2_el1, x0 -.*: d51da320 msr amair2_el12, x0 -.*: d51ca320 msr amair2_el2, x0 -.*: d51ea320 msr amair2_el3, x0 -.*: d518a220 msr mair2_el1, x0 -.*: d51da220 msr mair2_el12, x0 -.*: d51ca120 msr mair2_el2, x0 -.*: d51ea120 msr mair2_el3, x0 -.*: d538a260 mrs x0, pir_el1 -.*: d53da260 mrs x0, pir_el12 -.*: d53ca260 mrs x0, pir_el2 -.*: d53ea260 mrs x0, pir_el3 -.*: d538a240 mrs x0, pire0_el1 -.*: d53da240 mrs x0, pire0_el12 -.*: d53ca240 mrs x0, pire0_el2 -.*: d518a260 msr pir_el1, x0 -.*: d51da260 msr pir_el12, x0 -.*: d51ca260 msr pir_el2, x0 -.*: d51ea260 msr pir_el3, x0 -.*: d518a240 msr pire0_el1, x0 -.*: d51da240 msr pire0_el12, x0 -.*: d51ca240 msr pire0_el2, x0 -.*: d53ca2a0 mrs x0, s2pir_el2 -.*: d51ca2a0 msr s2pir_el2, x0 -.*: d53ba280 mrs x0, por_el0 -.*: d538a280 mrs x0, por_el1 -.*: d53da280 mrs x0, por_el12 -.*: d53ca280 mrs x0, por_el2 -.*: d53ea280 mrs x0, por_el3 -.*: d51ba280 msr por_el0, x0 -.*: d518a280 msr por_el1, x0 -.*: d51da280 msr por_el12, x0 -.*: d51ca280 msr por_el2, x0 -.*: d51ea280 msr por_el3, x0 -.*: d538a2a0 mrs x0, s2por_el1 -.*: d518a2a0 msr s2por_el1, x0 -.*: d5382060 mrs x0, tcr2_el1 -.*: d53d2060 mrs x0, tcr2_el12 -.*: d53c2060 mrs x0, tcr2_el2 -.*: d5182060 msr tcr2_el1, x0 -.*: d51d2060 msr tcr2_el12, x0 -.*: d51c2060 msr tcr2_el2, x0 -.*: d5300440 mrs x0, mdselr_el1 -.*: d5100440 msr mdselr_el1, x0 -.*: d5389e80 mrs x0, pmuacr_el1 -.*: d5189e80 msr pmuacr_el1, x0 -.*: d530ebe0 mrs x0, pmccntsvr_el1 -.*: d530ec00 mrs x0, pmicntsvr_el1 -.*: d5389d60 mrs x0, pmsscr_el1 -.*: d5189d60 msr pmsscr_el1, x0 -.*: d530e800 mrs x0, pmevcntsvr0_el1 -.*: d530e940 mrs x0, pmevcntsvr10_el1 -.*: d530e960 mrs x0, pmevcntsvr11_el1 -.*: d530e980 mrs x0, pmevcntsvr12_el1 -.*: d530e9a0 mrs x0, pmevcntsvr13_el1 -.*: d530e9c0 mrs x0, pmevcntsvr14_el1 -.*: d530e9e0 mrs x0, pmevcntsvr15_el1 -.*: d530ea00 mrs x0, pmevcntsvr16_el1 -.*: d530ea20 mrs x0, pmevcntsvr17_el1 -.*: d530ea40 mrs x0, pmevcntsvr18_el1 -.*: d530ea60 mrs x0, pmevcntsvr19_el1 -.*: d530e820 mrs x0, pmevcntsvr1_el1 -.*: d530ea80 mrs x0, pmevcntsvr20_el1 -.*: d530eaa0 mrs x0, pmevcntsvr21_el1 -.*: d530eac0 mrs x0, pmevcntsvr22_el1 -.*: d530eae0 mrs x0, pmevcntsvr23_el1 -.*: d530eb00 mrs x0, pmevcntsvr24_el1 -.*: d530eb20 mrs x0, pmevcntsvr25_el1 -.*: d530eb40 mrs x0, pmevcntsvr26_el1 -.*: d530eb60 mrs x0, pmevcntsvr27_el1 -.*: d530eb80 mrs x0, pmevcntsvr28_el1 -.*: d530eba0 mrs x0, pmevcntsvr29_el1 -.*: d530ebc0 mrs x0, pmevcntsvr30_el1 -.*: d530e860 mrs x0, pmevcntsvr3_el1 -.*: d530e880 mrs x0, pmevcntsvr4_el1 -.*: d530e8a0 mrs x0, pmevcntsvr5_el1 -.*: d530e8c0 mrs x0, pmevcntsvr6_el1 -.*: d530e8e0 mrs x0, pmevcntsvr7_el1 -.*: d530e900 mrs x0, pmevcntsvr8_el1 -.*: d530e920 mrs x0, pmevcntsvr9_el1 -.*: d53b9400 mrs x0, pmicntr_el0 -.*: d51b9400 msr pmicntr_el0, x0 -.*: d53b9600 mrs x0, pmicfiltr_el0 -.*: d51b9600 msr pmicfiltr_el0, x0 -.*: d51b9d80 msr pmzr_el0, x0 -.*: d5389ea0 mrs x0, pmecr_el1 -.*: d5189ea0 msr pmecr_el1, x0 -.*: d5389ee0 mrs x0, pmiar_el1 -.*: d5189ee0 msr pmiar_el1, x0 \ No newline at end of file diff --git a/gas/testsuite/gas/aarch64/armv8_9-a-sysregs.s b/gas/testsuite/gas/aarch64/armv8_9-a-sysregs.s deleted file mode 100644 index 5366318..0000000 --- a/gas/testsuite/gas/aarch64/armv8_9-a-sysregs.s +++ /dev/null @@ -1,157 +0,0 @@ - mrs x3, PMSDSFR_EL1 - msr PMSDSFR_EL1, x3 - - mrs x0, ERXGSR_EL1 - - msr SCTLR2_EL1, x3 - msr SCTLR2_EL12, x3 - msr SCTLR2_EL2, x3 - msr SCTLR2_EL3, x3 - mrs x3, SCTLR2_EL1 - mrs x3, SCTLR2_EL12 - mrs x3, SCTLR2_EL2 - mrs x3, SCTLR2_EL3 - - mrs x3, HDFGRTR2_EL2 - mrs x3, HDFGWTR2_EL2 - mrs x3, HFGRTR2_EL2 - mrs x3, HFGWTR2_EL2 - msr HDFGRTR2_EL2, x3 - msr HDFGWTR2_EL2, x3 - msr HFGRTR2_EL2, x3 - msr HFGWTR2_EL2, x3 - - mrs x0, PFAR_EL1 - mrs x0, PFAR_EL2 - mrs x0, PFAR_EL12 - msr PFAR_EL1, x0 - msr PFAR_EL2, x0 - msr PFAR_EL12, x0 - - /* AT. */ - at s1e1a, x1 - at s1e2a, x3 - at s1e3a, x5 - - /* FEAT_AIE. */ - mrs x0, amair2_el1 - mrs x0, amair2_el12 - mrs x0, amair2_el2 - mrs x0, amair2_el3 - mrs x0, mair2_el1 - mrs x0, mair2_el12 - mrs x0, mair2_el2 - mrs x0, mair2_el3 - - msr amair2_el1, x0 - msr amair2_el12, x0 - msr amair2_el2, x0 - msr amair2_el3, x0 - msr mair2_el1, x0 - msr mair2_el12, x0 - msr mair2_el2, x0 - msr mair2_el3, x0 - - /* FEAT_S1PIE. */ - mrs x0, pir_el1 - mrs x0, pir_el12 - mrs x0, pir_el2 - mrs x0, pir_el3 - mrs x0, pire0_el1 - mrs x0, pire0_el12 - mrs x0, pire0_el2 - - msr pir_el1, x0 - msr pir_el12, x0 - msr pir_el2, x0 - msr pir_el3, x0 - msr pire0_el1, x0 - msr pire0_el12, x0 - msr pire0_el2, x0 - - /* FEAT_S2PIE. */ - mrs x0, s2pir_el2 - msr s2pir_el2, x0 - - /* FEAT_S1POE. */ - mrs x0, por_el0 - mrs x0, por_el1 - mrs x0, por_el12 - mrs x0, por_el2 - mrs x0, por_el3 - - msr por_el0, x0 - msr por_el1, x0 - msr por_el12, x0 - msr por_el2, x0 - msr por_el3, x0 - - /* FEAT_S21POE. */ - mrs x0, s2por_el1 - msr s2por_el1, x0 - - /* FEAT_TCR2. */ - mrs x0, tcr2_el1 - mrs x0, tcr2_el12 - mrs x0, tcr2_el2 - - msr tcr2_el1, x0 - msr tcr2_el12, x0 - msr tcr2_el2, x0 - - /* FEAT_DEBUGv8p9 Extension. */ - mrs x0, mdselr_el1 - msr mdselr_el1, x0 - - /* FEAT_PMUv3p9 Extension. */ - mrs x0, pmuacr_el1 - msr pmuacr_el1, x0 - - /* FEAT_PMUv3_SS Extension. */ - mrs x0, pmccntsvr_el1 - mrs x0, pmicntsvr_el1 - mrs x0, pmsscr_el1 - msr pmsscr_el1, x0 - mrs x0, pmevcntsvr0_el1 - mrs x0, pmevcntsvr10_el1 - mrs x0, pmevcntsvr11_el1 - mrs x0, pmevcntsvr12_el1 - mrs x0, pmevcntsvr13_el1 - mrs x0, pmevcntsvr14_el1 - mrs x0, pmevcntsvr15_el1 - mrs x0, pmevcntsvr16_el1 - mrs x0, pmevcntsvr17_el1 - mrs x0, pmevcntsvr18_el1 - mrs x0, pmevcntsvr19_el1 - mrs x0, pmevcntsvr1_el1 - mrs x0, pmevcntsvr20_el1 - mrs x0, pmevcntsvr21_el1 - mrs x0, pmevcntsvr22_el1 - mrs x0, pmevcntsvr23_el1 - mrs x0, pmevcntsvr24_el1 - mrs x0, pmevcntsvr25_el1 - mrs x0, pmevcntsvr26_el1 - mrs x0, pmevcntsvr27_el1 - mrs x0, pmevcntsvr28_el1 - mrs x0, pmevcntsvr29_el1 - mrs x0, pmevcntsvr30_el1 - mrs x0, pmevcntsvr3_el1 - mrs x0, pmevcntsvr4_el1 - mrs x0, pmevcntsvr5_el1 - mrs x0, pmevcntsvr6_el1 - mrs x0, pmevcntsvr7_el1 - mrs x0, pmevcntsvr8_el1 - mrs x0, pmevcntsvr9_el1 - - /* FEAT_PMUv3_ICNTR Extension. */ - mrs x0, pmicntr_el0 - msr pmicntr_el0, x0 - mrs x0, pmicfiltr_el0 - msr pmicfiltr_el0, x0 - msr pmzr_el0, x0 - - /* FEAT_SEBEP Extension. */ - mrs x0, pmecr_el1 - msr pmecr_el1, x0 - mrs x0, pmiar_el1 - msr pmiar_el1, x0 diff --git a/gas/testsuite/gas/aarch64/gcs-sysregs-bad.d b/gas/testsuite/gas/aarch64/gcs-sysregs-bad.d deleted file mode 100644 index 439c1bd..0000000 --- a/gas/testsuite/gas/aarch64/gcs-sysregs-bad.d +++ /dev/null @@ -1,3 +0,0 @@ -#as: -march=armv8-a -#source: gcs-sysregs.s -#error_output: gcs-sysregs-bad.l diff --git a/gas/testsuite/gas/aarch64/gcs-sysregs-bad.l b/gas/testsuite/gas/aarch64/gcs-sysregs-bad.l deleted file mode 100644 index 9ebfd8c..0000000 --- a/gas/testsuite/gas/aarch64/gcs-sysregs-bad.l +++ /dev/null @@ -1,21 +0,0 @@ -[^:]*: Assembler messages: -.*: Error: selected processor does not support system register name 'gcscr_el1' -.*: Error: selected processor does not support system register name 'gcscr_el1' -.*: Error: selected processor does not support system register name 'gcspr_el1' -.*: Error: selected processor does not support system register name 'gcspr_el1' -.*: Error: selected processor does not support system register name 'gcscr_el2' -.*: Error: selected processor does not support system register name 'gcscr_el2' -.*: Error: selected processor does not support system register name 'gcspr_el2' -.*: Error: selected processor does not support system register name 'gcspr_el2' -.*: Error: selected processor does not support system register name 'gcscr_el3' -.*: Error: selected processor does not support system register name 'gcscr_el3' -.*: Error: selected processor does not support system register name 'gcspr_el3' -.*: Error: selected processor does not support system register name 'gcspr_el3' -.*: Error: selected processor does not support system register name 'gcspr_el0' -.*: Error: selected processor does not support system register name 'gcspr_el0' -.*: Error: selected processor does not support system register name 'gcspr_el12' -.*: Error: selected processor does not support system register name 'gcspr_el12' -.*: Error: selected processor does not support system register name 'gcscr_el12' -.*: Error: selected processor does not support system register name 'gcscr_el12' -.*: Error: selected processor does not support system register name 'gcscre0_el1' -.*: Error: selected processor does not support system register name 'gcscre0_el1' diff --git a/gas/testsuite/gas/aarch64/gcs-sysregs.d b/gas/testsuite/gas/aarch64/gcs-sysregs.d deleted file mode 100644 index f75c270..0000000 --- a/gas/testsuite/gas/aarch64/gcs-sysregs.d +++ /dev/null @@ -1,29 +0,0 @@ -#name: Test of Guarded Control Stack system registers -#as: -march=armv8.8-a+gcs -#objdump: -dr - -.*: file format .* - -Disassembly of section \.text: - -0+ <.*>: -.*: d5182500 msr gcscr_el1, x0 -.*: d538251e mrs x30, gcscr_el1 -.*: d5182520 msr gcspr_el1, x0 -.*: d538253e mrs x30, gcspr_el1 -.*: d51c2500 msr gcscr_el2, x0 -.*: d53c251e mrs x30, gcscr_el2 -.*: d51c2520 msr gcspr_el2, x0 -.*: d53c253e mrs x30, gcspr_el2 -.*: d51e2500 msr gcscr_el3, x0 -.*: d53e251e mrs x30, gcscr_el3 -.*: d51e2520 msr gcspr_el3, x0 -.*: d53e253e mrs x30, gcspr_el3 -.*: d51b2520 msr gcspr_el0, x0 -.*: d53b253e mrs x30, gcspr_el0 -.*: d51d2520 msr gcspr_el12, x0 -.*: d53d253e mrs x30, gcspr_el12 -.*: d51d2500 msr gcscr_el12, x0 -.*: d53d251e mrs x30, gcscr_el12 -.*: d5182540 msr gcscre0_el1, x0 -.*: d538255e mrs x30, gcscre0_el1 diff --git a/gas/testsuite/gas/aarch64/gcs-sysregs.s b/gas/testsuite/gas/aarch64/gcs-sysregs.s deleted file mode 100644 index 0f5de015..0000000 --- a/gas/testsuite/gas/aarch64/gcs-sysregs.s +++ /dev/null @@ -1,20 +0,0 @@ - msr gcscr_el1, x0 - mrs x30, gcscr_el1 - msr gcspr_el1, x0 - mrs x30, gcspr_el1 - msr gcscr_el2, x0 - mrs x30, gcscr_el2 - msr gcspr_el2, x0 - mrs x30, gcspr_el2 - msr gcscr_el3, x0 - mrs x30, gcscr_el3 - msr gcspr_el3, x0 - mrs x30, gcspr_el3 - msr gcspr_el0, x0 - mrs x30, gcspr_el0 - msr gcspr_el12, x0 - mrs x30, gcspr_el12 - msr gcscr_el12, x0 - mrs x30, gcscr_el12 - msr gcscre0_el1, x0 - mrs x30, gcscre0_el1 diff --git a/gas/testsuite/gas/aarch64/illegal-sysreg-2.d b/gas/testsuite/gas/aarch64/illegal-sysreg-2.d deleted file mode 100644 index bff7ea7..0000000 --- a/gas/testsuite/gas/aarch64/illegal-sysreg-2.d +++ /dev/null @@ -1,2 +0,0 @@ -#source: illegal-sysreg-2.s -#warning_output: illegal-sysreg-2.l diff --git a/gas/testsuite/gas/aarch64/illegal-sysreg-2.l b/gas/testsuite/gas/aarch64/illegal-sysreg-2.l deleted file mode 100644 index 60aa5c2..0000000 --- a/gas/testsuite/gas/aarch64/illegal-sysreg-2.l +++ /dev/null @@ -1,2 +0,0 @@ -.*: Assembler messages: -.*: Warning: specified register cannot be written to at operand 1 -- `msr pmsidr_el1,x0' diff --git a/gas/testsuite/gas/aarch64/illegal-sysreg-2.s b/gas/testsuite/gas/aarch64/illegal-sysreg-2.s deleted file mode 100644 index f95584c..0000000 --- a/gas/testsuite/gas/aarch64/illegal-sysreg-2.s +++ /dev/null @@ -1,3 +0,0 @@ -/* Write to R/O system registers. */ -.arch armv8.2-a+profile -msr pmsidr_el1, x0 diff --git a/gas/testsuite/gas/aarch64/illegal-sysreg-3.d b/gas/testsuite/gas/aarch64/illegal-sysreg-3.d deleted file mode 100644 index 932eb54..0000000 --- a/gas/testsuite/gas/aarch64/illegal-sysreg-3.d +++ /dev/null @@ -1,3 +0,0 @@ -#as: -march=armv8-a -#source: sysreg-3.s -#error_output: illegal-sysreg-3.l diff --git a/gas/testsuite/gas/aarch64/illegal-sysreg-3.l b/gas/testsuite/gas/aarch64/illegal-sysreg-3.l deleted file mode 100644 index 513fdb7..0000000 --- a/gas/testsuite/gas/aarch64/illegal-sysreg-3.l +++ /dev/null @@ -1,41 +0,0 @@ -[^:]*: Assembler messages: -[^:]*:[0-9]+: Error: selected processor does not support system register name 'apiakeylo_el1' -[^:]*:[0-9]+: *Info: macro .* -[^:]*:[0-9]+: Error: selected processor does not support system register name 'apiakeylo_el1' -[^:]*:[0-9]+: *Info: macro .* -[^:]*:[0-9]+: Error: selected processor does not support system register name 'apiakeyhi_el1' -[^:]*:[0-9]+: *Info: macro .* -[^:]*:[0-9]+: Error: selected processor does not support system register name 'apiakeyhi_el1' -[^:]*:[0-9]+: *Info: macro .* -[^:]*:[0-9]+: Error: selected processor does not support system register name 'apibkeylo_el1' -[^:]*:[0-9]+: *Info: macro .* -[^:]*:[0-9]+: Error: selected processor does not support system register name 'apibkeylo_el1' -[^:]*:[0-9]+: *Info: macro .* -[^:]*:[0-9]+: Error: selected processor does not support system register name 'apibkeyhi_el1' -[^:]*:[0-9]+: *Info: macro .* -[^:]*:[0-9]+: Error: selected processor does not support system register name 'apibkeyhi_el1' -[^:]*:[0-9]+: *Info: macro .* -[^:]*:[0-9]+: Error: selected processor does not support system register name 'apdakeylo_el1' -[^:]*:[0-9]+: *Info: macro .* -[^:]*:[0-9]+: Error: selected processor does not support system register name 'apdakeylo_el1' -[^:]*:[0-9]+: *Info: macro .* -[^:]*:[0-9]+: Error: selected processor does not support system register name 'apdakeyhi_el1' -[^:]*:[0-9]+: *Info: macro .* -[^:]*:[0-9]+: Error: selected processor does not support system register name 'apdakeyhi_el1' -[^:]*:[0-9]+: *Info: macro .* -[^:]*:[0-9]+: Error: selected processor does not support system register name 'apdbkeylo_el1' -[^:]*:[0-9]+: *Info: macro .* -[^:]*:[0-9]+: Error: selected processor does not support system register name 'apdbkeylo_el1' -[^:]*:[0-9]+: *Info: macro .* -[^:]*:[0-9]+: Error: selected processor does not support system register name 'apdbkeyhi_el1' -[^:]*:[0-9]+: *Info: macro .* -[^:]*:[0-9]+: Error: selected processor does not support system register name 'apdbkeyhi_el1' -[^:]*:[0-9]+: *Info: macro .* -[^:]*:[0-9]+: Error: selected processor does not support system register name 'apgakeylo_el1' -[^:]*:[0-9]+: *Info: macro .* -[^:]*:[0-9]+: Error: selected processor does not support system register name 'apgakeylo_el1' -[^:]*:[0-9]+: *Info: macro .* -[^:]*:[0-9]+: Error: selected processor does not support system register name 'apgakeyhi_el1' -[^:]*:[0-9]+: *Info: macro .* -[^:]*:[0-9]+: Error: selected processor does not support system register name 'apgakeyhi_el1' -[^:]*:[0-9]+: *Info: macro .* diff --git a/gas/testsuite/gas/aarch64/illegal-sysreg-4.d b/gas/testsuite/gas/aarch64/illegal-sysreg-4.d deleted file mode 100644 index e181566..0000000 --- a/gas/testsuite/gas/aarch64/illegal-sysreg-4.d +++ /dev/null @@ -1,3 +0,0 @@ -#as: -march=armv8-a -#source: sysreg-4.s -#error_output: illegal-sysreg-4.l diff --git a/gas/testsuite/gas/aarch64/illegal-sysreg-4.l b/gas/testsuite/gas/aarch64/illegal-sysreg-4.l deleted file mode 100644 index 590f20e..0000000 --- a/gas/testsuite/gas/aarch64/illegal-sysreg-4.l +++ /dev/null @@ -1,56 +0,0 @@ -[^:]*: Assembler messages: -[^:]*:[0-9]+: Error: selected processor does not support system register name 'rctx' -[^:]*:[0-9]+: Error: selected processor does not support `cfp rctx,x1' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'rctx' -[^:]*:[0-9]+: Error: selected processor does not support `dvp rctx,x2' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'rctx' -[^:]*:[0-9]+: Error: selected processor does not support `cpp rctx,x3' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'cvadp' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'rndr' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'rndrrs' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'scxtnum_el0' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'scxtnum_el1' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'scxtnum_el2' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'scxtnum_el3' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'scxtnum_el12' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'id_pfr2_el1' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'tco' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'tco' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'tfsre0_el1' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'tfsr_el1' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'tfsr_el2' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'tfsr_el3' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'tfsr_el12' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'rgsr_el1' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'gcr_el1' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'gmid_el1' -[^:]*:[0-9]+: Error: selected processor does not support PSTATE field name 'tco' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'tco' -[^:]*:[0-9]+: Error: selected processor does not support PSTATE field name 'tco' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'tco' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'tfsre0_el1' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'tfsr_el1' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'tfsr_el2' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'tfsr_el3' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'tfsr_el12' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'rgsr_el1' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'gcr_el1' -[^:]*:[0-9]+: Error: selected processor does not support PSTATE field name 'tco' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'igvac' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'igsw' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'cgsw' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'cigsw' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'cgvac' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'cgvap' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'cgvadp' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'cigvac' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'gva' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'igdvac' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'igdsw' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'cgdsw' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'cigdsw' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'cgdvac' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'cgdvap' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'cgdvadp' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'cigdvac' -[^:]*:[0-9]+: Error: selected processor does not support system register name 'gzva' diff --git a/gas/testsuite/gas/aarch64/illegal-sysreg-4b.d b/gas/testsuite/gas/aarch64/illegal-sysreg-4b.d deleted file mode 100644 index 1504f5f..0000000 --- a/gas/testsuite/gas/aarch64/illegal-sysreg-4b.d +++ /dev/null @@ -1,2 +0,0 @@ -#as: -march=armv8-a -#error_output: illegal-sysreg-4b.l diff --git a/gas/testsuite/gas/aarch64/illegal-sysreg-4b.l b/gas/testsuite/gas/aarch64/illegal-sysreg-4b.l deleted file mode 100644 index 69987b4..0000000 --- a/gas/testsuite/gas/aarch64/illegal-sysreg-4b.l +++ /dev/null @@ -1,11 +0,0 @@ -[^:]*: Assembler messages: -[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr TCO,#-1' -[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr TCO,#2' -[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr TCO,#15' -[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr TCO,#0x100000000' -[^:]*:[0-9]+: Error: immediate value out of range 0 to 15 at operand 2 -- `msr daifclr,#-1' -[^:]*:[0-9]+: Error: immediate value out of range 0 to 15 at operand 2 -- `msr daifclr,#16' -[^:]*:[0-9]+: Error: immediate value out of range 0 to 15 at operand 2 -- `msr daifclr,#0x200000000' -[^:]*:[0-9]+: Error: immediate value out of range 0 to 15 at operand 2 -- `msr daifset,#-1' -[^:]*:[0-9]+: Error: immediate value out of range 0 to 15 at operand 2 -- `msr daifset,#16' -[^:]*:[0-9]+: Error: immediate value out of range 0 to 15 at operand 2 -- `msr daifset,#0x200000000' diff --git a/gas/testsuite/gas/aarch64/illegal-sysreg-4b.s b/gas/testsuite/gas/aarch64/illegal-sysreg-4b.s deleted file mode 100644 index d7e8476..0000000 --- a/gas/testsuite/gas/aarch64/illegal-sysreg-4b.s +++ /dev/null @@ -1,14 +0,0 @@ - .arch armv8.5-a+memtag - - msr TCO, #-1 - msr TCO, #2 - msr TCO, #15 - msr TCO, #0x100000000 - - msr daifclr, #-1 - msr daifclr, #16 - msr daifclr, #0x200000000 - - msr daifset, #-1 - msr daifset, #16 - msr daifset, #0x200000000 diff --git a/gas/testsuite/gas/aarch64/illegal-sysreg-5.d b/gas/testsuite/gas/aarch64/illegal-sysreg-5.d deleted file mode 100644 index d108d0f..0000000 --- a/gas/testsuite/gas/aarch64/illegal-sysreg-5.d +++ /dev/null @@ -1,3 +0,0 @@ -#as: -march=armv8.3-a -#source: sysreg-5.s -#error_output: illegal-sysreg-5.l diff --git a/gas/testsuite/gas/aarch64/illegal-sysreg-5.l b/gas/testsuite/gas/aarch64/illegal-sysreg-5.l deleted file mode 100644 index cd3eff8..0000000 --- a/gas/testsuite/gas/aarch64/illegal-sysreg-5.l +++ /dev/null @@ -1,2 +0,0 @@ -[^:]*: Assembler messages: -[^:]*:[0-9]+: Error: selected processor does not support system register name 'rvae1is' diff --git a/gas/testsuite/gas/aarch64/illegal-sysreg-7.d b/gas/testsuite/gas/aarch64/illegal-sysreg-7.d deleted file mode 100644 index 98bc9a0..0000000 --- a/gas/testsuite/gas/aarch64/illegal-sysreg-7.d +++ /dev/null @@ -1,2 +0,0 @@ -#source: illegal-sysreg-7.s -#error_output: illegal-sysreg-7.l diff --git a/gas/testsuite/gas/aarch64/illegal-sysreg-7.l b/gas/testsuite/gas/aarch64/illegal-sysreg-7.l deleted file mode 100644 index 697b706..0000000 --- a/gas/testsuite/gas/aarch64/illegal-sysreg-7.l +++ /dev/null @@ -1,6 +0,0 @@ -.*: Assembler messages: -.*: Error: selected processor does not support system register name 'lorc_el1' -.*: Error: selected processor does not support system register name 'lorea_el1' -.*: Error: selected processor does not support system register name 'lorn_el1' -.*: Error: selected processor does not support system register name 'lorsa_el1' -.*: Warning: specified register cannot be written to at operand 1 -- `msr ich_vtr_el2,x0' diff --git a/gas/testsuite/gas/aarch64/illegal-sysreg-7.s b/gas/testsuite/gas/aarch64/illegal-sysreg-7.s deleted file mode 100644 index 3109453..0000000 --- a/gas/testsuite/gas/aarch64/illegal-sysreg-7.s +++ /dev/null @@ -1,8 +0,0 @@ -/* Missing +lor. */ -mrs x0, lorc_el1 -mrs x0, lorea_el1 -mrs x0, lorn_el1 -mrs x0, lorsa_el1 - -/* Write to R/O system registers. */ -msr ich_vtr_el2, x0 diff --git a/gas/testsuite/gas/aarch64/illegal-sysreg-8.d b/gas/testsuite/gas/aarch64/illegal-sysreg-8.d deleted file mode 100644 index f0c0d60..0000000 --- a/gas/testsuite/gas/aarch64/illegal-sysreg-8.d +++ /dev/null @@ -1 +0,0 @@ -#error_output: illegal-sysreg-8.l diff --git a/gas/testsuite/gas/aarch64/illegal-sysreg-8.l b/gas/testsuite/gas/aarch64/illegal-sysreg-8.l deleted file mode 100644 index 773e8d8..0000000 --- a/gas/testsuite/gas/aarch64/illegal-sysreg-8.l +++ /dev/null @@ -1,377 +0,0 @@ -.*: Assembler messages: -.*: Error: selected processor does not support system register name 'lorid_el1' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'ccsidr2_el1' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'rcwmask_el1' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'rcwmask_el1' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'rcwsmask_el1' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'rcwsmask_el1' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'trfcr_el1' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'trfcr_el1' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'pmmir_el1' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'trfcr_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'trfcr_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'trfcr_el12' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'trfcr_el12' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amcr_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amcr_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amcfgr_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amcgcr_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amuserenr_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amuserenr_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amcntenclr0_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amcntenclr0_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amcntenset0_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amcntenset0_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amcntenclr1_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amcntenclr1_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amcntenset1_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amcntenset1_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr00_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr00_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr01_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr01_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr02_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr02_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr03_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr03_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevtyper00_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevtyper01_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevtyper02_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevtyper03_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr10_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr10_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr11_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr11_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr12_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr12_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr13_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr13_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr14_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr14_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr15_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr15_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr16_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr16_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr17_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr17_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr18_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr18_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr19_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr19_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr110_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr110_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr111_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr111_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr112_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr112_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr113_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr113_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr114_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr114_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr115_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntr115_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevtyper10_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevtyper10_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevtyper11_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevtyper11_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevtyper12_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevtyper12_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevtyper13_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevtyper13_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevtyper14_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevtyper14_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevtyper15_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevtyper15_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevtyper16_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevtyper16_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevtyper17_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevtyper17_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevtyper18_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevtyper18_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevtyper19_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevtyper19_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevtyper110_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevtyper110_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevtyper111_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevtyper111_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevtyper112_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevtyper112_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevtyper113_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevtyper113_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevtyper114_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevtyper114_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevtyper115_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevtyper115_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amcg1idr_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'cntpctss_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'cntvctss_el0' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'hfgrtr_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'hfgrtr_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'hfgwtr_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'hfgwtr_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'hfgitr_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'hfgitr_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'hdfgrtr_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'hdfgrtr_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'hdfgwtr_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'hdfgwtr_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'hafgrtr_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'hafgrtr_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff00_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff00_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff01_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff01_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff02_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff02_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff03_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff03_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff04_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff04_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff05_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff05_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff06_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff06_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff07_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff07_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff08_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff08_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff09_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff09_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff010_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff010_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff011_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff011_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff012_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff012_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff013_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff013_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff014_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff014_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff015_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff015_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff10_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff10_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff11_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff11_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff12_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff12_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff13_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff13_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff14_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff14_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff15_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff15_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff16_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff16_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff17_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff17_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff18_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff18_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff19_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff19_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff110_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff110_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff111_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff111_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff112_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff112_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff113_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff113_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff114_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff114_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff115_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'amevcntvoff115_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'cntpoff_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'cntpoff_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'pmsnevfr_el1' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'pmsnevfr_el1' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'hcrx_el2' -.*: *Info: macro .* -.*: Error: selected processor does not support system register name 'hcrx_el2' -.*: *Info: macro .* diff --git a/gas/testsuite/gas/aarch64/illegal-sysreg-8.s b/gas/testsuite/gas/aarch64/illegal-sysreg-8.s deleted file mode 100644 index 0ce61dd..0000000 --- a/gas/testsuite/gas/aarch64/illegal-sysreg-8.s +++ /dev/null @@ -1,127 +0,0 @@ - .macro roreg, name - mrs x0, \name - .endm - - .macro woreg, name - msr \name, x1 - .endm - - .macro rwreg, name - mrs x2, \name - msr \name, x3 - .endm - - roreg lorid_el1 - - .arch armv8.2-a - - roreg ccsidr2_el1 - rwreg rcwmask_el1 - rwreg rcwsmask_el1 - - .arch armv8.3-a - - rwreg trfcr_el1 - roreg pmmir_el1 - rwreg trfcr_el2 - - rwreg trfcr_el12 - - rwreg amcr_el0 - roreg amcfgr_el0 - roreg amcgcr_el0 - rwreg amuserenr_el0 - rwreg amcntenclr0_el0 - rwreg amcntenset0_el0 - rwreg amcntenclr1_el0 - rwreg amcntenset1_el0 - rwreg amevcntr00_el0 - rwreg amevcntr01_el0 - rwreg amevcntr02_el0 - rwreg amevcntr03_el0 - roreg amevtyper00_el0 - roreg amevtyper01_el0 - roreg amevtyper02_el0 - roreg amevtyper03_el0 - rwreg amevcntr10_el0 - rwreg amevcntr11_el0 - rwreg amevcntr12_el0 - rwreg amevcntr13_el0 - rwreg amevcntr14_el0 - rwreg amevcntr15_el0 - rwreg amevcntr16_el0 - rwreg amevcntr17_el0 - rwreg amevcntr18_el0 - rwreg amevcntr19_el0 - rwreg amevcntr110_el0 - rwreg amevcntr111_el0 - rwreg amevcntr112_el0 - rwreg amevcntr113_el0 - rwreg amevcntr114_el0 - rwreg amevcntr115_el0 - rwreg amevtyper10_el0 - rwreg amevtyper11_el0 - rwreg amevtyper12_el0 - rwreg amevtyper13_el0 - rwreg amevtyper14_el0 - rwreg amevtyper15_el0 - rwreg amevtyper16_el0 - rwreg amevtyper17_el0 - rwreg amevtyper18_el0 - rwreg amevtyper19_el0 - rwreg amevtyper110_el0 - rwreg amevtyper111_el0 - rwreg amevtyper112_el0 - rwreg amevtyper113_el0 - rwreg amevtyper114_el0 - rwreg amevtyper115_el0 - - .arch armv8.5-a - - roreg amcg1idr_el0 - roreg cntpctss_el0 - roreg cntvctss_el0 - rwreg hfgrtr_el2 - rwreg hfgwtr_el2 - rwreg hfgitr_el2 - rwreg hdfgrtr_el2 - rwreg hdfgwtr_el2 - rwreg hafgrtr_el2 - rwreg amevcntvoff00_el2 - rwreg amevcntvoff01_el2 - rwreg amevcntvoff02_el2 - rwreg amevcntvoff03_el2 - rwreg amevcntvoff04_el2 - rwreg amevcntvoff05_el2 - rwreg amevcntvoff06_el2 - rwreg amevcntvoff07_el2 - rwreg amevcntvoff08_el2 - rwreg amevcntvoff09_el2 - rwreg amevcntvoff010_el2 - rwreg amevcntvoff011_el2 - rwreg amevcntvoff012_el2 - rwreg amevcntvoff013_el2 - rwreg amevcntvoff014_el2 - rwreg amevcntvoff015_el2 - rwreg amevcntvoff10_el2 - rwreg amevcntvoff11_el2 - rwreg amevcntvoff12_el2 - rwreg amevcntvoff13_el2 - rwreg amevcntvoff14_el2 - rwreg amevcntvoff15_el2 - rwreg amevcntvoff16_el2 - rwreg amevcntvoff17_el2 - rwreg amevcntvoff18_el2 - rwreg amevcntvoff19_el2 - rwreg amevcntvoff110_el2 - rwreg amevcntvoff111_el2 - rwreg amevcntvoff112_el2 - rwreg amevcntvoff113_el2 - rwreg amevcntvoff114_el2 - rwreg amevcntvoff115_el2 - rwreg cntpoff_el2 - - .arch armv8.6-a - - rwreg pmsnevfr_el1 - rwreg hcrx_el2 diff --git a/gas/testsuite/gas/aarch64/illegal-sysreg-8b.d b/gas/testsuite/gas/aarch64/illegal-sysreg-8b.d deleted file mode 100644 index 4962283..0000000 --- a/gas/testsuite/gas/aarch64/illegal-sysreg-8b.d +++ /dev/null @@ -1 +0,0 @@ -#warning_output: illegal-sysreg-8b.l diff --git a/gas/testsuite/gas/aarch64/illegal-sysreg-8b.l b/gas/testsuite/gas/aarch64/illegal-sysreg-8b.l deleted file mode 100644 index 67966da..0000000 --- a/gas/testsuite/gas/aarch64/illegal-sysreg-8b.l +++ /dev/null @@ -1,59 +0,0 @@ -.*: Assembler messages: -.*: Warning: specified register cannot be written to at operand 1 -- `msr id_dfr1_el1,x1' -.*: *Info: macro .* -.*: Warning: specified register cannot be written to at operand 1 -- `msr id_mmfr5_el1,x1' -.*: *Info: macro .* -.*: Warning: specified register cannot be written to at operand 1 -- `msr id_isar6_el1,x1' -.*: *Info: macro .* -.*: Warning: specified register cannot be written to at operand 1 -- `msr icc_iar0_el1,x1' -.*: *Info: macro .* -.*: Warning: specified register cannot be read from at operand 2 -- `mrs x0,icc_eoir0_el1' -.*: *Info: macro .* -.*: Warning: specified register cannot be written to at operand 1 -- `msr icc_hppir0_el1,x1' -.*: *Info: macro .* -.*: Warning: specified register cannot be read from at operand 2 -- `mrs x0,icc_dir_el1' -.*: *Info: macro .* -.*: Warning: specified register cannot be written to at operand 1 -- `msr icc_rpr_el1,x1' -.*: *Info: macro .* -.*: Warning: specified register cannot be read from at operand 2 -- `mrs x0,icc_sgi1r_el1' -.*: *Info: macro .* -.*: Warning: specified register cannot be read from at operand 2 -- `mrs x0,icc_asgi1r_el1' -.*: *Info: macro .* -.*: Warning: specified register cannot be read from at operand 2 -- `mrs x0,icc_sgi0r_el1' -.*: *Info: macro .* -.*: Warning: specified register cannot be written to at operand 1 -- `msr icc_iar1_el1,x1' -.*: *Info: macro .* -.*: Warning: specified register cannot be read from at operand 2 -- `mrs x0,icc_eoir1_el1' -.*: *Info: macro .* -.*: Warning: specified register cannot be written to at operand 1 -- `msr icc_hppir1_el1,x1' -.*: *Info: macro .* -.*: Warning: specified register cannot be written to at operand 1 -- `msr ich_misr_el2,x1' -.*: *Info: macro .* -.*: Warning: specified register cannot be written to at operand 1 -- `msr ich_eisr_el2,x1' -.*: *Info: macro .* -.*: Warning: specified register cannot be written to at operand 1 -- `msr ich_elrsr_el2,x1' -.*: *Info: macro .* -.*: Warning: specified register cannot be written to at operand 1 -- `msr lorid_el1,x1' -.*: *Info: macro .* -.*: Warning: specified register cannot be written to at operand 1 -- `msr ccsidr2_el1,x1' -.*: *Info: macro .* -.*: Warning: specified register cannot be written to at operand 1 -- `msr pmmir_el1,x1' -.*: *Info: macro .* -.*: Warning: specified register cannot be written to at operand 1 -- `msr amcfgr_el0,x1' -.*: *Info: macro .* -.*: Warning: specified register cannot be written to at operand 1 -- `msr amcgcr_el0,x1' -.*: *Info: macro .* -.*: Warning: specified register cannot be written to at operand 1 -- `msr amevtyper00_el0,x1' -.*: *Info: macro .* -.*: Warning: specified register cannot be written to at operand 1 -- `msr amevtyper01_el0,x1' -.*: *Info: macro .* -.*: Warning: specified register cannot be written to at operand 1 -- `msr amevtyper02_el0,x1' -.*: *Info: macro .* -.*: Warning: specified register cannot be written to at operand 1 -- `msr amevtyper03_el0,x1' -.*: *Info: macro .* -.*: Warning: specified register cannot be written to at operand 1 -- `msr amcg1idr_el0,x1' -.*: *Info: macro .* -.*: Warning: specified register cannot be written to at operand 1 -- `msr cntpctss_el0,x1' -.*: *Info: macro .* -.*: Warning: specified register cannot be written to at operand 1 -- `msr cntvctss_el0,x1' -.*: *Info: macro .* diff --git a/gas/testsuite/gas/aarch64/illegal-sysreg-8b.s b/gas/testsuite/gas/aarch64/illegal-sysreg-8b.s deleted file mode 100644 index 727c94f..0000000 --- a/gas/testsuite/gas/aarch64/illegal-sysreg-8b.s +++ /dev/null @@ -1,51 +0,0 @@ - .macro roreg, name - msr \name, x1 - .endm - - .macro woreg, name - mrs x0, \name - .endm - - roreg id_dfr1_el1 - roreg id_mmfr5_el1 - roreg id_isar6_el1 - - roreg icc_iar0_el1 - woreg icc_eoir0_el1 - roreg icc_hppir0_el1 - woreg icc_dir_el1 - roreg icc_rpr_el1 - woreg icc_sgi1r_el1 - woreg icc_asgi1r_el1 - woreg icc_sgi0r_el1 - roreg icc_iar1_el1 - woreg icc_eoir1_el1 - roreg icc_hppir1_el1 - roreg ich_misr_el2 - roreg ich_eisr_el2 - roreg ich_elrsr_el2 - - .arch armv8.1-a - - roreg lorid_el1 - - .arch armv8.3-a - - roreg ccsidr2_el1 - - .arch armv8.4-a - - roreg pmmir_el1 - - roreg amcfgr_el0 - roreg amcgcr_el0 - roreg amevtyper00_el0 - roreg amevtyper01_el0 - roreg amevtyper02_el0 - roreg amevtyper03_el0 - - .arch armv8.6-a - - roreg amcg1idr_el0 - roreg cntpctss_el0 - roreg cntvctss_el0 diff --git a/gas/testsuite/gas/aarch64/illegal-sysreg128.d b/gas/testsuite/gas/aarch64/illegal-sysreg128.d deleted file mode 100644 index 05bafec..0000000 --- a/gas/testsuite/gas/aarch64/illegal-sysreg128.d +++ /dev/null @@ -1,2 +0,0 @@ -#name: Instruction validation testing for mrrs and msrr. -#error_output: illegal-sysreg128.l diff --git a/gas/testsuite/gas/aarch64/illegal-sysreg128.l b/gas/testsuite/gas/aarch64/illegal-sysreg128.l deleted file mode 100644 index a7d06b7..0000000 --- a/gas/testsuite/gas/aarch64/illegal-sysreg128.l +++ /dev/null @@ -1,11 +0,0 @@ -.*: Assembler messages: -.*: Error: 128-bit-wide accsess not allowed on selected system register 'accdata_el1' -.*: Error: 128-bit-wide accsess not allowed on selected system register 'accdata_el1' -.*: Error: operand mismatch -- `mrrs w0,w1,ttbr0_el1' -.*: Info: did you mean this\? -.*: Info: mrrs x0, x1, ttbr0_el1 -.*: Error: operand mismatch -- `msrr ttbr0_el1,w0,w1' -.*: Info: did you mean this\? -.*: Info: msrr ttbr0_el1, x0, x1 -.*: Error: reg pair must be contiguous at operand 2 -- `mrrs x0,x2,ttbr0_el1' -.*: Error: reg pair must be contiguous at operand 3 -- `msrr ttbr0_el1,x0,x2' diff --git a/gas/testsuite/gas/aarch64/illegal-sysreg128.s b/gas/testsuite/gas/aarch64/illegal-sysreg128.s deleted file mode 100644 index 90dcfef..0000000 --- a/gas/testsuite/gas/aarch64/illegal-sysreg128.s +++ /dev/null @@ -1,8 +0,0 @@ - .arch armv8.1-a+d128 - - mrrs x0, x1, accdata_el1 - msrr accdata_el1, x0, x1 - mrrs w0, w1, ttbr0_el1 - msrr ttbr0_el1, w0, w1 - mrrs x0, x2, ttbr0_el1 - msrr ttbr0_el1, x0, x2 diff --git a/gas/testsuite/gas/aarch64/invalid-sysreg-assert.d b/gas/testsuite/gas/aarch64/invalid-sysreg-assert.d deleted file mode 100644 index a6279bb..0000000 --- a/gas/testsuite/gas/aarch64/invalid-sysreg-assert.d +++ /dev/null @@ -1,3 +0,0 @@ -#name: don't assert on long system register -#source: invalid-sysreg-assert.s -#error_output: invalid-sysreg-assert.l diff --git a/gas/testsuite/gas/aarch64/invalid-sysreg-assert.l b/gas/testsuite/gas/aarch64/invalid-sysreg-assert.l deleted file mode 100644 index b604910..0000000 --- a/gas/testsuite/gas/aarch64/invalid-sysreg-assert.l +++ /dev/null @@ -1,2 +0,0 @@ -[^:]*: Assembler messages: -.*: Error: unknown or missing system register name at operand 1 -- `msr 00000000000000000000000000000000' diff --git a/gas/testsuite/gas/aarch64/invalid-sysreg-assert.s b/gas/testsuite/gas/aarch64/invalid-sysreg-assert.s deleted file mode 100644 index 8b3706f..0000000 --- a/gas/testsuite/gas/aarch64/invalid-sysreg-assert.s +++ /dev/null @@ -1,2 +0,0 @@ -// This input caused an assertion failure in parse_sys_reg. -msr 00000000000000000000000000000000 diff --git a/gas/testsuite/gas/aarch64/sme-sysreg-illegal.d b/gas/testsuite/gas/aarch64/sme-sysreg-illegal.d deleted file mode 100644 index ff0e855..0000000 --- a/gas/testsuite/gas/aarch64/sme-sysreg-illegal.d +++ /dev/null @@ -1,3 +0,0 @@ -#as: -march=armv8-a+sme -#source: sme-sysreg-illegal.s -#warning_output: sme-sysreg-illegal.l diff --git a/gas/testsuite/gas/aarch64/sme-sysreg-illegal.l b/gas/testsuite/gas/aarch64/sme-sysreg-illegal.l deleted file mode 100644 index 6baad13..0000000 --- a/gas/testsuite/gas/aarch64/sme-sysreg-illegal.l +++ /dev/null @@ -1,3 +0,0 @@ -[^:]*: Assembler messages: -[^:]*:[0-9]+: Warning: specified register cannot be written to at operand 1 -- `msr id_aa64smfr0_el1,x0' -[^:]*:[0-9]+: Warning: specified register cannot be written to at operand 1 -- `msr smidr_el1,x0' diff --git a/gas/testsuite/gas/aarch64/sme-sysreg-illegal.s b/gas/testsuite/gas/aarch64/sme-sysreg-illegal.s deleted file mode 100644 index 057a6bf..0000000 --- a/gas/testsuite/gas/aarch64/sme-sysreg-illegal.s +++ /dev/null @@ -1,3 +0,0 @@ -/* Write to r/o SME system registers. */ -msr id_aa64smfr0_el1, x0 -msr smidr_el1, x0 diff --git a/gas/testsuite/gas/aarch64/sme-sysreg.d b/gas/testsuite/gas/aarch64/sme-sysreg.d deleted file mode 100644 index 8eaf73c..0000000 --- a/gas/testsuite/gas/aarch64/sme-sysreg.d +++ /dev/null @@ -1,29 +0,0 @@ -#name: SME extension (system registers) -#as: -march=armv8-a+sme -#objdump: -dr - -.*: file format .* - -Disassembly of section \.text: - -0+ <.*>: - 0: d53b4240 mrs x0, svcr - 4: d53804a0 mrs x0, id_aa64smfr0_el1 - 8: d53812c0 mrs x0, smcr_el1 - c: d53d12c0 mrs x0, smcr_el12 - 10: d53c12c0 mrs x0, smcr_el2 - 14: d53e12c0 mrs x0, smcr_el3 - 18: d5381280 mrs x0, smpri_el1 - 1c: d53c12a0 mrs x0, smprimap_el2 - 20: d53900c0 mrs x0, smidr_el1 - 24: d53bd0a0 mrs x0, tpidr2_el0 - 28: d538a560 mrs x0, mpamsm_el1 - 2c: d51b4240 msr svcr, x0 - 30: d51812c0 msr smcr_el1, x0 - 34: d51d12c0 msr smcr_el12, x0 - 38: d51c12c0 msr smcr_el2, x0 - 3c: d51e12c0 msr smcr_el3, x0 - 40: d5181280 msr smpri_el1, x0 - 44: d51c12a0 msr smprimap_el2, x0 - 48: d51bd0a0 msr tpidr2_el0, x0 - 4c: d518a560 msr mpamsm_el1, x0 diff --git a/gas/testsuite/gas/aarch64/sme-sysreg.s b/gas/testsuite/gas/aarch64/sme-sysreg.s deleted file mode 100644 index ce8a294..0000000 --- a/gas/testsuite/gas/aarch64/sme-sysreg.s +++ /dev/null @@ -1,23 +0,0 @@ -/* Read SME system registers. */ -mrs x0, svcr -mrs x0, id_aa64smfr0_el1 -mrs x0, smcr_el1 -mrs x0, smcr_el12 -mrs x0, smcr_el2 -mrs x0, smcr_el3 -mrs x0, smpri_el1 -mrs x0, smprimap_el2 -mrs x0, smidr_el1 -mrs x0, tpidr2_el0 -mrs x0, mpamsm_el1 - -/* Write to SME system registers. */ -msr svcr, x0 -msr smcr_el1, x0 -msr smcr_el12, x0 -msr smcr_el2, x0 -msr smcr_el3, x0 -msr smpri_el1, x0 -msr smprimap_el2, x0 -msr tpidr2_el0, x0 -msr mpamsm_el1, x0 diff --git a/gas/testsuite/gas/aarch64/sve-sysreg-invalid.d b/gas/testsuite/gas/aarch64/sve-sysreg-invalid.d deleted file mode 100644 index bfe2d27..0000000 --- a/gas/testsuite/gas/aarch64/sve-sysreg-invalid.d +++ /dev/null @@ -1,3 +0,0 @@ -#as: -march=armv8-a+nosve -#source: sve-sysreg.s -#error_output: sve-sysreg-invalid.l diff --git a/gas/testsuite/gas/aarch64/sve-sysreg-invalid.l b/gas/testsuite/gas/aarch64/sve-sysreg-invalid.l deleted file mode 100644 index 0eaefe1..0000000 --- a/gas/testsuite/gas/aarch64/sve-sysreg-invalid.l +++ /dev/null @@ -1,19 +0,0 @@ -.*: Assembler messages: -.*:1: Error: selected processor does not support system register name 'id_aa64zfr0_el1' -.*:2: Error: selected processor does not support system register name 'id_aa64zfr0_el1' -.*:4: Error: selected processor does not support system register name 'zcr_el1' -.*:5: Error: selected processor does not support system register name 'zcr_el1' -.*:6: Error: selected processor does not support system register name 'zcr_el1' -.*:7: Error: selected processor does not support system register name 'zcr_el1' -.*:9: Error: selected processor does not support system register name 'zcr_el12' -.*:10: Error: selected processor does not support system register name 'zcr_el12' -.*:11: Error: selected processor does not support system register name 'zcr_el12' -.*:12: Error: selected processor does not support system register name 'zcr_el12' -.*:14: Error: selected processor does not support system register name 'zcr_el2' -.*:15: Error: selected processor does not support system register name 'zcr_el2' -.*:16: Error: selected processor does not support system register name 'zcr_el2' -.*:17: Error: selected processor does not support system register name 'zcr_el2' -.*:19: Error: selected processor does not support system register name 'zcr_el3' -.*:20: Error: selected processor does not support system register name 'zcr_el3' -.*:21: Error: selected processor does not support system register name 'zcr_el3' -.*:22: Error: selected processor does not support system register name 'zcr_el3' diff --git a/gas/testsuite/gas/aarch64/sve-sysreg.d b/gas/testsuite/gas/aarch64/sve-sysreg.d deleted file mode 100644 index 22d9e5ac..0000000 --- a/gas/testsuite/gas/aarch64/sve-sysreg.d +++ /dev/null @@ -1,27 +0,0 @@ -#as: -march=armv8-a+sve -#objdump: -dr - - -.* file format .* - -Disassembly of section .*: - -0+ <.*>: -.*: d5380480 mrs x0, id_aa64zfr0_el1 -.*: d538049b mrs x27, id_aa64zfr0_el1 -.*: d5381200 mrs x0, zcr_el1 -.*: d538121b mrs x27, zcr_el1 -.*: d5181200 msr zcr_el1, x0 -.*: d518121a msr zcr_el1, x26 -.*: d53d1200 mrs x0, zcr_el12 -.*: d53d121b mrs x27, zcr_el12 -.*: d51d1200 msr zcr_el12, x0 -.*: d51d121a msr zcr_el12, x26 -.*: d53c1200 mrs x0, zcr_el2 -.*: d53c121b mrs x27, zcr_el2 -.*: d51c1200 msr zcr_el2, x0 -.*: d51c121a msr zcr_el2, x26 -.*: d53e1200 mrs x0, zcr_el3 -.*: d53e121b mrs x27, zcr_el3 -.*: d51e1200 msr zcr_el3, x0 -.*: d51e121a msr zcr_el3, x26 diff --git a/gas/testsuite/gas/aarch64/sve-sysreg.s b/gas/testsuite/gas/aarch64/sve-sysreg.s deleted file mode 100644 index 90e0951..0000000 --- a/gas/testsuite/gas/aarch64/sve-sysreg.s +++ /dev/null @@ -1,22 +0,0 @@ - mrs x0, ID_AA64ZFR0_EL1 - mrs X27, id_aa64zfr0_el1 - - mrs x0, ZCR_EL1 - mrs X27, zcr_el1 - msr ZCR_EL1, X0 - msr zcr_el1, x26 - - mrs x0, ZCR_EL12 - mrs X27, zcr_el12 - msr ZCR_EL12, X0 - msr zcr_el12, x26 - - mrs x0, ZCR_EL2 - mrs X27, zcr_el2 - msr ZCR_EL2, X0 - msr zcr_el2, x26 - - mrs x0, ZCR_EL3 - mrs X27, zcr_el3 - msr ZCR_EL3, X0 - msr zcr_el3, x26 diff --git a/gas/testsuite/gas/aarch64/sysreg-1.d b/gas/testsuite/gas/aarch64/sysreg-1.d deleted file mode 100644 index fb9991d..0000000 --- a/gas/testsuite/gas/aarch64/sysreg-1.d +++ /dev/null @@ -1,4295 +0,0 @@ -#objdump: -dr - -.*: file format .* - -Disassembly of section \.text: - -0+ <.*>: - 0: d5380587 mrs x7, id_aa64afr0_el1 - 4: d53805a7 mrs x7, id_aa64afr1_el1 - 8: d5380347 mrs x7, mvfr2_el1 - c: d51b4527 msr dlr_el0, x7 - 10: d53b4527 mrs x7, dlr_el0 - 14: d51b4507 msr dspsr_el0, x7 - 18: d53b4507 mrs x7, dspsr_el0 - 1c: d51e1127 msr sder32_el3, x7 - 20: d53e1127 mrs x7, sder32_el3 - 24: d51e1327 msr mdcr_el3, x7 - 28: d53e1327 mrs x7, mdcr_el3 - 2c: d5100207 msr mdccint_el1, x7 - 30: d5300207 mrs x7, mdccint_el1 - 34: d5140707 msr dbgvcr32_el2, x7 - 38: d5340707 mrs x7, dbgvcr32_el2 - 3c: d51c5307 msr fpexc32_el2, x7 - 40: d53c5307 mrs x7, fpexc32_el2 - 44: d5120007 msr teecr32_el1, x7 - 48: d5320007 mrs x7, teecr32_el1 - 4c: d5121007 msr teehbr32_el1, x7 - 50: d5321007 mrs x7, teehbr32_el1 - 54: d51be207 msr cntp_tval_el0, x7 - 58: d53be207 mrs x7, cntp_tval_el0 - 5c: d51be227 msr cntp_ctl_el0, x7 - 60: d53be227 mrs x7, cntp_ctl_el0 - 64: d51be247 msr cntp_cval_el0, x7 - 68: d53be247 mrs x7, cntp_cval_el0 - 6c: d51fe207 msr cntps_tval_el1, x7 - 70: d53fe207 mrs x7, cntps_tval_el1 - 74: d51fe227 msr cntps_ctl_el1, x7 - 78: d53fe227 mrs x7, cntps_ctl_el1 - 7c: d51fe247 msr cntps_cval_el1, x7 - 80: d53fe247 mrs x7, cntps_cval_el1 - 84: d51b9d07 msr pmccntr_el0, x7 - 88: d53b9d07 mrs x7, pmccntr_el0 - 8c: d51be807 msr pmevcntr0_el0, x7 - 90: d53be807 mrs x7, pmevcntr0_el0 - 94: d51be827 msr pmevcntr1_el0, x7 - 98: d53be827 mrs x7, pmevcntr1_el0 - 9c: d51be847 msr pmevcntr2_el0, x7 - a0: d53be847 mrs x7, pmevcntr2_el0 - a4: d51be867 msr pmevcntr3_el0, x7 - a8: d53be867 mrs x7, pmevcntr3_el0 - ac: d51be887 msr pmevcntr4_el0, x7 - b0: d53be887 mrs x7, pmevcntr4_el0 - b4: d51be8a7 msr pmevcntr5_el0, x7 - b8: d53be8a7 mrs x7, pmevcntr5_el0 - bc: d51be8c7 msr pmevcntr6_el0, x7 - c0: d53be8c7 mrs x7, pmevcntr6_el0 - c4: d51be8e7 msr pmevcntr7_el0, x7 - c8: d53be8e7 mrs x7, pmevcntr7_el0 - cc: d51be907 msr pmevcntr8_el0, x7 - d0: d53be907 mrs x7, pmevcntr8_el0 - d4: d51be927 msr pmevcntr9_el0, x7 - d8: d53be927 mrs x7, pmevcntr9_el0 - dc: d51be947 msr pmevcntr10_el0, x7 - e0: d53be947 mrs x7, pmevcntr10_el0 - e4: d51be967 msr pmevcntr11_el0, x7 - e8: d53be967 mrs x7, pmevcntr11_el0 - ec: d51be987 msr pmevcntr12_el0, x7 - f0: d53be987 mrs x7, pmevcntr12_el0 - f4: d51be9a7 msr pmevcntr13_el0, x7 - f8: d53be9a7 mrs x7, pmevcntr13_el0 - fc: d51be9c7 msr pmevcntr14_el0, x7 - 100: d53be9c7 mrs x7, pmevcntr14_el0 - 104: d51be9e7 msr pmevcntr15_el0, x7 - 108: d53be9e7 mrs x7, pmevcntr15_el0 - 10c: d51bea07 msr pmevcntr16_el0, x7 - 110: d53bea07 mrs x7, pmevcntr16_el0 - 114: d51bea27 msr pmevcntr17_el0, x7 - 118: d53bea27 mrs x7, pmevcntr17_el0 - 11c: d51bea47 msr pmevcntr18_el0, x7 - 120: d53bea47 mrs x7, pmevcntr18_el0 - 124: d51bea67 msr pmevcntr19_el0, x7 - 128: d53bea67 mrs x7, pmevcntr19_el0 - 12c: d51bea87 msr pmevcntr20_el0, x7 - 130: d53bea87 mrs x7, pmevcntr20_el0 - 134: d51beaa7 msr pmevcntr21_el0, x7 - 138: d53beaa7 mrs x7, pmevcntr21_el0 - 13c: d51beac7 msr pmevcntr22_el0, x7 - 140: d53beac7 mrs x7, pmevcntr22_el0 - 144: d51beae7 msr pmevcntr23_el0, x7 - 148: d53beae7 mrs x7, pmevcntr23_el0 - 14c: d51beb07 msr pmevcntr24_el0, x7 - 150: d53beb07 mrs x7, pmevcntr24_el0 - 154: d51beb27 msr pmevcntr25_el0, x7 - 158: d53beb27 mrs x7, pmevcntr25_el0 - 15c: d51beb47 msr pmevcntr26_el0, x7 - 160: d53beb47 mrs x7, pmevcntr26_el0 - 164: d51beb67 msr pmevcntr27_el0, x7 - 168: d53beb67 mrs x7, pmevcntr27_el0 - 16c: d51beb87 msr pmevcntr28_el0, x7 - 170: d53beb87 mrs x7, pmevcntr28_el0 - 174: d51beba7 msr pmevcntr29_el0, x7 - 178: d53beba7 mrs x7, pmevcntr29_el0 - 17c: d51bebc7 msr pmevcntr30_el0, x7 - 180: d53bebc7 mrs x7, pmevcntr30_el0 - 184: d51bec07 msr pmevtyper0_el0, x7 - 188: d53bec07 mrs x7, pmevtyper0_el0 - 18c: d51bec27 msr pmevtyper1_el0, x7 - 190: d53bec27 mrs x7, pmevtyper1_el0 - 194: d51bec47 msr pmevtyper2_el0, x7 - 198: d53bec47 mrs x7, pmevtyper2_el0 - 19c: d51bec67 msr pmevtyper3_el0, x7 - 1a0: d53bec67 mrs x7, pmevtyper3_el0 - 1a4: d51bec87 msr pmevtyper4_el0, x7 - 1a8: d53bec87 mrs x7, pmevtyper4_el0 - 1ac: d51beca7 msr pmevtyper5_el0, x7 - 1b0: d53beca7 mrs x7, pmevtyper5_el0 - 1b4: d51becc7 msr pmevtyper6_el0, x7 - 1b8: d53becc7 mrs x7, pmevtyper6_el0 - 1bc: d51bece7 msr pmevtyper7_el0, x7 - 1c0: d53bece7 mrs x7, pmevtyper7_el0 - 1c4: d51bed07 msr pmevtyper8_el0, x7 - 1c8: d53bed07 mrs x7, pmevtyper8_el0 - 1cc: d51bed27 msr pmevtyper9_el0, x7 - 1d0: d53bed27 mrs x7, pmevtyper9_el0 - 1d4: d51bed47 msr pmevtyper10_el0, x7 - 1d8: d53bed47 mrs x7, pmevtyper10_el0 - 1dc: d51bed67 msr pmevtyper11_el0, x7 - 1e0: d53bed67 mrs x7, pmevtyper11_el0 - 1e4: d51bed87 msr pmevtyper12_el0, x7 - 1e8: d53bed87 mrs x7, pmevtyper12_el0 - 1ec: d51beda7 msr pmevtyper13_el0, x7 - 1f0: d53beda7 mrs x7, pmevtyper13_el0 - 1f4: d51bedc7 msr pmevtyper14_el0, x7 - 1f8: d53bedc7 mrs x7, pmevtyper14_el0 - 1fc: d51bede7 msr pmevtyper15_el0, x7 - 200: d53bede7 mrs x7, pmevtyper15_el0 - 204: d51bee07 msr pmevtyper16_el0, x7 - 208: d53bee07 mrs x7, pmevtyper16_el0 - 20c: d51bee27 msr pmevtyper17_el0, x7 - 210: d53bee27 mrs x7, pmevtyper17_el0 - 214: d51bee47 msr pmevtyper18_el0, x7 - 218: d53bee47 mrs x7, pmevtyper18_el0 - 21c: d51bee67 msr pmevtyper19_el0, x7 - 220: d53bee67 mrs x7, pmevtyper19_el0 - 224: d51bee87 msr pmevtyper20_el0, x7 - 228: d53bee87 mrs x7, pmevtyper20_el0 - 22c: d51beea7 msr pmevtyper21_el0, x7 - 230: d53beea7 mrs x7, pmevtyper21_el0 - 234: d51beec7 msr pmevtyper22_el0, x7 - 238: d53beec7 mrs x7, pmevtyper22_el0 - 23c: d51beee7 msr pmevtyper23_el0, x7 - 240: d53beee7 mrs x7, pmevtyper23_el0 - 244: d51bef07 msr pmevtyper24_el0, x7 - 248: d53bef07 mrs x7, pmevtyper24_el0 - 24c: d51bef27 msr pmevtyper25_el0, x7 - 250: d53bef27 mrs x7, pmevtyper25_el0 - 254: d51bef47 msr pmevtyper26_el0, x7 - 258: d53bef47 mrs x7, pmevtyper26_el0 - 25c: d51bef67 msr pmevtyper27_el0, x7 - 260: d53bef67 mrs x7, pmevtyper27_el0 - 264: d51bef87 msr pmevtyper28_el0, x7 - 268: d53bef87 mrs x7, pmevtyper28_el0 - 26c: d51befa7 msr pmevtyper29_el0, x7 - 270: d53befa7 mrs x7, pmevtyper29_el0 - 274: d51befc7 msr pmevtyper30_el0, x7 - 278: d53befc7 mrs x7, pmevtyper30_el0 - 27c: d51befe7 msr pmccfiltr_el0, x7 - 280: d53befe7 mrs x7, pmccfiltr_el0 - 284: d51bd067 msr tpidrro_el0, x7 - 288: d53bd067 mrs x7, tpidrro_el0 - 28c: d51bd047 msr tpidr_el0, x7 - 290: d53bd047 mrs x7, tpidr_el0 - 294: d51be007 msr cntfrq_el0, x7 - 298: d53be007 mrs x7, cntfrq_el0 - 29c: d518b00f msr s3_0_c11_c0_0, x15 - 2a0: d538b00f mrs x15, s3_0_c11_c0_0 - 2a4: d518b02f msr s3_0_c11_c0_1, x15 - 2a8: d538b02f mrs x15, s3_0_c11_c0_1 - 2ac: d518b04f msr s3_0_c11_c0_2, x15 - 2b0: d538b04f mrs x15, s3_0_c11_c0_2 - 2b4: d518b06f msr s3_0_c11_c0_3, x15 - 2b8: d538b06f mrs x15, s3_0_c11_c0_3 - 2bc: d518b08f msr s3_0_c11_c0_4, x15 - 2c0: d538b08f mrs x15, s3_0_c11_c0_4 - 2c4: d518b0af msr s3_0_c11_c0_5, x15 - 2c8: d538b0af mrs x15, s3_0_c11_c0_5 - 2cc: d518b0cf msr s3_0_c11_c0_6, x15 - 2d0: d538b0cf mrs x15, s3_0_c11_c0_6 - 2d4: d518b0ef msr s3_0_c11_c0_7, x15 - 2d8: d538b0ef mrs x15, s3_0_c11_c0_7 - 2dc: d518b10f msr s3_0_c11_c1_0, x15 - 2e0: d538b10f mrs x15, s3_0_c11_c1_0 - 2e4: d518b12f msr s3_0_c11_c1_1, x15 - 2e8: d538b12f mrs x15, s3_0_c11_c1_1 - 2ec: d518b14f msr s3_0_c11_c1_2, x15 - 2f0: d538b14f mrs x15, s3_0_c11_c1_2 - 2f4: d518b16f msr s3_0_c11_c1_3, x15 - 2f8: d538b16f mrs x15, s3_0_c11_c1_3 - 2fc: d518b18f msr s3_0_c11_c1_4, x15 - 300: d538b18f mrs x15, s3_0_c11_c1_4 - 304: d518b1af msr s3_0_c11_c1_5, x15 - 308: d538b1af mrs x15, s3_0_c11_c1_5 - 30c: d518b1cf msr s3_0_c11_c1_6, x15 - 310: d538b1cf mrs x15, s3_0_c11_c1_6 - 314: d518b1ef msr s3_0_c11_c1_7, x15 - 318: d538b1ef mrs x15, s3_0_c11_c1_7 - 31c: d518b20f msr s3_0_c11_c2_0, x15 - 320: d538b20f mrs x15, s3_0_c11_c2_0 - 324: d518b22f msr s3_0_c11_c2_1, x15 - 328: d538b22f mrs x15, s3_0_c11_c2_1 - 32c: d518b24f msr s3_0_c11_c2_2, x15 - 330: d538b24f mrs x15, s3_0_c11_c2_2 - 334: d518b26f msr s3_0_c11_c2_3, x15 - 338: d538b26f mrs x15, s3_0_c11_c2_3 - 33c: d518b28f msr s3_0_c11_c2_4, x15 - 340: d538b28f mrs x15, s3_0_c11_c2_4 - 344: d518b2af msr s3_0_c11_c2_5, x15 - 348: d538b2af mrs x15, s3_0_c11_c2_5 - 34c: d518b2cf msr s3_0_c11_c2_6, x15 - 350: d538b2cf mrs x15, s3_0_c11_c2_6 - 354: d518b2ef msr s3_0_c11_c2_7, x15 - 358: d538b2ef mrs x15, s3_0_c11_c2_7 - 35c: d518b30f msr s3_0_c11_c3_0, x15 - 360: d538b30f mrs x15, s3_0_c11_c3_0 - 364: d518b32f msr s3_0_c11_c3_1, x15 - 368: d538b32f mrs x15, s3_0_c11_c3_1 - 36c: d518b34f msr s3_0_c11_c3_2, x15 - 370: d538b34f mrs x15, s3_0_c11_c3_2 - 374: d518b36f msr s3_0_c11_c3_3, x15 - 378: d538b36f mrs x15, s3_0_c11_c3_3 - 37c: d518b38f msr s3_0_c11_c3_4, x15 - 380: d538b38f mrs x15, s3_0_c11_c3_4 - 384: d518b3af msr s3_0_c11_c3_5, x15 - 388: d538b3af mrs x15, s3_0_c11_c3_5 - 38c: d518b3cf msr s3_0_c11_c3_6, x15 - 390: d538b3cf mrs x15, s3_0_c11_c3_6 - 394: d518b3ef msr s3_0_c11_c3_7, x15 - 398: d538b3ef mrs x15, s3_0_c11_c3_7 - 39c: d518b40f msr s3_0_c11_c4_0, x15 - 3a0: d538b40f mrs x15, s3_0_c11_c4_0 - 3a4: d518b42f msr s3_0_c11_c4_1, x15 - 3a8: d538b42f mrs x15, s3_0_c11_c4_1 - 3ac: d518b44f msr s3_0_c11_c4_2, x15 - 3b0: d538b44f mrs x15, s3_0_c11_c4_2 - 3b4: d518b46f msr s3_0_c11_c4_3, x15 - 3b8: d538b46f mrs x15, s3_0_c11_c4_3 - 3bc: d518b48f msr s3_0_c11_c4_4, x15 - 3c0: d538b48f mrs x15, s3_0_c11_c4_4 - 3c4: d518b4af msr s3_0_c11_c4_5, x15 - 3c8: d538b4af mrs x15, s3_0_c11_c4_5 - 3cc: d518b4cf msr s3_0_c11_c4_6, x15 - 3d0: d538b4cf mrs x15, s3_0_c11_c4_6 - 3d4: d518b4ef msr s3_0_c11_c4_7, x15 - 3d8: d538b4ef mrs x15, s3_0_c11_c4_7 - 3dc: d518b50f msr s3_0_c11_c5_0, x15 - 3e0: d538b50f mrs x15, s3_0_c11_c5_0 - 3e4: d518b52f msr s3_0_c11_c5_1, x15 - 3e8: d538b52f mrs x15, s3_0_c11_c5_1 - 3ec: d518b54f msr s3_0_c11_c5_2, x15 - 3f0: d538b54f mrs x15, s3_0_c11_c5_2 - 3f4: d518b56f msr s3_0_c11_c5_3, x15 - 3f8: d538b56f mrs x15, s3_0_c11_c5_3 - 3fc: d518b58f msr s3_0_c11_c5_4, x15 - 400: d538b58f mrs x15, s3_0_c11_c5_4 - 404: d518b5af msr s3_0_c11_c5_5, x15 - 408: d538b5af mrs x15, s3_0_c11_c5_5 - 40c: d518b5cf msr s3_0_c11_c5_6, x15 - 410: d538b5cf mrs x15, s3_0_c11_c5_6 - 414: d518b5ef msr s3_0_c11_c5_7, x15 - 418: d538b5ef mrs x15, s3_0_c11_c5_7 - 41c: d518b60f msr s3_0_c11_c6_0, x15 - 420: d538b60f mrs x15, s3_0_c11_c6_0 - 424: d518b62f msr s3_0_c11_c6_1, x15 - 428: d538b62f mrs x15, s3_0_c11_c6_1 - 42c: d518b64f msr s3_0_c11_c6_2, x15 - 430: d538b64f mrs x15, s3_0_c11_c6_2 - 434: d518b66f msr s3_0_c11_c6_3, x15 - 438: d538b66f mrs x15, s3_0_c11_c6_3 - 43c: d518b68f msr s3_0_c11_c6_4, x15 - 440: d538b68f mrs x15, s3_0_c11_c6_4 - 444: d518b6af msr s3_0_c11_c6_5, x15 - 448: d538b6af mrs x15, s3_0_c11_c6_5 - 44c: d518b6cf msr s3_0_c11_c6_6, x15 - 450: d538b6cf mrs x15, s3_0_c11_c6_6 - 454: d518b6ef msr s3_0_c11_c6_7, x15 - 458: d538b6ef mrs x15, s3_0_c11_c6_7 - 45c: d518b70f msr s3_0_c11_c7_0, x15 - 460: d538b70f mrs x15, s3_0_c11_c7_0 - 464: d518b72f msr s3_0_c11_c7_1, x15 - 468: d538b72f mrs x15, s3_0_c11_c7_1 - 46c: d518b74f msr s3_0_c11_c7_2, x15 - 470: d538b74f mrs x15, s3_0_c11_c7_2 - 474: d518b76f msr s3_0_c11_c7_3, x15 - 478: d538b76f mrs x15, s3_0_c11_c7_3 - 47c: d518b78f msr s3_0_c11_c7_4, x15 - 480: d538b78f mrs x15, s3_0_c11_c7_4 - 484: d518b7af msr s3_0_c11_c7_5, x15 - 488: d538b7af mrs x15, s3_0_c11_c7_5 - 48c: d518b7cf msr s3_0_c11_c7_6, x15 - 490: d538b7cf mrs x15, s3_0_c11_c7_6 - 494: d518b7ef msr s3_0_c11_c7_7, x15 - 498: d538b7ef mrs x15, s3_0_c11_c7_7 - 49c: d518b80f msr s3_0_c11_c8_0, x15 - 4a0: d538b80f mrs x15, s3_0_c11_c8_0 - 4a4: d518b82f msr s3_0_c11_c8_1, x15 - 4a8: d538b82f mrs x15, s3_0_c11_c8_1 - 4ac: d518b84f msr s3_0_c11_c8_2, x15 - 4b0: d538b84f mrs x15, s3_0_c11_c8_2 - 4b4: d518b86f msr s3_0_c11_c8_3, x15 - 4b8: d538b86f mrs x15, s3_0_c11_c8_3 - 4bc: d518b88f msr s3_0_c11_c8_4, x15 - 4c0: d538b88f mrs x15, s3_0_c11_c8_4 - 4c4: d518b8af msr s3_0_c11_c8_5, x15 - 4c8: d538b8af mrs x15, s3_0_c11_c8_5 - 4cc: d518b8cf msr s3_0_c11_c8_6, x15 - 4d0: d538b8cf mrs x15, s3_0_c11_c8_6 - 4d4: d518b8ef msr s3_0_c11_c8_7, x15 - 4d8: d538b8ef mrs x15, s3_0_c11_c8_7 - 4dc: d518b90f msr s3_0_c11_c9_0, x15 - 4e0: d538b90f mrs x15, s3_0_c11_c9_0 - 4e4: d518b92f msr s3_0_c11_c9_1, x15 - 4e8: d538b92f mrs x15, s3_0_c11_c9_1 - 4ec: d518b94f msr s3_0_c11_c9_2, x15 - 4f0: d538b94f mrs x15, s3_0_c11_c9_2 - 4f4: d518b96f msr s3_0_c11_c9_3, x15 - 4f8: d538b96f mrs x15, s3_0_c11_c9_3 - 4fc: d518b98f msr s3_0_c11_c9_4, x15 - 500: d538b98f mrs x15, s3_0_c11_c9_4 - 504: d518b9af msr s3_0_c11_c9_5, x15 - 508: d538b9af mrs x15, s3_0_c11_c9_5 - 50c: d518b9cf msr s3_0_c11_c9_6, x15 - 510: d538b9cf mrs x15, s3_0_c11_c9_6 - 514: d518b9ef msr s3_0_c11_c9_7, x15 - 518: d538b9ef mrs x15, s3_0_c11_c9_7 - 51c: d518ba0f msr s3_0_c11_c10_0, x15 - 520: d538ba0f mrs x15, s3_0_c11_c10_0 - 524: d518ba2f msr s3_0_c11_c10_1, x15 - 528: d538ba2f mrs x15, s3_0_c11_c10_1 - 52c: d518ba4f msr s3_0_c11_c10_2, x15 - 530: d538ba4f mrs x15, s3_0_c11_c10_2 - 534: d518ba6f msr s3_0_c11_c10_3, x15 - 538: d538ba6f mrs x15, s3_0_c11_c10_3 - 53c: d518ba8f msr s3_0_c11_c10_4, x15 - 540: d538ba8f mrs x15, s3_0_c11_c10_4 - 544: d518baaf msr s3_0_c11_c10_5, x15 - 548: d538baaf mrs x15, s3_0_c11_c10_5 - 54c: d518bacf msr s3_0_c11_c10_6, x15 - 550: d538bacf mrs x15, s3_0_c11_c10_6 - 554: d518baef msr s3_0_c11_c10_7, x15 - 558: d538baef mrs x15, s3_0_c11_c10_7 - 55c: d518bb0f msr s3_0_c11_c11_0, x15 - 560: d538bb0f mrs x15, s3_0_c11_c11_0 - 564: d518bb2f msr s3_0_c11_c11_1, x15 - 568: d538bb2f mrs x15, s3_0_c11_c11_1 - 56c: d518bb4f msr s3_0_c11_c11_2, x15 - 570: d538bb4f mrs x15, s3_0_c11_c11_2 - 574: d518bb6f msr s3_0_c11_c11_3, x15 - 578: d538bb6f mrs x15, s3_0_c11_c11_3 - 57c: d518bb8f msr s3_0_c11_c11_4, x15 - 580: d538bb8f mrs x15, s3_0_c11_c11_4 - 584: d518bbaf msr s3_0_c11_c11_5, x15 - 588: d538bbaf mrs x15, s3_0_c11_c11_5 - 58c: d518bbcf msr s3_0_c11_c11_6, x15 - 590: d538bbcf mrs x15, s3_0_c11_c11_6 - 594: d518bbef msr s3_0_c11_c11_7, x15 - 598: d538bbef mrs x15, s3_0_c11_c11_7 - 59c: d518bc0f msr s3_0_c11_c12_0, x15 - 5a0: d538bc0f mrs x15, s3_0_c11_c12_0 - 5a4: d518bc2f msr s3_0_c11_c12_1, x15 - 5a8: d538bc2f mrs x15, s3_0_c11_c12_1 - 5ac: d518bc4f msr s3_0_c11_c12_2, x15 - 5b0: d538bc4f mrs x15, s3_0_c11_c12_2 - 5b4: d518bc6f msr s3_0_c11_c12_3, x15 - 5b8: d538bc6f mrs x15, s3_0_c11_c12_3 - 5bc: d518bc8f msr s3_0_c11_c12_4, x15 - 5c0: d538bc8f mrs x15, s3_0_c11_c12_4 - 5c4: d518bcaf msr s3_0_c11_c12_5, x15 - 5c8: d538bcaf mrs x15, s3_0_c11_c12_5 - 5cc: d518bccf msr s3_0_c11_c12_6, x15 - 5d0: d538bccf mrs x15, s3_0_c11_c12_6 - 5d4: d518bcef msr s3_0_c11_c12_7, x15 - 5d8: d538bcef mrs x15, s3_0_c11_c12_7 - 5dc: d518bd0f msr s3_0_c11_c13_0, x15 - 5e0: d538bd0f mrs x15, s3_0_c11_c13_0 - 5e4: d518bd2f msr s3_0_c11_c13_1, x15 - 5e8: d538bd2f mrs x15, s3_0_c11_c13_1 - 5ec: d518bd4f msr s3_0_c11_c13_2, x15 - 5f0: d538bd4f mrs x15, s3_0_c11_c13_2 - 5f4: d518bd6f msr s3_0_c11_c13_3, x15 - 5f8: d538bd6f mrs x15, s3_0_c11_c13_3 - 5fc: d518bd8f msr s3_0_c11_c13_4, x15 - 600: d538bd8f mrs x15, s3_0_c11_c13_4 - 604: d518bdaf msr s3_0_c11_c13_5, x15 - 608: d538bdaf mrs x15, s3_0_c11_c13_5 - 60c: d518bdcf msr s3_0_c11_c13_6, x15 - 610: d538bdcf mrs x15, s3_0_c11_c13_6 - 614: d518bdef msr s3_0_c11_c13_7, x15 - 618: d538bdef mrs x15, s3_0_c11_c13_7 - 61c: d518be0f msr s3_0_c11_c14_0, x15 - 620: d538be0f mrs x15, s3_0_c11_c14_0 - 624: d518be2f msr s3_0_c11_c14_1, x15 - 628: d538be2f mrs x15, s3_0_c11_c14_1 - 62c: d518be4f msr s3_0_c11_c14_2, x15 - 630: d538be4f mrs x15, s3_0_c11_c14_2 - 634: d518be6f msr s3_0_c11_c14_3, x15 - 638: d538be6f mrs x15, s3_0_c11_c14_3 - 63c: d518be8f msr s3_0_c11_c14_4, x15 - 640: d538be8f mrs x15, s3_0_c11_c14_4 - 644: d518beaf msr s3_0_c11_c14_5, x15 - 648: d538beaf mrs x15, s3_0_c11_c14_5 - 64c: d518becf msr s3_0_c11_c14_6, x15 - 650: d538becf mrs x15, s3_0_c11_c14_6 - 654: d518beef msr s3_0_c11_c14_7, x15 - 658: d538beef mrs x15, s3_0_c11_c14_7 - 65c: d518bf0f msr s3_0_c11_c15_0, x15 - 660: d538bf0f mrs x15, s3_0_c11_c15_0 - 664: d518bf2f msr s3_0_c11_c15_1, x15 - 668: d538bf2f mrs x15, s3_0_c11_c15_1 - 66c: d518bf4f msr s3_0_c11_c15_2, x15 - 670: d538bf4f mrs x15, s3_0_c11_c15_2 - 674: d518bf6f msr s3_0_c11_c15_3, x15 - 678: d538bf6f mrs x15, s3_0_c11_c15_3 - 67c: d518bf8f msr s3_0_c11_c15_4, x15 - 680: d538bf8f mrs x15, s3_0_c11_c15_4 - 684: d518bfaf msr s3_0_c11_c15_5, x15 - 688: d538bfaf mrs x15, s3_0_c11_c15_5 - 68c: d518bfcf msr s3_0_c11_c15_6, x15 - 690: d538bfcf mrs x15, s3_0_c11_c15_6 - 694: d518bfef msr s3_0_c11_c15_7, x15 - 698: d538bfef mrs x15, s3_0_c11_c15_7 - 69c: d518f00f msr s3_0_c15_c0_0, x15 - 6a0: d538f00f mrs x15, s3_0_c15_c0_0 - 6a4: d518f02f msr s3_0_c15_c0_1, x15 - 6a8: d538f02f mrs x15, s3_0_c15_c0_1 - 6ac: d518f04f msr s3_0_c15_c0_2, x15 - 6b0: d538f04f mrs x15, s3_0_c15_c0_2 - 6b4: d518f06f msr s3_0_c15_c0_3, x15 - 6b8: d538f06f mrs x15, s3_0_c15_c0_3 - 6bc: d518f08f msr s3_0_c15_c0_4, x15 - 6c0: d538f08f mrs x15, s3_0_c15_c0_4 - 6c4: d518f0af msr s3_0_c15_c0_5, x15 - 6c8: d538f0af mrs x15, s3_0_c15_c0_5 - 6cc: d518f0cf msr s3_0_c15_c0_6, x15 - 6d0: d538f0cf mrs x15, s3_0_c15_c0_6 - 6d4: d518f0ef msr s3_0_c15_c0_7, x15 - 6d8: d538f0ef mrs x15, s3_0_c15_c0_7 - 6dc: d518f10f msr s3_0_c15_c1_0, x15 - 6e0: d538f10f mrs x15, s3_0_c15_c1_0 - 6e4: d518f12f msr s3_0_c15_c1_1, x15 - 6e8: d538f12f mrs x15, s3_0_c15_c1_1 - 6ec: d518f14f msr s3_0_c15_c1_2, x15 - 6f0: d538f14f mrs x15, s3_0_c15_c1_2 - 6f4: d518f16f msr s3_0_c15_c1_3, x15 - 6f8: d538f16f mrs x15, s3_0_c15_c1_3 - 6fc: d518f18f msr s3_0_c15_c1_4, x15 - 700: d538f18f mrs x15, s3_0_c15_c1_4 - 704: d518f1af msr s3_0_c15_c1_5, x15 - 708: d538f1af mrs x15, s3_0_c15_c1_5 - 70c: d518f1cf msr s3_0_c15_c1_6, x15 - 710: d538f1cf mrs x15, s3_0_c15_c1_6 - 714: d518f1ef msr s3_0_c15_c1_7, x15 - 718: d538f1ef mrs x15, s3_0_c15_c1_7 - 71c: d518f20f msr s3_0_c15_c2_0, x15 - 720: d538f20f mrs x15, s3_0_c15_c2_0 - 724: d518f22f msr s3_0_c15_c2_1, x15 - 728: d538f22f mrs x15, s3_0_c15_c2_1 - 72c: d518f24f msr s3_0_c15_c2_2, x15 - 730: d538f24f mrs x15, s3_0_c15_c2_2 - 734: d518f26f msr s3_0_c15_c2_3, x15 - 738: d538f26f mrs x15, s3_0_c15_c2_3 - 73c: d518f28f msr s3_0_c15_c2_4, x15 - 740: d538f28f mrs x15, s3_0_c15_c2_4 - 744: d518f2af msr s3_0_c15_c2_5, x15 - 748: d538f2af mrs x15, s3_0_c15_c2_5 - 74c: d518f2cf msr s3_0_c15_c2_6, x15 - 750: d538f2cf mrs x15, s3_0_c15_c2_6 - 754: d518f2ef msr s3_0_c15_c2_7, x15 - 758: d538f2ef mrs x15, s3_0_c15_c2_7 - 75c: d518f30f msr s3_0_c15_c3_0, x15 - 760: d538f30f mrs x15, s3_0_c15_c3_0 - 764: d518f32f msr s3_0_c15_c3_1, x15 - 768: d538f32f mrs x15, s3_0_c15_c3_1 - 76c: d518f34f msr s3_0_c15_c3_2, x15 - 770: d538f34f mrs x15, s3_0_c15_c3_2 - 774: d518f36f msr s3_0_c15_c3_3, x15 - 778: d538f36f mrs x15, s3_0_c15_c3_3 - 77c: d518f38f msr s3_0_c15_c3_4, x15 - 780: d538f38f mrs x15, s3_0_c15_c3_4 - 784: d518f3af msr s3_0_c15_c3_5, x15 - 788: d538f3af mrs x15, s3_0_c15_c3_5 - 78c: d518f3cf msr s3_0_c15_c3_6, x15 - 790: d538f3cf mrs x15, s3_0_c15_c3_6 - 794: d518f3ef msr s3_0_c15_c3_7, x15 - 798: d538f3ef mrs x15, s3_0_c15_c3_7 - 79c: d518f40f msr s3_0_c15_c4_0, x15 - 7a0: d538f40f mrs x15, s3_0_c15_c4_0 - 7a4: d518f42f msr s3_0_c15_c4_1, x15 - 7a8: d538f42f mrs x15, s3_0_c15_c4_1 - 7ac: d518f44f msr s3_0_c15_c4_2, x15 - 7b0: d538f44f mrs x15, s3_0_c15_c4_2 - 7b4: d518f46f msr s3_0_c15_c4_3, x15 - 7b8: d538f46f mrs x15, s3_0_c15_c4_3 - 7bc: d518f48f msr s3_0_c15_c4_4, x15 - 7c0: d538f48f mrs x15, s3_0_c15_c4_4 - 7c4: d518f4af msr s3_0_c15_c4_5, x15 - 7c8: d538f4af mrs x15, s3_0_c15_c4_5 - 7cc: d518f4cf msr s3_0_c15_c4_6, x15 - 7d0: d538f4cf mrs x15, s3_0_c15_c4_6 - 7d4: d518f4ef msr s3_0_c15_c4_7, x15 - 7d8: d538f4ef mrs x15, s3_0_c15_c4_7 - 7dc: d518f50f msr s3_0_c15_c5_0, x15 - 7e0: d538f50f mrs x15, s3_0_c15_c5_0 - 7e4: d518f52f msr s3_0_c15_c5_1, x15 - 7e8: d538f52f mrs x15, s3_0_c15_c5_1 - 7ec: d518f54f msr s3_0_c15_c5_2, x15 - 7f0: d538f54f mrs x15, s3_0_c15_c5_2 - 7f4: d518f56f msr s3_0_c15_c5_3, x15 - 7f8: d538f56f mrs x15, s3_0_c15_c5_3 - 7fc: d518f58f msr s3_0_c15_c5_4, x15 - 800: d538f58f mrs x15, s3_0_c15_c5_4 - 804: d518f5af msr s3_0_c15_c5_5, x15 - 808: d538f5af mrs x15, s3_0_c15_c5_5 - 80c: d518f5cf msr s3_0_c15_c5_6, x15 - 810: d538f5cf mrs x15, s3_0_c15_c5_6 - 814: d518f5ef msr s3_0_c15_c5_7, x15 - 818: d538f5ef mrs x15, s3_0_c15_c5_7 - 81c: d518f60f msr s3_0_c15_c6_0, x15 - 820: d538f60f mrs x15, s3_0_c15_c6_0 - 824: d518f62f msr s3_0_c15_c6_1, x15 - 828: d538f62f mrs x15, s3_0_c15_c6_1 - 82c: d518f64f msr s3_0_c15_c6_2, x15 - 830: d538f64f mrs x15, s3_0_c15_c6_2 - 834: d518f66f msr s3_0_c15_c6_3, x15 - 838: d538f66f mrs x15, s3_0_c15_c6_3 - 83c: d518f68f msr s3_0_c15_c6_4, x15 - 840: d538f68f mrs x15, s3_0_c15_c6_4 - 844: d518f6af msr s3_0_c15_c6_5, x15 - 848: d538f6af mrs x15, s3_0_c15_c6_5 - 84c: d518f6cf msr s3_0_c15_c6_6, x15 - 850: d538f6cf mrs x15, s3_0_c15_c6_6 - 854: d518f6ef msr s3_0_c15_c6_7, x15 - 858: d538f6ef mrs x15, s3_0_c15_c6_7 - 85c: d518f70f msr s3_0_c15_c7_0, x15 - 860: d538f70f mrs x15, s3_0_c15_c7_0 - 864: d518f72f msr s3_0_c15_c7_1, x15 - 868: d538f72f mrs x15, s3_0_c15_c7_1 - 86c: d518f74f msr s3_0_c15_c7_2, x15 - 870: d538f74f mrs x15, s3_0_c15_c7_2 - 874: d518f76f msr s3_0_c15_c7_3, x15 - 878: d538f76f mrs x15, s3_0_c15_c7_3 - 87c: d518f78f msr s3_0_c15_c7_4, x15 - 880: d538f78f mrs x15, s3_0_c15_c7_4 - 884: d518f7af msr s3_0_c15_c7_5, x15 - 888: d538f7af mrs x15, s3_0_c15_c7_5 - 88c: d518f7cf msr s3_0_c15_c7_6, x15 - 890: d538f7cf mrs x15, s3_0_c15_c7_6 - 894: d518f7ef msr s3_0_c15_c7_7, x15 - 898: d538f7ef mrs x15, s3_0_c15_c7_7 - 89c: d518f80f msr s3_0_c15_c8_0, x15 - 8a0: d538f80f mrs x15, s3_0_c15_c8_0 - 8a4: d518f82f msr s3_0_c15_c8_1, x15 - 8a8: d538f82f mrs x15, s3_0_c15_c8_1 - 8ac: d518f84f msr s3_0_c15_c8_2, x15 - 8b0: d538f84f mrs x15, s3_0_c15_c8_2 - 8b4: d518f86f msr s3_0_c15_c8_3, x15 - 8b8: d538f86f mrs x15, s3_0_c15_c8_3 - 8bc: d518f88f msr s3_0_c15_c8_4, x15 - 8c0: d538f88f mrs x15, s3_0_c15_c8_4 - 8c4: d518f8af msr s3_0_c15_c8_5, x15 - 8c8: d538f8af mrs x15, s3_0_c15_c8_5 - 8cc: d518f8cf msr s3_0_c15_c8_6, x15 - 8d0: d538f8cf mrs x15, s3_0_c15_c8_6 - 8d4: d518f8ef msr s3_0_c15_c8_7, x15 - 8d8: d538f8ef mrs x15, s3_0_c15_c8_7 - 8dc: d518f90f msr s3_0_c15_c9_0, x15 - 8e0: d538f90f mrs x15, s3_0_c15_c9_0 - 8e4: d518f92f msr s3_0_c15_c9_1, x15 - 8e8: d538f92f mrs x15, s3_0_c15_c9_1 - 8ec: d518f94f msr s3_0_c15_c9_2, x15 - 8f0: d538f94f mrs x15, s3_0_c15_c9_2 - 8f4: d518f96f msr s3_0_c15_c9_3, x15 - 8f8: d538f96f mrs x15, s3_0_c15_c9_3 - 8fc: d518f98f msr s3_0_c15_c9_4, x15 - 900: d538f98f mrs x15, s3_0_c15_c9_4 - 904: d518f9af msr s3_0_c15_c9_5, x15 - 908: d538f9af mrs x15, s3_0_c15_c9_5 - 90c: d518f9cf msr s3_0_c15_c9_6, x15 - 910: d538f9cf mrs x15, s3_0_c15_c9_6 - 914: d518f9ef msr s3_0_c15_c9_7, x15 - 918: d538f9ef mrs x15, s3_0_c15_c9_7 - 91c: d518fa0f msr s3_0_c15_c10_0, x15 - 920: d538fa0f mrs x15, s3_0_c15_c10_0 - 924: d518fa2f msr s3_0_c15_c10_1, x15 - 928: d538fa2f mrs x15, s3_0_c15_c10_1 - 92c: d518fa4f msr s3_0_c15_c10_2, x15 - 930: d538fa4f mrs x15, s3_0_c15_c10_2 - 934: d518fa6f msr s3_0_c15_c10_3, x15 - 938: d538fa6f mrs x15, s3_0_c15_c10_3 - 93c: d518fa8f msr s3_0_c15_c10_4, x15 - 940: d538fa8f mrs x15, s3_0_c15_c10_4 - 944: d518faaf msr s3_0_c15_c10_5, x15 - 948: d538faaf mrs x15, s3_0_c15_c10_5 - 94c: d518facf msr s3_0_c15_c10_6, x15 - 950: d538facf mrs x15, s3_0_c15_c10_6 - 954: d518faef msr s3_0_c15_c10_7, x15 - 958: d538faef mrs x15, s3_0_c15_c10_7 - 95c: d518fb0f msr s3_0_c15_c11_0, x15 - 960: d538fb0f mrs x15, s3_0_c15_c11_0 - 964: d518fb2f msr s3_0_c15_c11_1, x15 - 968: d538fb2f mrs x15, s3_0_c15_c11_1 - 96c: d518fb4f msr s3_0_c15_c11_2, x15 - 970: d538fb4f mrs x15, s3_0_c15_c11_2 - 974: d518fb6f msr s3_0_c15_c11_3, x15 - 978: d538fb6f mrs x15, s3_0_c15_c11_3 - 97c: d518fb8f msr s3_0_c15_c11_4, x15 - 980: d538fb8f mrs x15, s3_0_c15_c11_4 - 984: d518fbaf msr s3_0_c15_c11_5, x15 - 988: d538fbaf mrs x15, s3_0_c15_c11_5 - 98c: d518fbcf msr s3_0_c15_c11_6, x15 - 990: d538fbcf mrs x15, s3_0_c15_c11_6 - 994: d518fbef msr s3_0_c15_c11_7, x15 - 998: d538fbef mrs x15, s3_0_c15_c11_7 - 99c: d518fc0f msr s3_0_c15_c12_0, x15 - 9a0: d538fc0f mrs x15, s3_0_c15_c12_0 - 9a4: d518fc2f msr s3_0_c15_c12_1, x15 - 9a8: d538fc2f mrs x15, s3_0_c15_c12_1 - 9ac: d518fc4f msr s3_0_c15_c12_2, x15 - 9b0: d538fc4f mrs x15, s3_0_c15_c12_2 - 9b4: d518fc6f msr s3_0_c15_c12_3, x15 - 9b8: d538fc6f mrs x15, s3_0_c15_c12_3 - 9bc: d518fc8f msr s3_0_c15_c12_4, x15 - 9c0: d538fc8f mrs x15, s3_0_c15_c12_4 - 9c4: d518fcaf msr s3_0_c15_c12_5, x15 - 9c8: d538fcaf mrs x15, s3_0_c15_c12_5 - 9cc: d518fccf msr s3_0_c15_c12_6, x15 - 9d0: d538fccf mrs x15, s3_0_c15_c12_6 - 9d4: d518fcef msr s3_0_c15_c12_7, x15 - 9d8: d538fcef mrs x15, s3_0_c15_c12_7 - 9dc: d518fd0f msr s3_0_c15_c13_0, x15 - 9e0: d538fd0f mrs x15, s3_0_c15_c13_0 - 9e4: d518fd2f msr s3_0_c15_c13_1, x15 - 9e8: d538fd2f mrs x15, s3_0_c15_c13_1 - 9ec: d518fd4f msr s3_0_c15_c13_2, x15 - 9f0: d538fd4f mrs x15, s3_0_c15_c13_2 - 9f4: d518fd6f msr s3_0_c15_c13_3, x15 - 9f8: d538fd6f mrs x15, s3_0_c15_c13_3 - 9fc: d518fd8f msr s3_0_c15_c13_4, x15 - a00: d538fd8f mrs x15, s3_0_c15_c13_4 - a04: d518fdaf msr s3_0_c15_c13_5, x15 - a08: d538fdaf mrs x15, s3_0_c15_c13_5 - a0c: d518fdcf msr s3_0_c15_c13_6, x15 - a10: d538fdcf mrs x15, s3_0_c15_c13_6 - a14: d518fdef msr s3_0_c15_c13_7, x15 - a18: d538fdef mrs x15, s3_0_c15_c13_7 - a1c: d518fe0f msr s3_0_c15_c14_0, x15 - a20: d538fe0f mrs x15, s3_0_c15_c14_0 - a24: d518fe2f msr s3_0_c15_c14_1, x15 - a28: d538fe2f mrs x15, s3_0_c15_c14_1 - a2c: d518fe4f msr s3_0_c15_c14_2, x15 - a30: d538fe4f mrs x15, s3_0_c15_c14_2 - a34: d518fe6f msr s3_0_c15_c14_3, x15 - a38: d538fe6f mrs x15, s3_0_c15_c14_3 - a3c: d518fe8f msr s3_0_c15_c14_4, x15 - a40: d538fe8f mrs x15, s3_0_c15_c14_4 - a44: d518feaf msr s3_0_c15_c14_5, x15 - a48: d538feaf mrs x15, s3_0_c15_c14_5 - a4c: d518fecf msr s3_0_c15_c14_6, x15 - a50: d538fecf mrs x15, s3_0_c15_c14_6 - a54: d518feef msr s3_0_c15_c14_7, x15 - a58: d538feef mrs x15, s3_0_c15_c14_7 - a5c: d518ff0f msr s3_0_c15_c15_0, x15 - a60: d538ff0f mrs x15, s3_0_c15_c15_0 - a64: d518ff2f msr s3_0_c15_c15_1, x15 - a68: d538ff2f mrs x15, s3_0_c15_c15_1 - a6c: d518ff4f msr s3_0_c15_c15_2, x15 - a70: d538ff4f mrs x15, s3_0_c15_c15_2 - a74: d518ff6f msr s3_0_c15_c15_3, x15 - a78: d538ff6f mrs x15, s3_0_c15_c15_3 - a7c: d518ff8f msr s3_0_c15_c15_4, x15 - a80: d538ff8f mrs x15, s3_0_c15_c15_4 - a84: d518ffaf msr s3_0_c15_c15_5, x15 - a88: d538ffaf mrs x15, s3_0_c15_c15_5 - a8c: d518ffcf msr s3_0_c15_c15_6, x15 - a90: d538ffcf mrs x15, s3_0_c15_c15_6 - a94: d518ffef msr s3_0_c15_c15_7, x15 - a98: d538ffef mrs x15, s3_0_c15_c15_7 - a9c: d519b00f msr s3_1_c11_c0_0, x15 - aa0: d539b00f mrs x15, s3_1_c11_c0_0 - aa4: d519b02f msr s3_1_c11_c0_1, x15 - aa8: d539b02f mrs x15, s3_1_c11_c0_1 - aac: d519b04f msr s3_1_c11_c0_2, x15 - ab0: d539b04f mrs x15, s3_1_c11_c0_2 - ab4: d519b06f msr s3_1_c11_c0_3, x15 - ab8: d539b06f mrs x15, s3_1_c11_c0_3 - abc: d519b08f msr s3_1_c11_c0_4, x15 - ac0: d539b08f mrs x15, s3_1_c11_c0_4 - ac4: d519b0af msr s3_1_c11_c0_5, x15 - ac8: d539b0af mrs x15, s3_1_c11_c0_5 - acc: d519b0cf msr s3_1_c11_c0_6, x15 - ad0: d539b0cf mrs x15, s3_1_c11_c0_6 - ad4: d519b0ef msr s3_1_c11_c0_7, x15 - ad8: d539b0ef mrs x15, s3_1_c11_c0_7 - adc: d519b10f msr s3_1_c11_c1_0, x15 - ae0: d539b10f mrs x15, s3_1_c11_c1_0 - ae4: d519b12f msr s3_1_c11_c1_1, x15 - ae8: d539b12f mrs x15, s3_1_c11_c1_1 - aec: d519b14f msr s3_1_c11_c1_2, x15 - af0: d539b14f mrs x15, s3_1_c11_c1_2 - af4: d519b16f msr s3_1_c11_c1_3, x15 - af8: d539b16f mrs x15, s3_1_c11_c1_3 - afc: d519b18f msr s3_1_c11_c1_4, x15 - b00: d539b18f mrs x15, s3_1_c11_c1_4 - b04: d519b1af msr s3_1_c11_c1_5, x15 - b08: d539b1af mrs x15, s3_1_c11_c1_5 - b0c: d519b1cf msr s3_1_c11_c1_6, x15 - b10: d539b1cf mrs x15, s3_1_c11_c1_6 - b14: d519b1ef msr s3_1_c11_c1_7, x15 - b18: d539b1ef mrs x15, s3_1_c11_c1_7 - b1c: d519b20f msr s3_1_c11_c2_0, x15 - b20: d539b20f mrs x15, s3_1_c11_c2_0 - b24: d519b22f msr s3_1_c11_c2_1, x15 - b28: d539b22f mrs x15, s3_1_c11_c2_1 - b2c: d519b24f msr s3_1_c11_c2_2, x15 - b30: d539b24f mrs x15, s3_1_c11_c2_2 - b34: d519b26f msr s3_1_c11_c2_3, x15 - b38: d539b26f mrs x15, s3_1_c11_c2_3 - b3c: d519b28f msr s3_1_c11_c2_4, x15 - b40: d539b28f mrs x15, s3_1_c11_c2_4 - b44: d519b2af msr s3_1_c11_c2_5, x15 - b48: d539b2af mrs x15, s3_1_c11_c2_5 - b4c: d519b2cf msr s3_1_c11_c2_6, x15 - b50: d539b2cf mrs x15, s3_1_c11_c2_6 - b54: d519b2ef msr s3_1_c11_c2_7, x15 - b58: d539b2ef mrs x15, s3_1_c11_c2_7 - b5c: d519b30f msr s3_1_c11_c3_0, x15 - b60: d539b30f mrs x15, s3_1_c11_c3_0 - b64: d519b32f msr s3_1_c11_c3_1, x15 - b68: d539b32f mrs x15, s3_1_c11_c3_1 - b6c: d519b34f msr s3_1_c11_c3_2, x15 - b70: d539b34f mrs x15, s3_1_c11_c3_2 - b74: d519b36f msr s3_1_c11_c3_3, x15 - b78: d539b36f mrs x15, s3_1_c11_c3_3 - b7c: d519b38f msr s3_1_c11_c3_4, x15 - b80: d539b38f mrs x15, s3_1_c11_c3_4 - b84: d519b3af msr s3_1_c11_c3_5, x15 - b88: d539b3af mrs x15, s3_1_c11_c3_5 - b8c: d519b3cf msr s3_1_c11_c3_6, x15 - b90: d539b3cf mrs x15, s3_1_c11_c3_6 - b94: d519b3ef msr s3_1_c11_c3_7, x15 - b98: d539b3ef mrs x15, s3_1_c11_c3_7 - b9c: d519b40f msr s3_1_c11_c4_0, x15 - ba0: d539b40f mrs x15, s3_1_c11_c4_0 - ba4: d519b42f msr s3_1_c11_c4_1, x15 - ba8: d539b42f mrs x15, s3_1_c11_c4_1 - bac: d519b44f msr s3_1_c11_c4_2, x15 - bb0: d539b44f mrs x15, s3_1_c11_c4_2 - bb4: d519b46f msr s3_1_c11_c4_3, x15 - bb8: d539b46f mrs x15, s3_1_c11_c4_3 - bbc: d519b48f msr s3_1_c11_c4_4, x15 - bc0: d539b48f mrs x15, s3_1_c11_c4_4 - bc4: d519b4af msr s3_1_c11_c4_5, x15 - bc8: d539b4af mrs x15, s3_1_c11_c4_5 - bcc: d519b4cf msr s3_1_c11_c4_6, x15 - bd0: d539b4cf mrs x15, s3_1_c11_c4_6 - bd4: d519b4ef msr s3_1_c11_c4_7, x15 - bd8: d539b4ef mrs x15, s3_1_c11_c4_7 - bdc: d519b50f msr s3_1_c11_c5_0, x15 - be0: d539b50f mrs x15, s3_1_c11_c5_0 - be4: d519b52f msr s3_1_c11_c5_1, x15 - be8: d539b52f mrs x15, s3_1_c11_c5_1 - bec: d519b54f msr s3_1_c11_c5_2, x15 - bf0: d539b54f mrs x15, s3_1_c11_c5_2 - bf4: d519b56f msr s3_1_c11_c5_3, x15 - bf8: d539b56f mrs x15, s3_1_c11_c5_3 - bfc: d519b58f msr s3_1_c11_c5_4, x15 - c00: d539b58f mrs x15, s3_1_c11_c5_4 - c04: d519b5af msr s3_1_c11_c5_5, x15 - c08: d539b5af mrs x15, s3_1_c11_c5_5 - c0c: d519b5cf msr s3_1_c11_c5_6, x15 - c10: d539b5cf mrs x15, s3_1_c11_c5_6 - c14: d519b5ef msr s3_1_c11_c5_7, x15 - c18: d539b5ef mrs x15, s3_1_c11_c5_7 - c1c: d519b60f msr s3_1_c11_c6_0, x15 - c20: d539b60f mrs x15, s3_1_c11_c6_0 - c24: d519b62f msr s3_1_c11_c6_1, x15 - c28: d539b62f mrs x15, s3_1_c11_c6_1 - c2c: d519b64f msr s3_1_c11_c6_2, x15 - c30: d539b64f mrs x15, s3_1_c11_c6_2 - c34: d519b66f msr s3_1_c11_c6_3, x15 - c38: d539b66f mrs x15, s3_1_c11_c6_3 - c3c: d519b68f msr s3_1_c11_c6_4, x15 - c40: d539b68f mrs x15, s3_1_c11_c6_4 - c44: d519b6af msr s3_1_c11_c6_5, x15 - c48: d539b6af mrs x15, s3_1_c11_c6_5 - c4c: d519b6cf msr s3_1_c11_c6_6, x15 - c50: d539b6cf mrs x15, s3_1_c11_c6_6 - c54: d519b6ef msr s3_1_c11_c6_7, x15 - c58: d539b6ef mrs x15, s3_1_c11_c6_7 - c5c: d519b70f msr s3_1_c11_c7_0, x15 - c60: d539b70f mrs x15, s3_1_c11_c7_0 - c64: d519b72f msr s3_1_c11_c7_1, x15 - c68: d539b72f mrs x15, s3_1_c11_c7_1 - c6c: d519b74f msr s3_1_c11_c7_2, x15 - c70: d539b74f mrs x15, s3_1_c11_c7_2 - c74: d519b76f msr s3_1_c11_c7_3, x15 - c78: d539b76f mrs x15, s3_1_c11_c7_3 - c7c: d519b78f msr s3_1_c11_c7_4, x15 - c80: d539b78f mrs x15, s3_1_c11_c7_4 - c84: d519b7af msr s3_1_c11_c7_5, x15 - c88: d539b7af mrs x15, s3_1_c11_c7_5 - c8c: d519b7cf msr s3_1_c11_c7_6, x15 - c90: d539b7cf mrs x15, s3_1_c11_c7_6 - c94: d519b7ef msr s3_1_c11_c7_7, x15 - c98: d539b7ef mrs x15, s3_1_c11_c7_7 - c9c: d519b80f msr s3_1_c11_c8_0, x15 - ca0: d539b80f mrs x15, s3_1_c11_c8_0 - ca4: d519b82f msr s3_1_c11_c8_1, x15 - ca8: d539b82f mrs x15, s3_1_c11_c8_1 - cac: d519b84f msr s3_1_c11_c8_2, x15 - cb0: d539b84f mrs x15, s3_1_c11_c8_2 - cb4: d519b86f msr s3_1_c11_c8_3, x15 - cb8: d539b86f mrs x15, s3_1_c11_c8_3 - cbc: d519b88f msr s3_1_c11_c8_4, x15 - cc0: d539b88f mrs x15, s3_1_c11_c8_4 - cc4: d519b8af msr s3_1_c11_c8_5, x15 - cc8: d539b8af mrs x15, s3_1_c11_c8_5 - ccc: d519b8cf msr s3_1_c11_c8_6, x15 - cd0: d539b8cf mrs x15, s3_1_c11_c8_6 - cd4: d519b8ef msr s3_1_c11_c8_7, x15 - cd8: d539b8ef mrs x15, s3_1_c11_c8_7 - cdc: d519b90f msr s3_1_c11_c9_0, x15 - ce0: d539b90f mrs x15, s3_1_c11_c9_0 - ce4: d519b92f msr s3_1_c11_c9_1, x15 - ce8: d539b92f mrs x15, s3_1_c11_c9_1 - cec: d519b94f msr s3_1_c11_c9_2, x15 - cf0: d539b94f mrs x15, s3_1_c11_c9_2 - cf4: d519b96f msr s3_1_c11_c9_3, x15 - cf8: d539b96f mrs x15, s3_1_c11_c9_3 - cfc: d519b98f msr s3_1_c11_c9_4, x15 - d00: d539b98f mrs x15, s3_1_c11_c9_4 - d04: d519b9af msr s3_1_c11_c9_5, x15 - d08: d539b9af mrs x15, s3_1_c11_c9_5 - d0c: d519b9cf msr s3_1_c11_c9_6, x15 - d10: d539b9cf mrs x15, s3_1_c11_c9_6 - d14: d519b9ef msr s3_1_c11_c9_7, x15 - d18: d539b9ef mrs x15, s3_1_c11_c9_7 - d1c: d519ba0f msr s3_1_c11_c10_0, x15 - d20: d539ba0f mrs x15, s3_1_c11_c10_0 - d24: d519ba2f msr s3_1_c11_c10_1, x15 - d28: d539ba2f mrs x15, s3_1_c11_c10_1 - d2c: d519ba4f msr s3_1_c11_c10_2, x15 - d30: d539ba4f mrs x15, s3_1_c11_c10_2 - d34: d519ba6f msr s3_1_c11_c10_3, x15 - d38: d539ba6f mrs x15, s3_1_c11_c10_3 - d3c: d519ba8f msr s3_1_c11_c10_4, x15 - d40: d539ba8f mrs x15, s3_1_c11_c10_4 - d44: d519baaf msr s3_1_c11_c10_5, x15 - d48: d539baaf mrs x15, s3_1_c11_c10_5 - d4c: d519bacf msr s3_1_c11_c10_6, x15 - d50: d539bacf mrs x15, s3_1_c11_c10_6 - d54: d519baef msr s3_1_c11_c10_7, x15 - d58: d539baef mrs x15, s3_1_c11_c10_7 - d5c: d519bb0f msr s3_1_c11_c11_0, x15 - d60: d539bb0f mrs x15, s3_1_c11_c11_0 - d64: d519bb2f msr s3_1_c11_c11_1, x15 - d68: d539bb2f mrs x15, s3_1_c11_c11_1 - d6c: d519bb4f msr s3_1_c11_c11_2, x15 - d70: d539bb4f mrs x15, s3_1_c11_c11_2 - d74: d519bb6f msr s3_1_c11_c11_3, x15 - d78: d539bb6f mrs x15, s3_1_c11_c11_3 - d7c: d519bb8f msr s3_1_c11_c11_4, x15 - d80: d539bb8f mrs x15, s3_1_c11_c11_4 - d84: d519bbaf msr s3_1_c11_c11_5, x15 - d88: d539bbaf mrs x15, s3_1_c11_c11_5 - d8c: d519bbcf msr s3_1_c11_c11_6, x15 - d90: d539bbcf mrs x15, s3_1_c11_c11_6 - d94: d519bbef msr s3_1_c11_c11_7, x15 - d98: d539bbef mrs x15, s3_1_c11_c11_7 - d9c: d519bc0f msr s3_1_c11_c12_0, x15 - da0: d539bc0f mrs x15, s3_1_c11_c12_0 - da4: d519bc2f msr s3_1_c11_c12_1, x15 - da8: d539bc2f mrs x15, s3_1_c11_c12_1 - dac: d519bc4f msr s3_1_c11_c12_2, x15 - db0: d539bc4f mrs x15, s3_1_c11_c12_2 - db4: d519bc6f msr s3_1_c11_c12_3, x15 - db8: d539bc6f mrs x15, s3_1_c11_c12_3 - dbc: d519bc8f msr s3_1_c11_c12_4, x15 - dc0: d539bc8f mrs x15, s3_1_c11_c12_4 - dc4: d519bcaf msr s3_1_c11_c12_5, x15 - dc8: d539bcaf mrs x15, s3_1_c11_c12_5 - dcc: d519bccf msr s3_1_c11_c12_6, x15 - dd0: d539bccf mrs x15, s3_1_c11_c12_6 - dd4: d519bcef msr s3_1_c11_c12_7, x15 - dd8: d539bcef mrs x15, s3_1_c11_c12_7 - ddc: d519bd0f msr s3_1_c11_c13_0, x15 - de0: d539bd0f mrs x15, s3_1_c11_c13_0 - de4: d519bd2f msr s3_1_c11_c13_1, x15 - de8: d539bd2f mrs x15, s3_1_c11_c13_1 - dec: d519bd4f msr s3_1_c11_c13_2, x15 - df0: d539bd4f mrs x15, s3_1_c11_c13_2 - df4: d519bd6f msr s3_1_c11_c13_3, x15 - df8: d539bd6f mrs x15, s3_1_c11_c13_3 - dfc: d519bd8f msr s3_1_c11_c13_4, x15 - e00: d539bd8f mrs x15, s3_1_c11_c13_4 - e04: d519bdaf msr s3_1_c11_c13_5, x15 - e08: d539bdaf mrs x15, s3_1_c11_c13_5 - e0c: d519bdcf msr s3_1_c11_c13_6, x15 - e10: d539bdcf mrs x15, s3_1_c11_c13_6 - e14: d519bdef msr s3_1_c11_c13_7, x15 - e18: d539bdef mrs x15, s3_1_c11_c13_7 - e1c: d519be0f msr s3_1_c11_c14_0, x15 - e20: d539be0f mrs x15, s3_1_c11_c14_0 - e24: d519be2f msr s3_1_c11_c14_1, x15 - e28: d539be2f mrs x15, s3_1_c11_c14_1 - e2c: d519be4f msr s3_1_c11_c14_2, x15 - e30: d539be4f mrs x15, s3_1_c11_c14_2 - e34: d519be6f msr s3_1_c11_c14_3, x15 - e38: d539be6f mrs x15, s3_1_c11_c14_3 - e3c: d519be8f msr s3_1_c11_c14_4, x15 - e40: d539be8f mrs x15, s3_1_c11_c14_4 - e44: d519beaf msr s3_1_c11_c14_5, x15 - e48: d539beaf mrs x15, s3_1_c11_c14_5 - e4c: d519becf msr s3_1_c11_c14_6, x15 - e50: d539becf mrs x15, s3_1_c11_c14_6 - e54: d519beef msr s3_1_c11_c14_7, x15 - e58: d539beef mrs x15, s3_1_c11_c14_7 - e5c: d519bf0f msr s3_1_c11_c15_0, x15 - e60: d539bf0f mrs x15, s3_1_c11_c15_0 - e64: d519bf2f msr s3_1_c11_c15_1, x15 - e68: d539bf2f mrs x15, s3_1_c11_c15_1 - e6c: d519bf4f msr s3_1_c11_c15_2, x15 - e70: d539bf4f mrs x15, s3_1_c11_c15_2 - e74: d519bf6f msr s3_1_c11_c15_3, x15 - e78: d539bf6f mrs x15, s3_1_c11_c15_3 - e7c: d519bf8f msr s3_1_c11_c15_4, x15 - e80: d539bf8f mrs x15, s3_1_c11_c15_4 - e84: d519bfaf msr s3_1_c11_c15_5, x15 - e88: d539bfaf mrs x15, s3_1_c11_c15_5 - e8c: d519bfcf msr s3_1_c11_c15_6, x15 - e90: d539bfcf mrs x15, s3_1_c11_c15_6 - e94: d519bfef msr s3_1_c11_c15_7, x15 - e98: d539bfef mrs x15, s3_1_c11_c15_7 - e9c: d519f00f msr s3_1_c15_c0_0, x15 - ea0: d539f00f mrs x15, s3_1_c15_c0_0 - ea4: d519f02f msr s3_1_c15_c0_1, x15 - ea8: d539f02f mrs x15, s3_1_c15_c0_1 - eac: d519f04f msr s3_1_c15_c0_2, x15 - eb0: d539f04f mrs x15, s3_1_c15_c0_2 - eb4: d519f06f msr s3_1_c15_c0_3, x15 - eb8: d539f06f mrs x15, s3_1_c15_c0_3 - ebc: d519f08f msr s3_1_c15_c0_4, x15 - ec0: d539f08f mrs x15, s3_1_c15_c0_4 - ec4: d519f0af msr s3_1_c15_c0_5, x15 - ec8: d539f0af mrs x15, s3_1_c15_c0_5 - ecc: d519f0cf msr s3_1_c15_c0_6, x15 - ed0: d539f0cf mrs x15, s3_1_c15_c0_6 - ed4: d519f0ef msr s3_1_c15_c0_7, x15 - ed8: d539f0ef mrs x15, s3_1_c15_c0_7 - edc: d519f10f msr s3_1_c15_c1_0, x15 - ee0: d539f10f mrs x15, s3_1_c15_c1_0 - ee4: d519f12f msr s3_1_c15_c1_1, x15 - ee8: d539f12f mrs x15, s3_1_c15_c1_1 - eec: d519f14f msr s3_1_c15_c1_2, x15 - ef0: d539f14f mrs x15, s3_1_c15_c1_2 - ef4: d519f16f msr s3_1_c15_c1_3, x15 - ef8: d539f16f mrs x15, s3_1_c15_c1_3 - efc: d519f18f msr s3_1_c15_c1_4, x15 - f00: d539f18f mrs x15, s3_1_c15_c1_4 - f04: d519f1af msr s3_1_c15_c1_5, x15 - f08: d539f1af mrs x15, s3_1_c15_c1_5 - f0c: d519f1cf msr s3_1_c15_c1_6, x15 - f10: d539f1cf mrs x15, s3_1_c15_c1_6 - f14: d519f1ef msr s3_1_c15_c1_7, x15 - f18: d539f1ef mrs x15, s3_1_c15_c1_7 - f1c: d519f20f msr s3_1_c15_c2_0, x15 - f20: d539f20f mrs x15, s3_1_c15_c2_0 - f24: d519f22f msr s3_1_c15_c2_1, x15 - f28: d539f22f mrs x15, s3_1_c15_c2_1 - f2c: d519f24f msr s3_1_c15_c2_2, x15 - f30: d539f24f mrs x15, s3_1_c15_c2_2 - f34: d519f26f msr s3_1_c15_c2_3, x15 - f38: d539f26f mrs x15, s3_1_c15_c2_3 - f3c: d519f28f msr s3_1_c15_c2_4, x15 - f40: d539f28f mrs x15, s3_1_c15_c2_4 - f44: d519f2af msr s3_1_c15_c2_5, x15 - f48: d539f2af mrs x15, s3_1_c15_c2_5 - f4c: d519f2cf msr s3_1_c15_c2_6, x15 - f50: d539f2cf mrs x15, s3_1_c15_c2_6 - f54: d519f2ef msr s3_1_c15_c2_7, x15 - f58: d539f2ef mrs x15, s3_1_c15_c2_7 - f5c: d519f30f msr s3_1_c15_c3_0, x15 - f60: d539f30f mrs x15, s3_1_c15_c3_0 - f64: d519f32f msr s3_1_c15_c3_1, x15 - f68: d539f32f mrs x15, s3_1_c15_c3_1 - f6c: d519f34f msr s3_1_c15_c3_2, x15 - f70: d539f34f mrs x15, s3_1_c15_c3_2 - f74: d519f36f msr s3_1_c15_c3_3, x15 - f78: d539f36f mrs x15, s3_1_c15_c3_3 - f7c: d519f38f msr s3_1_c15_c3_4, x15 - f80: d539f38f mrs x15, s3_1_c15_c3_4 - f84: d519f3af msr s3_1_c15_c3_5, x15 - f88: d539f3af mrs x15, s3_1_c15_c3_5 - f8c: d519f3cf msr s3_1_c15_c3_6, x15 - f90: d539f3cf mrs x15, s3_1_c15_c3_6 - f94: d519f3ef msr s3_1_c15_c3_7, x15 - f98: d539f3ef mrs x15, s3_1_c15_c3_7 - f9c: d519f40f msr s3_1_c15_c4_0, x15 - fa0: d539f40f mrs x15, s3_1_c15_c4_0 - fa4: d519f42f msr s3_1_c15_c4_1, x15 - fa8: d539f42f mrs x15, s3_1_c15_c4_1 - fac: d519f44f msr s3_1_c15_c4_2, x15 - fb0: d539f44f mrs x15, s3_1_c15_c4_2 - fb4: d519f46f msr s3_1_c15_c4_3, x15 - fb8: d539f46f mrs x15, s3_1_c15_c4_3 - fbc: d519f48f msr s3_1_c15_c4_4, x15 - fc0: d539f48f mrs x15, s3_1_c15_c4_4 - fc4: d519f4af msr s3_1_c15_c4_5, x15 - fc8: d539f4af mrs x15, s3_1_c15_c4_5 - fcc: d519f4cf msr s3_1_c15_c4_6, x15 - fd0: d539f4cf mrs x15, s3_1_c15_c4_6 - fd4: d519f4ef msr s3_1_c15_c4_7, x15 - fd8: d539f4ef mrs x15, s3_1_c15_c4_7 - fdc: d519f50f msr s3_1_c15_c5_0, x15 - fe0: d539f50f mrs x15, s3_1_c15_c5_0 - fe4: d519f52f msr s3_1_c15_c5_1, x15 - fe8: d539f52f mrs x15, s3_1_c15_c5_1 - fec: d519f54f msr s3_1_c15_c5_2, x15 - ff0: d539f54f mrs x15, s3_1_c15_c5_2 - ff4: d519f56f msr s3_1_c15_c5_3, x15 - ff8: d539f56f mrs x15, s3_1_c15_c5_3 - ffc: d519f58f msr s3_1_c15_c5_4, x15 - 1000: d539f58f mrs x15, s3_1_c15_c5_4 - 1004: d519f5af msr s3_1_c15_c5_5, x15 - 1008: d539f5af mrs x15, s3_1_c15_c5_5 - 100c: d519f5cf msr s3_1_c15_c5_6, x15 - 1010: d539f5cf mrs x15, s3_1_c15_c5_6 - 1014: d519f5ef msr s3_1_c15_c5_7, x15 - 1018: d539f5ef mrs x15, s3_1_c15_c5_7 - 101c: d519f60f msr s3_1_c15_c6_0, x15 - 1020: d539f60f mrs x15, s3_1_c15_c6_0 - 1024: d519f62f msr s3_1_c15_c6_1, x15 - 1028: d539f62f mrs x15, s3_1_c15_c6_1 - 102c: d519f64f msr s3_1_c15_c6_2, x15 - 1030: d539f64f mrs x15, s3_1_c15_c6_2 - 1034: d519f66f msr s3_1_c15_c6_3, x15 - 1038: d539f66f mrs x15, s3_1_c15_c6_3 - 103c: d519f68f msr s3_1_c15_c6_4, x15 - 1040: d539f68f mrs x15, s3_1_c15_c6_4 - 1044: d519f6af msr s3_1_c15_c6_5, x15 - 1048: d539f6af mrs x15, s3_1_c15_c6_5 - 104c: d519f6cf msr s3_1_c15_c6_6, x15 - 1050: d539f6cf mrs x15, s3_1_c15_c6_6 - 1054: d519f6ef msr s3_1_c15_c6_7, x15 - 1058: d539f6ef mrs x15, s3_1_c15_c6_7 - 105c: d519f70f msr s3_1_c15_c7_0, x15 - 1060: d539f70f mrs x15, s3_1_c15_c7_0 - 1064: d519f72f msr s3_1_c15_c7_1, x15 - 1068: d539f72f mrs x15, s3_1_c15_c7_1 - 106c: d519f74f msr s3_1_c15_c7_2, x15 - 1070: d539f74f mrs x15, s3_1_c15_c7_2 - 1074: d519f76f msr s3_1_c15_c7_3, x15 - 1078: d539f76f mrs x15, s3_1_c15_c7_3 - 107c: d519f78f msr s3_1_c15_c7_4, x15 - 1080: d539f78f mrs x15, s3_1_c15_c7_4 - 1084: d519f7af msr s3_1_c15_c7_5, x15 - 1088: d539f7af mrs x15, s3_1_c15_c7_5 - 108c: d519f7cf msr s3_1_c15_c7_6, x15 - 1090: d539f7cf mrs x15, s3_1_c15_c7_6 - 1094: d519f7ef msr s3_1_c15_c7_7, x15 - 1098: d539f7ef mrs x15, s3_1_c15_c7_7 - 109c: d519f80f msr s3_1_c15_c8_0, x15 - 10a0: d539f80f mrs x15, s3_1_c15_c8_0 - 10a4: d519f82f msr s3_1_c15_c8_1, x15 - 10a8: d539f82f mrs x15, s3_1_c15_c8_1 - 10ac: d519f84f msr s3_1_c15_c8_2, x15 - 10b0: d539f84f mrs x15, s3_1_c15_c8_2 - 10b4: d519f86f msr s3_1_c15_c8_3, x15 - 10b8: d539f86f mrs x15, s3_1_c15_c8_3 - 10bc: d519f88f msr s3_1_c15_c8_4, x15 - 10c0: d539f88f mrs x15, s3_1_c15_c8_4 - 10c4: d519f8af msr s3_1_c15_c8_5, x15 - 10c8: d539f8af mrs x15, s3_1_c15_c8_5 - 10cc: d519f8cf msr s3_1_c15_c8_6, x15 - 10d0: d539f8cf mrs x15, s3_1_c15_c8_6 - 10d4: d519f8ef msr s3_1_c15_c8_7, x15 - 10d8: d539f8ef mrs x15, s3_1_c15_c8_7 - 10dc: d519f90f msr s3_1_c15_c9_0, x15 - 10e0: d539f90f mrs x15, s3_1_c15_c9_0 - 10e4: d519f92f msr s3_1_c15_c9_1, x15 - 10e8: d539f92f mrs x15, s3_1_c15_c9_1 - 10ec: d519f94f msr s3_1_c15_c9_2, x15 - 10f0: d539f94f mrs x15, s3_1_c15_c9_2 - 10f4: d519f96f msr s3_1_c15_c9_3, x15 - 10f8: d539f96f mrs x15, s3_1_c15_c9_3 - 10fc: d519f98f msr s3_1_c15_c9_4, x15 - 1100: d539f98f mrs x15, s3_1_c15_c9_4 - 1104: d519f9af msr s3_1_c15_c9_5, x15 - 1108: d539f9af mrs x15, s3_1_c15_c9_5 - 110c: d519f9cf msr s3_1_c15_c9_6, x15 - 1110: d539f9cf mrs x15, s3_1_c15_c9_6 - 1114: d519f9ef msr s3_1_c15_c9_7, x15 - 1118: d539f9ef mrs x15, s3_1_c15_c9_7 - 111c: d519fa0f msr s3_1_c15_c10_0, x15 - 1120: d539fa0f mrs x15, s3_1_c15_c10_0 - 1124: d519fa2f msr s3_1_c15_c10_1, x15 - 1128: d539fa2f mrs x15, s3_1_c15_c10_1 - 112c: d519fa4f msr s3_1_c15_c10_2, x15 - 1130: d539fa4f mrs x15, s3_1_c15_c10_2 - 1134: d519fa6f msr s3_1_c15_c10_3, x15 - 1138: d539fa6f mrs x15, s3_1_c15_c10_3 - 113c: d519fa8f msr s3_1_c15_c10_4, x15 - 1140: d539fa8f mrs x15, s3_1_c15_c10_4 - 1144: d519faaf msr s3_1_c15_c10_5, x15 - 1148: d539faaf mrs x15, s3_1_c15_c10_5 - 114c: d519facf msr s3_1_c15_c10_6, x15 - 1150: d539facf mrs x15, s3_1_c15_c10_6 - 1154: d519faef msr s3_1_c15_c10_7, x15 - 1158: d539faef mrs x15, s3_1_c15_c10_7 - 115c: d519fb0f msr s3_1_c15_c11_0, x15 - 1160: d539fb0f mrs x15, s3_1_c15_c11_0 - 1164: d519fb2f msr s3_1_c15_c11_1, x15 - 1168: d539fb2f mrs x15, s3_1_c15_c11_1 - 116c: d519fb4f msr s3_1_c15_c11_2, x15 - 1170: d539fb4f mrs x15, s3_1_c15_c11_2 - 1174: d519fb6f msr s3_1_c15_c11_3, x15 - 1178: d539fb6f mrs x15, s3_1_c15_c11_3 - 117c: d519fb8f msr s3_1_c15_c11_4, x15 - 1180: d539fb8f mrs x15, s3_1_c15_c11_4 - 1184: d519fbaf msr s3_1_c15_c11_5, x15 - 1188: d539fbaf mrs x15, s3_1_c15_c11_5 - 118c: d519fbcf msr s3_1_c15_c11_6, x15 - 1190: d539fbcf mrs x15, s3_1_c15_c11_6 - 1194: d519fbef msr s3_1_c15_c11_7, x15 - 1198: d539fbef mrs x15, s3_1_c15_c11_7 - 119c: d519fc0f msr s3_1_c15_c12_0, x15 - 11a0: d539fc0f mrs x15, s3_1_c15_c12_0 - 11a4: d519fc2f msr s3_1_c15_c12_1, x15 - 11a8: d539fc2f mrs x15, s3_1_c15_c12_1 - 11ac: d519fc4f msr s3_1_c15_c12_2, x15 - 11b0: d539fc4f mrs x15, s3_1_c15_c12_2 - 11b4: d519fc6f msr s3_1_c15_c12_3, x15 - 11b8: d539fc6f mrs x15, s3_1_c15_c12_3 - 11bc: d519fc8f msr s3_1_c15_c12_4, x15 - 11c0: d539fc8f mrs x15, s3_1_c15_c12_4 - 11c4: d519fcaf msr s3_1_c15_c12_5, x15 - 11c8: d539fcaf mrs x15, s3_1_c15_c12_5 - 11cc: d519fccf msr s3_1_c15_c12_6, x15 - 11d0: d539fccf mrs x15, s3_1_c15_c12_6 - 11d4: d519fcef msr s3_1_c15_c12_7, x15 - 11d8: d539fcef mrs x15, s3_1_c15_c12_7 - 11dc: d519fd0f msr s3_1_c15_c13_0, x15 - 11e0: d539fd0f mrs x15, s3_1_c15_c13_0 - 11e4: d519fd2f msr s3_1_c15_c13_1, x15 - 11e8: d539fd2f mrs x15, s3_1_c15_c13_1 - 11ec: d519fd4f msr s3_1_c15_c13_2, x15 - 11f0: d539fd4f mrs x15, s3_1_c15_c13_2 - 11f4: d519fd6f msr s3_1_c15_c13_3, x15 - 11f8: d539fd6f mrs x15, s3_1_c15_c13_3 - 11fc: d519fd8f msr s3_1_c15_c13_4, x15 - 1200: d539fd8f mrs x15, s3_1_c15_c13_4 - 1204: d519fdaf msr s3_1_c15_c13_5, x15 - 1208: d539fdaf mrs x15, s3_1_c15_c13_5 - 120c: d519fdcf msr s3_1_c15_c13_6, x15 - 1210: d539fdcf mrs x15, s3_1_c15_c13_6 - 1214: d519fdef msr s3_1_c15_c13_7, x15 - 1218: d539fdef mrs x15, s3_1_c15_c13_7 - 121c: d519fe0f msr s3_1_c15_c14_0, x15 - 1220: d539fe0f mrs x15, s3_1_c15_c14_0 - 1224: d519fe2f msr s3_1_c15_c14_1, x15 - 1228: d539fe2f mrs x15, s3_1_c15_c14_1 - 122c: d519fe4f msr s3_1_c15_c14_2, x15 - 1230: d539fe4f mrs x15, s3_1_c15_c14_2 - 1234: d519fe6f msr s3_1_c15_c14_3, x15 - 1238: d539fe6f mrs x15, s3_1_c15_c14_3 - 123c: d519fe8f msr s3_1_c15_c14_4, x15 - 1240: d539fe8f mrs x15, s3_1_c15_c14_4 - 1244: d519feaf msr s3_1_c15_c14_5, x15 - 1248: d539feaf mrs x15, s3_1_c15_c14_5 - 124c: d519fecf msr s3_1_c15_c14_6, x15 - 1250: d539fecf mrs x15, s3_1_c15_c14_6 - 1254: d519feef msr s3_1_c15_c14_7, x15 - 1258: d539feef mrs x15, s3_1_c15_c14_7 - 125c: d519ff0f msr s3_1_c15_c15_0, x15 - 1260: d539ff0f mrs x15, s3_1_c15_c15_0 - 1264: d519ff2f msr s3_1_c15_c15_1, x15 - 1268: d539ff2f mrs x15, s3_1_c15_c15_1 - 126c: d519ff4f msr s3_1_c15_c15_2, x15 - 1270: d539ff4f mrs x15, s3_1_c15_c15_2 - 1274: d519ff6f msr s3_1_c15_c15_3, x15 - 1278: d539ff6f mrs x15, s3_1_c15_c15_3 - 127c: d519ff8f msr s3_1_c15_c15_4, x15 - 1280: d539ff8f mrs x15, s3_1_c15_c15_4 - 1284: d519ffaf msr s3_1_c15_c15_5, x15 - 1288: d539ffaf mrs x15, s3_1_c15_c15_5 - 128c: d519ffcf msr s3_1_c15_c15_6, x15 - 1290: d539ffcf mrs x15, s3_1_c15_c15_6 - 1294: d519ffef msr s3_1_c15_c15_7, x15 - 1298: d539ffef mrs x15, s3_1_c15_c15_7 - 129c: d51ab00f msr s3_2_c11_c0_0, x15 - 12a0: d53ab00f mrs x15, s3_2_c11_c0_0 - 12a4: d51ab02f msr s3_2_c11_c0_1, x15 - 12a8: d53ab02f mrs x15, s3_2_c11_c0_1 - 12ac: d51ab04f msr s3_2_c11_c0_2, x15 - 12b0: d53ab04f mrs x15, s3_2_c11_c0_2 - 12b4: d51ab06f msr s3_2_c11_c0_3, x15 - 12b8: d53ab06f mrs x15, s3_2_c11_c0_3 - 12bc: d51ab08f msr s3_2_c11_c0_4, x15 - 12c0: d53ab08f mrs x15, s3_2_c11_c0_4 - 12c4: d51ab0af msr s3_2_c11_c0_5, x15 - 12c8: d53ab0af mrs x15, s3_2_c11_c0_5 - 12cc: d51ab0cf msr s3_2_c11_c0_6, x15 - 12d0: d53ab0cf mrs x15, s3_2_c11_c0_6 - 12d4: d51ab0ef msr s3_2_c11_c0_7, x15 - 12d8: d53ab0ef mrs x15, s3_2_c11_c0_7 - 12dc: d51ab10f msr s3_2_c11_c1_0, x15 - 12e0: d53ab10f mrs x15, s3_2_c11_c1_0 - 12e4: d51ab12f msr s3_2_c11_c1_1, x15 - 12e8: d53ab12f mrs x15, s3_2_c11_c1_1 - 12ec: d51ab14f msr s3_2_c11_c1_2, x15 - 12f0: d53ab14f mrs x15, s3_2_c11_c1_2 - 12f4: d51ab16f msr s3_2_c11_c1_3, x15 - 12f8: d53ab16f mrs x15, s3_2_c11_c1_3 - 12fc: d51ab18f msr s3_2_c11_c1_4, x15 - 1300: d53ab18f mrs x15, s3_2_c11_c1_4 - 1304: d51ab1af msr s3_2_c11_c1_5, x15 - 1308: d53ab1af mrs x15, s3_2_c11_c1_5 - 130c: d51ab1cf msr s3_2_c11_c1_6, x15 - 1310: d53ab1cf mrs x15, s3_2_c11_c1_6 - 1314: d51ab1ef msr s3_2_c11_c1_7, x15 - 1318: d53ab1ef mrs x15, s3_2_c11_c1_7 - 131c: d51ab20f msr s3_2_c11_c2_0, x15 - 1320: d53ab20f mrs x15, s3_2_c11_c2_0 - 1324: d51ab22f msr s3_2_c11_c2_1, x15 - 1328: d53ab22f mrs x15, s3_2_c11_c2_1 - 132c: d51ab24f msr s3_2_c11_c2_2, x15 - 1330: d53ab24f mrs x15, s3_2_c11_c2_2 - 1334: d51ab26f msr s3_2_c11_c2_3, x15 - 1338: d53ab26f mrs x15, s3_2_c11_c2_3 - 133c: d51ab28f msr s3_2_c11_c2_4, x15 - 1340: d53ab28f mrs x15, s3_2_c11_c2_4 - 1344: d51ab2af msr s3_2_c11_c2_5, x15 - 1348: d53ab2af mrs x15, s3_2_c11_c2_5 - 134c: d51ab2cf msr s3_2_c11_c2_6, x15 - 1350: d53ab2cf mrs x15, s3_2_c11_c2_6 - 1354: d51ab2ef msr s3_2_c11_c2_7, x15 - 1358: d53ab2ef mrs x15, s3_2_c11_c2_7 - 135c: d51ab30f msr s3_2_c11_c3_0, x15 - 1360: d53ab30f mrs x15, s3_2_c11_c3_0 - 1364: d51ab32f msr s3_2_c11_c3_1, x15 - 1368: d53ab32f mrs x15, s3_2_c11_c3_1 - 136c: d51ab34f msr s3_2_c11_c3_2, x15 - 1370: d53ab34f mrs x15, s3_2_c11_c3_2 - 1374: d51ab36f msr s3_2_c11_c3_3, x15 - 1378: d53ab36f mrs x15, s3_2_c11_c3_3 - 137c: d51ab38f msr s3_2_c11_c3_4, x15 - 1380: d53ab38f mrs x15, s3_2_c11_c3_4 - 1384: d51ab3af msr s3_2_c11_c3_5, x15 - 1388: d53ab3af mrs x15, s3_2_c11_c3_5 - 138c: d51ab3cf msr s3_2_c11_c3_6, x15 - 1390: d53ab3cf mrs x15, s3_2_c11_c3_6 - 1394: d51ab3ef msr s3_2_c11_c3_7, x15 - 1398: d53ab3ef mrs x15, s3_2_c11_c3_7 - 139c: d51ab40f msr s3_2_c11_c4_0, x15 - 13a0: d53ab40f mrs x15, s3_2_c11_c4_0 - 13a4: d51ab42f msr s3_2_c11_c4_1, x15 - 13a8: d53ab42f mrs x15, s3_2_c11_c4_1 - 13ac: d51ab44f msr s3_2_c11_c4_2, x15 - 13b0: d53ab44f mrs x15, s3_2_c11_c4_2 - 13b4: d51ab46f msr s3_2_c11_c4_3, x15 - 13b8: d53ab46f mrs x15, s3_2_c11_c4_3 - 13bc: d51ab48f msr s3_2_c11_c4_4, x15 - 13c0: d53ab48f mrs x15, s3_2_c11_c4_4 - 13c4: d51ab4af msr s3_2_c11_c4_5, x15 - 13c8: d53ab4af mrs x15, s3_2_c11_c4_5 - 13cc: d51ab4cf msr s3_2_c11_c4_6, x15 - 13d0: d53ab4cf mrs x15, s3_2_c11_c4_6 - 13d4: d51ab4ef msr s3_2_c11_c4_7, x15 - 13d8: d53ab4ef mrs x15, s3_2_c11_c4_7 - 13dc: d51ab50f msr s3_2_c11_c5_0, x15 - 13e0: d53ab50f mrs x15, s3_2_c11_c5_0 - 13e4: d51ab52f msr s3_2_c11_c5_1, x15 - 13e8: d53ab52f mrs x15, s3_2_c11_c5_1 - 13ec: d51ab54f msr s3_2_c11_c5_2, x15 - 13f0: d53ab54f mrs x15, s3_2_c11_c5_2 - 13f4: d51ab56f msr s3_2_c11_c5_3, x15 - 13f8: d53ab56f mrs x15, s3_2_c11_c5_3 - 13fc: d51ab58f msr s3_2_c11_c5_4, x15 - 1400: d53ab58f mrs x15, s3_2_c11_c5_4 - 1404: d51ab5af msr s3_2_c11_c5_5, x15 - 1408: d53ab5af mrs x15, s3_2_c11_c5_5 - 140c: d51ab5cf msr s3_2_c11_c5_6, x15 - 1410: d53ab5cf mrs x15, s3_2_c11_c5_6 - 1414: d51ab5ef msr s3_2_c11_c5_7, x15 - 1418: d53ab5ef mrs x15, s3_2_c11_c5_7 - 141c: d51ab60f msr s3_2_c11_c6_0, x15 - 1420: d53ab60f mrs x15, s3_2_c11_c6_0 - 1424: d51ab62f msr s3_2_c11_c6_1, x15 - 1428: d53ab62f mrs x15, s3_2_c11_c6_1 - 142c: d51ab64f msr s3_2_c11_c6_2, x15 - 1430: d53ab64f mrs x15, s3_2_c11_c6_2 - 1434: d51ab66f msr s3_2_c11_c6_3, x15 - 1438: d53ab66f mrs x15, s3_2_c11_c6_3 - 143c: d51ab68f msr s3_2_c11_c6_4, x15 - 1440: d53ab68f mrs x15, s3_2_c11_c6_4 - 1444: d51ab6af msr s3_2_c11_c6_5, x15 - 1448: d53ab6af mrs x15, s3_2_c11_c6_5 - 144c: d51ab6cf msr s3_2_c11_c6_6, x15 - 1450: d53ab6cf mrs x15, s3_2_c11_c6_6 - 1454: d51ab6ef msr s3_2_c11_c6_7, x15 - 1458: d53ab6ef mrs x15, s3_2_c11_c6_7 - 145c: d51ab70f msr s3_2_c11_c7_0, x15 - 1460: d53ab70f mrs x15, s3_2_c11_c7_0 - 1464: d51ab72f msr s3_2_c11_c7_1, x15 - 1468: d53ab72f mrs x15, s3_2_c11_c7_1 - 146c: d51ab74f msr s3_2_c11_c7_2, x15 - 1470: d53ab74f mrs x15, s3_2_c11_c7_2 - 1474: d51ab76f msr s3_2_c11_c7_3, x15 - 1478: d53ab76f mrs x15, s3_2_c11_c7_3 - 147c: d51ab78f msr s3_2_c11_c7_4, x15 - 1480: d53ab78f mrs x15, s3_2_c11_c7_4 - 1484: d51ab7af msr s3_2_c11_c7_5, x15 - 1488: d53ab7af mrs x15, s3_2_c11_c7_5 - 148c: d51ab7cf msr s3_2_c11_c7_6, x15 - 1490: d53ab7cf mrs x15, s3_2_c11_c7_6 - 1494: d51ab7ef msr s3_2_c11_c7_7, x15 - 1498: d53ab7ef mrs x15, s3_2_c11_c7_7 - 149c: d51ab80f msr s3_2_c11_c8_0, x15 - 14a0: d53ab80f mrs x15, s3_2_c11_c8_0 - 14a4: d51ab82f msr s3_2_c11_c8_1, x15 - 14a8: d53ab82f mrs x15, s3_2_c11_c8_1 - 14ac: d51ab84f msr s3_2_c11_c8_2, x15 - 14b0: d53ab84f mrs x15, s3_2_c11_c8_2 - 14b4: d51ab86f msr s3_2_c11_c8_3, x15 - 14b8: d53ab86f mrs x15, s3_2_c11_c8_3 - 14bc: d51ab88f msr s3_2_c11_c8_4, x15 - 14c0: d53ab88f mrs x15, s3_2_c11_c8_4 - 14c4: d51ab8af msr s3_2_c11_c8_5, x15 - 14c8: d53ab8af mrs x15, s3_2_c11_c8_5 - 14cc: d51ab8cf msr s3_2_c11_c8_6, x15 - 14d0: d53ab8cf mrs x15, s3_2_c11_c8_6 - 14d4: d51ab8ef msr s3_2_c11_c8_7, x15 - 14d8: d53ab8ef mrs x15, s3_2_c11_c8_7 - 14dc: d51ab90f msr s3_2_c11_c9_0, x15 - 14e0: d53ab90f mrs x15, s3_2_c11_c9_0 - 14e4: d51ab92f msr s3_2_c11_c9_1, x15 - 14e8: d53ab92f mrs x15, s3_2_c11_c9_1 - 14ec: d51ab94f msr s3_2_c11_c9_2, x15 - 14f0: d53ab94f mrs x15, s3_2_c11_c9_2 - 14f4: d51ab96f msr s3_2_c11_c9_3, x15 - 14f8: d53ab96f mrs x15, s3_2_c11_c9_3 - 14fc: d51ab98f msr s3_2_c11_c9_4, x15 - 1500: d53ab98f mrs x15, s3_2_c11_c9_4 - 1504: d51ab9af msr s3_2_c11_c9_5, x15 - 1508: d53ab9af mrs x15, s3_2_c11_c9_5 - 150c: d51ab9cf msr s3_2_c11_c9_6, x15 - 1510: d53ab9cf mrs x15, s3_2_c11_c9_6 - 1514: d51ab9ef msr s3_2_c11_c9_7, x15 - 1518: d53ab9ef mrs x15, s3_2_c11_c9_7 - 151c: d51aba0f msr s3_2_c11_c10_0, x15 - 1520: d53aba0f mrs x15, s3_2_c11_c10_0 - 1524: d51aba2f msr s3_2_c11_c10_1, x15 - 1528: d53aba2f mrs x15, s3_2_c11_c10_1 - 152c: d51aba4f msr s3_2_c11_c10_2, x15 - 1530: d53aba4f mrs x15, s3_2_c11_c10_2 - 1534: d51aba6f msr s3_2_c11_c10_3, x15 - 1538: d53aba6f mrs x15, s3_2_c11_c10_3 - 153c: d51aba8f msr s3_2_c11_c10_4, x15 - 1540: d53aba8f mrs x15, s3_2_c11_c10_4 - 1544: d51abaaf msr s3_2_c11_c10_5, x15 - 1548: d53abaaf mrs x15, s3_2_c11_c10_5 - 154c: d51abacf msr s3_2_c11_c10_6, x15 - 1550: d53abacf mrs x15, s3_2_c11_c10_6 - 1554: d51abaef msr s3_2_c11_c10_7, x15 - 1558: d53abaef mrs x15, s3_2_c11_c10_7 - 155c: d51abb0f msr s3_2_c11_c11_0, x15 - 1560: d53abb0f mrs x15, s3_2_c11_c11_0 - 1564: d51abb2f msr s3_2_c11_c11_1, x15 - 1568: d53abb2f mrs x15, s3_2_c11_c11_1 - 156c: d51abb4f msr s3_2_c11_c11_2, x15 - 1570: d53abb4f mrs x15, s3_2_c11_c11_2 - 1574: d51abb6f msr s3_2_c11_c11_3, x15 - 1578: d53abb6f mrs x15, s3_2_c11_c11_3 - 157c: d51abb8f msr s3_2_c11_c11_4, x15 - 1580: d53abb8f mrs x15, s3_2_c11_c11_4 - 1584: d51abbaf msr s3_2_c11_c11_5, x15 - 1588: d53abbaf mrs x15, s3_2_c11_c11_5 - 158c: d51abbcf msr s3_2_c11_c11_6, x15 - 1590: d53abbcf mrs x15, s3_2_c11_c11_6 - 1594: d51abbef msr s3_2_c11_c11_7, x15 - 1598: d53abbef mrs x15, s3_2_c11_c11_7 - 159c: d51abc0f msr s3_2_c11_c12_0, x15 - 15a0: d53abc0f mrs x15, s3_2_c11_c12_0 - 15a4: d51abc2f msr s3_2_c11_c12_1, x15 - 15a8: d53abc2f mrs x15, s3_2_c11_c12_1 - 15ac: d51abc4f msr s3_2_c11_c12_2, x15 - 15b0: d53abc4f mrs x15, s3_2_c11_c12_2 - 15b4: d51abc6f msr s3_2_c11_c12_3, x15 - 15b8: d53abc6f mrs x15, s3_2_c11_c12_3 - 15bc: d51abc8f msr s3_2_c11_c12_4, x15 - 15c0: d53abc8f mrs x15, s3_2_c11_c12_4 - 15c4: d51abcaf msr s3_2_c11_c12_5, x15 - 15c8: d53abcaf mrs x15, s3_2_c11_c12_5 - 15cc: d51abccf msr s3_2_c11_c12_6, x15 - 15d0: d53abccf mrs x15, s3_2_c11_c12_6 - 15d4: d51abcef msr s3_2_c11_c12_7, x15 - 15d8: d53abcef mrs x15, s3_2_c11_c12_7 - 15dc: d51abd0f msr s3_2_c11_c13_0, x15 - 15e0: d53abd0f mrs x15, s3_2_c11_c13_0 - 15e4: d51abd2f msr s3_2_c11_c13_1, x15 - 15e8: d53abd2f mrs x15, s3_2_c11_c13_1 - 15ec: d51abd4f msr s3_2_c11_c13_2, x15 - 15f0: d53abd4f mrs x15, s3_2_c11_c13_2 - 15f4: d51abd6f msr s3_2_c11_c13_3, x15 - 15f8: d53abd6f mrs x15, s3_2_c11_c13_3 - 15fc: d51abd8f msr s3_2_c11_c13_4, x15 - 1600: d53abd8f mrs x15, s3_2_c11_c13_4 - 1604: d51abdaf msr s3_2_c11_c13_5, x15 - 1608: d53abdaf mrs x15, s3_2_c11_c13_5 - 160c: d51abdcf msr s3_2_c11_c13_6, x15 - 1610: d53abdcf mrs x15, s3_2_c11_c13_6 - 1614: d51abdef msr s3_2_c11_c13_7, x15 - 1618: d53abdef mrs x15, s3_2_c11_c13_7 - 161c: d51abe0f msr s3_2_c11_c14_0, x15 - 1620: d53abe0f mrs x15, s3_2_c11_c14_0 - 1624: d51abe2f msr s3_2_c11_c14_1, x15 - 1628: d53abe2f mrs x15, s3_2_c11_c14_1 - 162c: d51abe4f msr s3_2_c11_c14_2, x15 - 1630: d53abe4f mrs x15, s3_2_c11_c14_2 - 1634: d51abe6f msr s3_2_c11_c14_3, x15 - 1638: d53abe6f mrs x15, s3_2_c11_c14_3 - 163c: d51abe8f msr s3_2_c11_c14_4, x15 - 1640: d53abe8f mrs x15, s3_2_c11_c14_4 - 1644: d51abeaf msr s3_2_c11_c14_5, x15 - 1648: d53abeaf mrs x15, s3_2_c11_c14_5 - 164c: d51abecf msr s3_2_c11_c14_6, x15 - 1650: d53abecf mrs x15, s3_2_c11_c14_6 - 1654: d51abeef msr s3_2_c11_c14_7, x15 - 1658: d53abeef mrs x15, s3_2_c11_c14_7 - 165c: d51abf0f msr s3_2_c11_c15_0, x15 - 1660: d53abf0f mrs x15, s3_2_c11_c15_0 - 1664: d51abf2f msr s3_2_c11_c15_1, x15 - 1668: d53abf2f mrs x15, s3_2_c11_c15_1 - 166c: d51abf4f msr s3_2_c11_c15_2, x15 - 1670: d53abf4f mrs x15, s3_2_c11_c15_2 - 1674: d51abf6f msr s3_2_c11_c15_3, x15 - 1678: d53abf6f mrs x15, s3_2_c11_c15_3 - 167c: d51abf8f msr s3_2_c11_c15_4, x15 - 1680: d53abf8f mrs x15, s3_2_c11_c15_4 - 1684: d51abfaf msr s3_2_c11_c15_5, x15 - 1688: d53abfaf mrs x15, s3_2_c11_c15_5 - 168c: d51abfcf msr s3_2_c11_c15_6, x15 - 1690: d53abfcf mrs x15, s3_2_c11_c15_6 - 1694: d51abfef msr s3_2_c11_c15_7, x15 - 1698: d53abfef mrs x15, s3_2_c11_c15_7 - 169c: d51af00f msr s3_2_c15_c0_0, x15 - 16a0: d53af00f mrs x15, s3_2_c15_c0_0 - 16a4: d51af02f msr s3_2_c15_c0_1, x15 - 16a8: d53af02f mrs x15, s3_2_c15_c0_1 - 16ac: d51af04f msr s3_2_c15_c0_2, x15 - 16b0: d53af04f mrs x15, s3_2_c15_c0_2 - 16b4: d51af06f msr s3_2_c15_c0_3, x15 - 16b8: d53af06f mrs x15, s3_2_c15_c0_3 - 16bc: d51af08f msr s3_2_c15_c0_4, x15 - 16c0: d53af08f mrs x15, s3_2_c15_c0_4 - 16c4: d51af0af msr s3_2_c15_c0_5, x15 - 16c8: d53af0af mrs x15, s3_2_c15_c0_5 - 16cc: d51af0cf msr s3_2_c15_c0_6, x15 - 16d0: d53af0cf mrs x15, s3_2_c15_c0_6 - 16d4: d51af0ef msr s3_2_c15_c0_7, x15 - 16d8: d53af0ef mrs x15, s3_2_c15_c0_7 - 16dc: d51af10f msr s3_2_c15_c1_0, x15 - 16e0: d53af10f mrs x15, s3_2_c15_c1_0 - 16e4: d51af12f msr s3_2_c15_c1_1, x15 - 16e8: d53af12f mrs x15, s3_2_c15_c1_1 - 16ec: d51af14f msr s3_2_c15_c1_2, x15 - 16f0: d53af14f mrs x15, s3_2_c15_c1_2 - 16f4: d51af16f msr s3_2_c15_c1_3, x15 - 16f8: d53af16f mrs x15, s3_2_c15_c1_3 - 16fc: d51af18f msr s3_2_c15_c1_4, x15 - 1700: d53af18f mrs x15, s3_2_c15_c1_4 - 1704: d51af1af msr s3_2_c15_c1_5, x15 - 1708: d53af1af mrs x15, s3_2_c15_c1_5 - 170c: d51af1cf msr s3_2_c15_c1_6, x15 - 1710: d53af1cf mrs x15, s3_2_c15_c1_6 - 1714: d51af1ef msr s3_2_c15_c1_7, x15 - 1718: d53af1ef mrs x15, s3_2_c15_c1_7 - 171c: d51af20f msr s3_2_c15_c2_0, x15 - 1720: d53af20f mrs x15, s3_2_c15_c2_0 - 1724: d51af22f msr s3_2_c15_c2_1, x15 - 1728: d53af22f mrs x15, s3_2_c15_c2_1 - 172c: d51af24f msr s3_2_c15_c2_2, x15 - 1730: d53af24f mrs x15, s3_2_c15_c2_2 - 1734: d51af26f msr s3_2_c15_c2_3, x15 - 1738: d53af26f mrs x15, s3_2_c15_c2_3 - 173c: d51af28f msr s3_2_c15_c2_4, x15 - 1740: d53af28f mrs x15, s3_2_c15_c2_4 - 1744: d51af2af msr s3_2_c15_c2_5, x15 - 1748: d53af2af mrs x15, s3_2_c15_c2_5 - 174c: d51af2cf msr s3_2_c15_c2_6, x15 - 1750: d53af2cf mrs x15, s3_2_c15_c2_6 - 1754: d51af2ef msr s3_2_c15_c2_7, x15 - 1758: d53af2ef mrs x15, s3_2_c15_c2_7 - 175c: d51af30f msr s3_2_c15_c3_0, x15 - 1760: d53af30f mrs x15, s3_2_c15_c3_0 - 1764: d51af32f msr s3_2_c15_c3_1, x15 - 1768: d53af32f mrs x15, s3_2_c15_c3_1 - 176c: d51af34f msr s3_2_c15_c3_2, x15 - 1770: d53af34f mrs x15, s3_2_c15_c3_2 - 1774: d51af36f msr s3_2_c15_c3_3, x15 - 1778: d53af36f mrs x15, s3_2_c15_c3_3 - 177c: d51af38f msr s3_2_c15_c3_4, x15 - 1780: d53af38f mrs x15, s3_2_c15_c3_4 - 1784: d51af3af msr s3_2_c15_c3_5, x15 - 1788: d53af3af mrs x15, s3_2_c15_c3_5 - 178c: d51af3cf msr s3_2_c15_c3_6, x15 - 1790: d53af3cf mrs x15, s3_2_c15_c3_6 - 1794: d51af3ef msr s3_2_c15_c3_7, x15 - 1798: d53af3ef mrs x15, s3_2_c15_c3_7 - 179c: d51af40f msr s3_2_c15_c4_0, x15 - 17a0: d53af40f mrs x15, s3_2_c15_c4_0 - 17a4: d51af42f msr s3_2_c15_c4_1, x15 - 17a8: d53af42f mrs x15, s3_2_c15_c4_1 - 17ac: d51af44f msr s3_2_c15_c4_2, x15 - 17b0: d53af44f mrs x15, s3_2_c15_c4_2 - 17b4: d51af46f msr s3_2_c15_c4_3, x15 - 17b8: d53af46f mrs x15, s3_2_c15_c4_3 - 17bc: d51af48f msr s3_2_c15_c4_4, x15 - 17c0: d53af48f mrs x15, s3_2_c15_c4_4 - 17c4: d51af4af msr s3_2_c15_c4_5, x15 - 17c8: d53af4af mrs x15, s3_2_c15_c4_5 - 17cc: d51af4cf msr s3_2_c15_c4_6, x15 - 17d0: d53af4cf mrs x15, s3_2_c15_c4_6 - 17d4: d51af4ef msr s3_2_c15_c4_7, x15 - 17d8: d53af4ef mrs x15, s3_2_c15_c4_7 - 17dc: d51af50f msr s3_2_c15_c5_0, x15 - 17e0: d53af50f mrs x15, s3_2_c15_c5_0 - 17e4: d51af52f msr s3_2_c15_c5_1, x15 - 17e8: d53af52f mrs x15, s3_2_c15_c5_1 - 17ec: d51af54f msr s3_2_c15_c5_2, x15 - 17f0: d53af54f mrs x15, s3_2_c15_c5_2 - 17f4: d51af56f msr s3_2_c15_c5_3, x15 - 17f8: d53af56f mrs x15, s3_2_c15_c5_3 - 17fc: d51af58f msr s3_2_c15_c5_4, x15 - 1800: d53af58f mrs x15, s3_2_c15_c5_4 - 1804: d51af5af msr s3_2_c15_c5_5, x15 - 1808: d53af5af mrs x15, s3_2_c15_c5_5 - 180c: d51af5cf msr s3_2_c15_c5_6, x15 - 1810: d53af5cf mrs x15, s3_2_c15_c5_6 - 1814: d51af5ef msr s3_2_c15_c5_7, x15 - 1818: d53af5ef mrs x15, s3_2_c15_c5_7 - 181c: d51af60f msr s3_2_c15_c6_0, x15 - 1820: d53af60f mrs x15, s3_2_c15_c6_0 - 1824: d51af62f msr s3_2_c15_c6_1, x15 - 1828: d53af62f mrs x15, s3_2_c15_c6_1 - 182c: d51af64f msr s3_2_c15_c6_2, x15 - 1830: d53af64f mrs x15, s3_2_c15_c6_2 - 1834: d51af66f msr s3_2_c15_c6_3, x15 - 1838: d53af66f mrs x15, s3_2_c15_c6_3 - 183c: d51af68f msr s3_2_c15_c6_4, x15 - 1840: d53af68f mrs x15, s3_2_c15_c6_4 - 1844: d51af6af msr s3_2_c15_c6_5, x15 - 1848: d53af6af mrs x15, s3_2_c15_c6_5 - 184c: d51af6cf msr s3_2_c15_c6_6, x15 - 1850: d53af6cf mrs x15, s3_2_c15_c6_6 - 1854: d51af6ef msr s3_2_c15_c6_7, x15 - 1858: d53af6ef mrs x15, s3_2_c15_c6_7 - 185c: d51af70f msr s3_2_c15_c7_0, x15 - 1860: d53af70f mrs x15, s3_2_c15_c7_0 - 1864: d51af72f msr s3_2_c15_c7_1, x15 - 1868: d53af72f mrs x15, s3_2_c15_c7_1 - 186c: d51af74f msr s3_2_c15_c7_2, x15 - 1870: d53af74f mrs x15, s3_2_c15_c7_2 - 1874: d51af76f msr s3_2_c15_c7_3, x15 - 1878: d53af76f mrs x15, s3_2_c15_c7_3 - 187c: d51af78f msr s3_2_c15_c7_4, x15 - 1880: d53af78f mrs x15, s3_2_c15_c7_4 - 1884: d51af7af msr s3_2_c15_c7_5, x15 - 1888: d53af7af mrs x15, s3_2_c15_c7_5 - 188c: d51af7cf msr s3_2_c15_c7_6, x15 - 1890: d53af7cf mrs x15, s3_2_c15_c7_6 - 1894: d51af7ef msr s3_2_c15_c7_7, x15 - 1898: d53af7ef mrs x15, s3_2_c15_c7_7 - 189c: d51af80f msr s3_2_c15_c8_0, x15 - 18a0: d53af80f mrs x15, s3_2_c15_c8_0 - 18a4: d51af82f msr s3_2_c15_c8_1, x15 - 18a8: d53af82f mrs x15, s3_2_c15_c8_1 - 18ac: d51af84f msr s3_2_c15_c8_2, x15 - 18b0: d53af84f mrs x15, s3_2_c15_c8_2 - 18b4: d51af86f msr s3_2_c15_c8_3, x15 - 18b8: d53af86f mrs x15, s3_2_c15_c8_3 - 18bc: d51af88f msr s3_2_c15_c8_4, x15 - 18c0: d53af88f mrs x15, s3_2_c15_c8_4 - 18c4: d51af8af msr s3_2_c15_c8_5, x15 - 18c8: d53af8af mrs x15, s3_2_c15_c8_5 - 18cc: d51af8cf msr s3_2_c15_c8_6, x15 - 18d0: d53af8cf mrs x15, s3_2_c15_c8_6 - 18d4: d51af8ef msr s3_2_c15_c8_7, x15 - 18d8: d53af8ef mrs x15, s3_2_c15_c8_7 - 18dc: d51af90f msr s3_2_c15_c9_0, x15 - 18e0: d53af90f mrs x15, s3_2_c15_c9_0 - 18e4: d51af92f msr s3_2_c15_c9_1, x15 - 18e8: d53af92f mrs x15, s3_2_c15_c9_1 - 18ec: d51af94f msr s3_2_c15_c9_2, x15 - 18f0: d53af94f mrs x15, s3_2_c15_c9_2 - 18f4: d51af96f msr s3_2_c15_c9_3, x15 - 18f8: d53af96f mrs x15, s3_2_c15_c9_3 - 18fc: d51af98f msr s3_2_c15_c9_4, x15 - 1900: d53af98f mrs x15, s3_2_c15_c9_4 - 1904: d51af9af msr s3_2_c15_c9_5, x15 - 1908: d53af9af mrs x15, s3_2_c15_c9_5 - 190c: d51af9cf msr s3_2_c15_c9_6, x15 - 1910: d53af9cf mrs x15, s3_2_c15_c9_6 - 1914: d51af9ef msr s3_2_c15_c9_7, x15 - 1918: d53af9ef mrs x15, s3_2_c15_c9_7 - 191c: d51afa0f msr s3_2_c15_c10_0, x15 - 1920: d53afa0f mrs x15, s3_2_c15_c10_0 - 1924: d51afa2f msr s3_2_c15_c10_1, x15 - 1928: d53afa2f mrs x15, s3_2_c15_c10_1 - 192c: d51afa4f msr s3_2_c15_c10_2, x15 - 1930: d53afa4f mrs x15, s3_2_c15_c10_2 - 1934: d51afa6f msr s3_2_c15_c10_3, x15 - 1938: d53afa6f mrs x15, s3_2_c15_c10_3 - 193c: d51afa8f msr s3_2_c15_c10_4, x15 - 1940: d53afa8f mrs x15, s3_2_c15_c10_4 - 1944: d51afaaf msr s3_2_c15_c10_5, x15 - 1948: d53afaaf mrs x15, s3_2_c15_c10_5 - 194c: d51afacf msr s3_2_c15_c10_6, x15 - 1950: d53afacf mrs x15, s3_2_c15_c10_6 - 1954: d51afaef msr s3_2_c15_c10_7, x15 - 1958: d53afaef mrs x15, s3_2_c15_c10_7 - 195c: d51afb0f msr s3_2_c15_c11_0, x15 - 1960: d53afb0f mrs x15, s3_2_c15_c11_0 - 1964: d51afb2f msr s3_2_c15_c11_1, x15 - 1968: d53afb2f mrs x15, s3_2_c15_c11_1 - 196c: d51afb4f msr s3_2_c15_c11_2, x15 - 1970: d53afb4f mrs x15, s3_2_c15_c11_2 - 1974: d51afb6f msr s3_2_c15_c11_3, x15 - 1978: d53afb6f mrs x15, s3_2_c15_c11_3 - 197c: d51afb8f msr s3_2_c15_c11_4, x15 - 1980: d53afb8f mrs x15, s3_2_c15_c11_4 - 1984: d51afbaf msr s3_2_c15_c11_5, x15 - 1988: d53afbaf mrs x15, s3_2_c15_c11_5 - 198c: d51afbcf msr s3_2_c15_c11_6, x15 - 1990: d53afbcf mrs x15, s3_2_c15_c11_6 - 1994: d51afbef msr s3_2_c15_c11_7, x15 - 1998: d53afbef mrs x15, s3_2_c15_c11_7 - 199c: d51afc0f msr s3_2_c15_c12_0, x15 - 19a0: d53afc0f mrs x15, s3_2_c15_c12_0 - 19a4: d51afc2f msr s3_2_c15_c12_1, x15 - 19a8: d53afc2f mrs x15, s3_2_c15_c12_1 - 19ac: d51afc4f msr s3_2_c15_c12_2, x15 - 19b0: d53afc4f mrs x15, s3_2_c15_c12_2 - 19b4: d51afc6f msr s3_2_c15_c12_3, x15 - 19b8: d53afc6f mrs x15, s3_2_c15_c12_3 - 19bc: d51afc8f msr s3_2_c15_c12_4, x15 - 19c0: d53afc8f mrs x15, s3_2_c15_c12_4 - 19c4: d51afcaf msr s3_2_c15_c12_5, x15 - 19c8: d53afcaf mrs x15, s3_2_c15_c12_5 - 19cc: d51afccf msr s3_2_c15_c12_6, x15 - 19d0: d53afccf mrs x15, s3_2_c15_c12_6 - 19d4: d51afcef msr s3_2_c15_c12_7, x15 - 19d8: d53afcef mrs x15, s3_2_c15_c12_7 - 19dc: d51afd0f msr s3_2_c15_c13_0, x15 - 19e0: d53afd0f mrs x15, s3_2_c15_c13_0 - 19e4: d51afd2f msr s3_2_c15_c13_1, x15 - 19e8: d53afd2f mrs x15, s3_2_c15_c13_1 - 19ec: d51afd4f msr s3_2_c15_c13_2, x15 - 19f0: d53afd4f mrs x15, s3_2_c15_c13_2 - 19f4: d51afd6f msr s3_2_c15_c13_3, x15 - 19f8: d53afd6f mrs x15, s3_2_c15_c13_3 - 19fc: d51afd8f msr s3_2_c15_c13_4, x15 - 1a00: d53afd8f mrs x15, s3_2_c15_c13_4 - 1a04: d51afdaf msr s3_2_c15_c13_5, x15 - 1a08: d53afdaf mrs x15, s3_2_c15_c13_5 - 1a0c: d51afdcf msr s3_2_c15_c13_6, x15 - 1a10: d53afdcf mrs x15, s3_2_c15_c13_6 - 1a14: d51afdef msr s3_2_c15_c13_7, x15 - 1a18: d53afdef mrs x15, s3_2_c15_c13_7 - 1a1c: d51afe0f msr s3_2_c15_c14_0, x15 - 1a20: d53afe0f mrs x15, s3_2_c15_c14_0 - 1a24: d51afe2f msr s3_2_c15_c14_1, x15 - 1a28: d53afe2f mrs x15, s3_2_c15_c14_1 - 1a2c: d51afe4f msr s3_2_c15_c14_2, x15 - 1a30: d53afe4f mrs x15, s3_2_c15_c14_2 - 1a34: d51afe6f msr s3_2_c15_c14_3, x15 - 1a38: d53afe6f mrs x15, s3_2_c15_c14_3 - 1a3c: d51afe8f msr s3_2_c15_c14_4, x15 - 1a40: d53afe8f mrs x15, s3_2_c15_c14_4 - 1a44: d51afeaf msr s3_2_c15_c14_5, x15 - 1a48: d53afeaf mrs x15, s3_2_c15_c14_5 - 1a4c: d51afecf msr s3_2_c15_c14_6, x15 - 1a50: d53afecf mrs x15, s3_2_c15_c14_6 - 1a54: d51afeef msr s3_2_c15_c14_7, x15 - 1a58: d53afeef mrs x15, s3_2_c15_c14_7 - 1a5c: d51aff0f msr s3_2_c15_c15_0, x15 - 1a60: d53aff0f mrs x15, s3_2_c15_c15_0 - 1a64: d51aff2f msr s3_2_c15_c15_1, x15 - 1a68: d53aff2f mrs x15, s3_2_c15_c15_1 - 1a6c: d51aff4f msr s3_2_c15_c15_2, x15 - 1a70: d53aff4f mrs x15, s3_2_c15_c15_2 - 1a74: d51aff6f msr s3_2_c15_c15_3, x15 - 1a78: d53aff6f mrs x15, s3_2_c15_c15_3 - 1a7c: d51aff8f msr s3_2_c15_c15_4, x15 - 1a80: d53aff8f mrs x15, s3_2_c15_c15_4 - 1a84: d51affaf msr s3_2_c15_c15_5, x15 - 1a88: d53affaf mrs x15, s3_2_c15_c15_5 - 1a8c: d51affcf msr s3_2_c15_c15_6, x15 - 1a90: d53affcf mrs x15, s3_2_c15_c15_6 - 1a94: d51affef msr s3_2_c15_c15_7, x15 - 1a98: d53affef mrs x15, s3_2_c15_c15_7 - 1a9c: d51bb00f msr s3_3_c11_c0_0, x15 - 1aa0: d53bb00f mrs x15, s3_3_c11_c0_0 - 1aa4: d51bb02f msr s3_3_c11_c0_1, x15 - 1aa8: d53bb02f mrs x15, s3_3_c11_c0_1 - 1aac: d51bb04f msr s3_3_c11_c0_2, x15 - 1ab0: d53bb04f mrs x15, s3_3_c11_c0_2 - 1ab4: d51bb06f msr s3_3_c11_c0_3, x15 - 1ab8: d53bb06f mrs x15, s3_3_c11_c0_3 - 1abc: d51bb08f msr s3_3_c11_c0_4, x15 - 1ac0: d53bb08f mrs x15, s3_3_c11_c0_4 - 1ac4: d51bb0af msr s3_3_c11_c0_5, x15 - 1ac8: d53bb0af mrs x15, s3_3_c11_c0_5 - 1acc: d51bb0cf msr s3_3_c11_c0_6, x15 - 1ad0: d53bb0cf mrs x15, s3_3_c11_c0_6 - 1ad4: d51bb0ef msr s3_3_c11_c0_7, x15 - 1ad8: d53bb0ef mrs x15, s3_3_c11_c0_7 - 1adc: d51bb10f msr s3_3_c11_c1_0, x15 - 1ae0: d53bb10f mrs x15, s3_3_c11_c1_0 - 1ae4: d51bb12f msr s3_3_c11_c1_1, x15 - 1ae8: d53bb12f mrs x15, s3_3_c11_c1_1 - 1aec: d51bb14f msr s3_3_c11_c1_2, x15 - 1af0: d53bb14f mrs x15, s3_3_c11_c1_2 - 1af4: d51bb16f msr s3_3_c11_c1_3, x15 - 1af8: d53bb16f mrs x15, s3_3_c11_c1_3 - 1afc: d51bb18f msr s3_3_c11_c1_4, x15 - 1b00: d53bb18f mrs x15, s3_3_c11_c1_4 - 1b04: d51bb1af msr s3_3_c11_c1_5, x15 - 1b08: d53bb1af mrs x15, s3_3_c11_c1_5 - 1b0c: d51bb1cf msr s3_3_c11_c1_6, x15 - 1b10: d53bb1cf mrs x15, s3_3_c11_c1_6 - 1b14: d51bb1ef msr s3_3_c11_c1_7, x15 - 1b18: d53bb1ef mrs x15, s3_3_c11_c1_7 - 1b1c: d51bb20f msr s3_3_c11_c2_0, x15 - 1b20: d53bb20f mrs x15, s3_3_c11_c2_0 - 1b24: d51bb22f msr s3_3_c11_c2_1, x15 - 1b28: d53bb22f mrs x15, s3_3_c11_c2_1 - 1b2c: d51bb24f msr s3_3_c11_c2_2, x15 - 1b30: d53bb24f mrs x15, s3_3_c11_c2_2 - 1b34: d51bb26f msr s3_3_c11_c2_3, x15 - 1b38: d53bb26f mrs x15, s3_3_c11_c2_3 - 1b3c: d51bb28f msr s3_3_c11_c2_4, x15 - 1b40: d53bb28f mrs x15, s3_3_c11_c2_4 - 1b44: d51bb2af msr s3_3_c11_c2_5, x15 - 1b48: d53bb2af mrs x15, s3_3_c11_c2_5 - 1b4c: d51bb2cf msr s3_3_c11_c2_6, x15 - 1b50: d53bb2cf mrs x15, s3_3_c11_c2_6 - 1b54: d51bb2ef msr s3_3_c11_c2_7, x15 - 1b58: d53bb2ef mrs x15, s3_3_c11_c2_7 - 1b5c: d51bb30f msr s3_3_c11_c3_0, x15 - 1b60: d53bb30f mrs x15, s3_3_c11_c3_0 - 1b64: d51bb32f msr s3_3_c11_c3_1, x15 - 1b68: d53bb32f mrs x15, s3_3_c11_c3_1 - 1b6c: d51bb34f msr s3_3_c11_c3_2, x15 - 1b70: d53bb34f mrs x15, s3_3_c11_c3_2 - 1b74: d51bb36f msr s3_3_c11_c3_3, x15 - 1b78: d53bb36f mrs x15, s3_3_c11_c3_3 - 1b7c: d51bb38f msr s3_3_c11_c3_4, x15 - 1b80: d53bb38f mrs x15, s3_3_c11_c3_4 - 1b84: d51bb3af msr s3_3_c11_c3_5, x15 - 1b88: d53bb3af mrs x15, s3_3_c11_c3_5 - 1b8c: d51bb3cf msr s3_3_c11_c3_6, x15 - 1b90: d53bb3cf mrs x15, s3_3_c11_c3_6 - 1b94: d51bb3ef msr s3_3_c11_c3_7, x15 - 1b98: d53bb3ef mrs x15, s3_3_c11_c3_7 - 1b9c: d51bb40f msr s3_3_c11_c4_0, x15 - 1ba0: d53bb40f mrs x15, s3_3_c11_c4_0 - 1ba4: d51bb42f msr s3_3_c11_c4_1, x15 - 1ba8: d53bb42f mrs x15, s3_3_c11_c4_1 - 1bac: d51bb44f msr s3_3_c11_c4_2, x15 - 1bb0: d53bb44f mrs x15, s3_3_c11_c4_2 - 1bb4: d51bb46f msr s3_3_c11_c4_3, x15 - 1bb8: d53bb46f mrs x15, s3_3_c11_c4_3 - 1bbc: d51bb48f msr s3_3_c11_c4_4, x15 - 1bc0: d53bb48f mrs x15, s3_3_c11_c4_4 - 1bc4: d51bb4af msr s3_3_c11_c4_5, x15 - 1bc8: d53bb4af mrs x15, s3_3_c11_c4_5 - 1bcc: d51bb4cf msr s3_3_c11_c4_6, x15 - 1bd0: d53bb4cf mrs x15, s3_3_c11_c4_6 - 1bd4: d51bb4ef msr s3_3_c11_c4_7, x15 - 1bd8: d53bb4ef mrs x15, s3_3_c11_c4_7 - 1bdc: d51bb50f msr s3_3_c11_c5_0, x15 - 1be0: d53bb50f mrs x15, s3_3_c11_c5_0 - 1be4: d51bb52f msr s3_3_c11_c5_1, x15 - 1be8: d53bb52f mrs x15, s3_3_c11_c5_1 - 1bec: d51bb54f msr s3_3_c11_c5_2, x15 - 1bf0: d53bb54f mrs x15, s3_3_c11_c5_2 - 1bf4: d51bb56f msr s3_3_c11_c5_3, x15 - 1bf8: d53bb56f mrs x15, s3_3_c11_c5_3 - 1bfc: d51bb58f msr s3_3_c11_c5_4, x15 - 1c00: d53bb58f mrs x15, s3_3_c11_c5_4 - 1c04: d51bb5af msr s3_3_c11_c5_5, x15 - 1c08: d53bb5af mrs x15, s3_3_c11_c5_5 - 1c0c: d51bb5cf msr s3_3_c11_c5_6, x15 - 1c10: d53bb5cf mrs x15, s3_3_c11_c5_6 - 1c14: d51bb5ef msr s3_3_c11_c5_7, x15 - 1c18: d53bb5ef mrs x15, s3_3_c11_c5_7 - 1c1c: d51bb60f msr s3_3_c11_c6_0, x15 - 1c20: d53bb60f mrs x15, s3_3_c11_c6_0 - 1c24: d51bb62f msr s3_3_c11_c6_1, x15 - 1c28: d53bb62f mrs x15, s3_3_c11_c6_1 - 1c2c: d51bb64f msr s3_3_c11_c6_2, x15 - 1c30: d53bb64f mrs x15, s3_3_c11_c6_2 - 1c34: d51bb66f msr s3_3_c11_c6_3, x15 - 1c38: d53bb66f mrs x15, s3_3_c11_c6_3 - 1c3c: d51bb68f msr s3_3_c11_c6_4, x15 - 1c40: d53bb68f mrs x15, s3_3_c11_c6_4 - 1c44: d51bb6af msr s3_3_c11_c6_5, x15 - 1c48: d53bb6af mrs x15, s3_3_c11_c6_5 - 1c4c: d51bb6cf msr s3_3_c11_c6_6, x15 - 1c50: d53bb6cf mrs x15, s3_3_c11_c6_6 - 1c54: d51bb6ef msr s3_3_c11_c6_7, x15 - 1c58: d53bb6ef mrs x15, s3_3_c11_c6_7 - 1c5c: d51bb70f msr s3_3_c11_c7_0, x15 - 1c60: d53bb70f mrs x15, s3_3_c11_c7_0 - 1c64: d51bb72f msr s3_3_c11_c7_1, x15 - 1c68: d53bb72f mrs x15, s3_3_c11_c7_1 - 1c6c: d51bb74f msr s3_3_c11_c7_2, x15 - 1c70: d53bb74f mrs x15, s3_3_c11_c7_2 - 1c74: d51bb76f msr s3_3_c11_c7_3, x15 - 1c78: d53bb76f mrs x15, s3_3_c11_c7_3 - 1c7c: d51bb78f msr s3_3_c11_c7_4, x15 - 1c80: d53bb78f mrs x15, s3_3_c11_c7_4 - 1c84: d51bb7af msr s3_3_c11_c7_5, x15 - 1c88: d53bb7af mrs x15, s3_3_c11_c7_5 - 1c8c: d51bb7cf msr s3_3_c11_c7_6, x15 - 1c90: d53bb7cf mrs x15, s3_3_c11_c7_6 - 1c94: d51bb7ef msr s3_3_c11_c7_7, x15 - 1c98: d53bb7ef mrs x15, s3_3_c11_c7_7 - 1c9c: d51bb80f msr s3_3_c11_c8_0, x15 - 1ca0: d53bb80f mrs x15, s3_3_c11_c8_0 - 1ca4: d51bb82f msr s3_3_c11_c8_1, x15 - 1ca8: d53bb82f mrs x15, s3_3_c11_c8_1 - 1cac: d51bb84f msr s3_3_c11_c8_2, x15 - 1cb0: d53bb84f mrs x15, s3_3_c11_c8_2 - 1cb4: d51bb86f msr s3_3_c11_c8_3, x15 - 1cb8: d53bb86f mrs x15, s3_3_c11_c8_3 - 1cbc: d51bb88f msr s3_3_c11_c8_4, x15 - 1cc0: d53bb88f mrs x15, s3_3_c11_c8_4 - 1cc4: d51bb8af msr s3_3_c11_c8_5, x15 - 1cc8: d53bb8af mrs x15, s3_3_c11_c8_5 - 1ccc: d51bb8cf msr s3_3_c11_c8_6, x15 - 1cd0: d53bb8cf mrs x15, s3_3_c11_c8_6 - 1cd4: d51bb8ef msr s3_3_c11_c8_7, x15 - 1cd8: d53bb8ef mrs x15, s3_3_c11_c8_7 - 1cdc: d51bb90f msr s3_3_c11_c9_0, x15 - 1ce0: d53bb90f mrs x15, s3_3_c11_c9_0 - 1ce4: d51bb92f msr s3_3_c11_c9_1, x15 - 1ce8: d53bb92f mrs x15, s3_3_c11_c9_1 - 1cec: d51bb94f msr s3_3_c11_c9_2, x15 - 1cf0: d53bb94f mrs x15, s3_3_c11_c9_2 - 1cf4: d51bb96f msr s3_3_c11_c9_3, x15 - 1cf8: d53bb96f mrs x15, s3_3_c11_c9_3 - 1cfc: d51bb98f msr s3_3_c11_c9_4, x15 - 1d00: d53bb98f mrs x15, s3_3_c11_c9_4 - 1d04: d51bb9af msr s3_3_c11_c9_5, x15 - 1d08: d53bb9af mrs x15, s3_3_c11_c9_5 - 1d0c: d51bb9cf msr s3_3_c11_c9_6, x15 - 1d10: d53bb9cf mrs x15, s3_3_c11_c9_6 - 1d14: d51bb9ef msr s3_3_c11_c9_7, x15 - 1d18: d53bb9ef mrs x15, s3_3_c11_c9_7 - 1d1c: d51bba0f msr s3_3_c11_c10_0, x15 - 1d20: d53bba0f mrs x15, s3_3_c11_c10_0 - 1d24: d51bba2f msr s3_3_c11_c10_1, x15 - 1d28: d53bba2f mrs x15, s3_3_c11_c10_1 - 1d2c: d51bba4f msr s3_3_c11_c10_2, x15 - 1d30: d53bba4f mrs x15, s3_3_c11_c10_2 - 1d34: d51bba6f msr s3_3_c11_c10_3, x15 - 1d38: d53bba6f mrs x15, s3_3_c11_c10_3 - 1d3c: d51bba8f msr s3_3_c11_c10_4, x15 - 1d40: d53bba8f mrs x15, s3_3_c11_c10_4 - 1d44: d51bbaaf msr s3_3_c11_c10_5, x15 - 1d48: d53bbaaf mrs x15, s3_3_c11_c10_5 - 1d4c: d51bbacf msr s3_3_c11_c10_6, x15 - 1d50: d53bbacf mrs x15, s3_3_c11_c10_6 - 1d54: d51bbaef msr s3_3_c11_c10_7, x15 - 1d58: d53bbaef mrs x15, s3_3_c11_c10_7 - 1d5c: d51bbb0f msr s3_3_c11_c11_0, x15 - 1d60: d53bbb0f mrs x15, s3_3_c11_c11_0 - 1d64: d51bbb2f msr s3_3_c11_c11_1, x15 - 1d68: d53bbb2f mrs x15, s3_3_c11_c11_1 - 1d6c: d51bbb4f msr s3_3_c11_c11_2, x15 - 1d70: d53bbb4f mrs x15, s3_3_c11_c11_2 - 1d74: d51bbb6f msr s3_3_c11_c11_3, x15 - 1d78: d53bbb6f mrs x15, s3_3_c11_c11_3 - 1d7c: d51bbb8f msr s3_3_c11_c11_4, x15 - 1d80: d53bbb8f mrs x15, s3_3_c11_c11_4 - 1d84: d51bbbaf msr s3_3_c11_c11_5, x15 - 1d88: d53bbbaf mrs x15, s3_3_c11_c11_5 - 1d8c: d51bbbcf msr s3_3_c11_c11_6, x15 - 1d90: d53bbbcf mrs x15, s3_3_c11_c11_6 - 1d94: d51bbbef msr s3_3_c11_c11_7, x15 - 1d98: d53bbbef mrs x15, s3_3_c11_c11_7 - 1d9c: d51bbc0f msr s3_3_c11_c12_0, x15 - 1da0: d53bbc0f mrs x15, s3_3_c11_c12_0 - 1da4: d51bbc2f msr s3_3_c11_c12_1, x15 - 1da8: d53bbc2f mrs x15, s3_3_c11_c12_1 - 1dac: d51bbc4f msr s3_3_c11_c12_2, x15 - 1db0: d53bbc4f mrs x15, s3_3_c11_c12_2 - 1db4: d51bbc6f msr s3_3_c11_c12_3, x15 - 1db8: d53bbc6f mrs x15, s3_3_c11_c12_3 - 1dbc: d51bbc8f msr s3_3_c11_c12_4, x15 - 1dc0: d53bbc8f mrs x15, s3_3_c11_c12_4 - 1dc4: d51bbcaf msr s3_3_c11_c12_5, x15 - 1dc8: d53bbcaf mrs x15, s3_3_c11_c12_5 - 1dcc: d51bbccf msr s3_3_c11_c12_6, x15 - 1dd0: d53bbccf mrs x15, s3_3_c11_c12_6 - 1dd4: d51bbcef msr s3_3_c11_c12_7, x15 - 1dd8: d53bbcef mrs x15, s3_3_c11_c12_7 - 1ddc: d51bbd0f msr s3_3_c11_c13_0, x15 - 1de0: d53bbd0f mrs x15, s3_3_c11_c13_0 - 1de4: d51bbd2f msr s3_3_c11_c13_1, x15 - 1de8: d53bbd2f mrs x15, s3_3_c11_c13_1 - 1dec: d51bbd4f msr s3_3_c11_c13_2, x15 - 1df0: d53bbd4f mrs x15, s3_3_c11_c13_2 - 1df4: d51bbd6f msr s3_3_c11_c13_3, x15 - 1df8: d53bbd6f mrs x15, s3_3_c11_c13_3 - 1dfc: d51bbd8f msr s3_3_c11_c13_4, x15 - 1e00: d53bbd8f mrs x15, s3_3_c11_c13_4 - 1e04: d51bbdaf msr s3_3_c11_c13_5, x15 - 1e08: d53bbdaf mrs x15, s3_3_c11_c13_5 - 1e0c: d51bbdcf msr s3_3_c11_c13_6, x15 - 1e10: d53bbdcf mrs x15, s3_3_c11_c13_6 - 1e14: d51bbdef msr s3_3_c11_c13_7, x15 - 1e18: d53bbdef mrs x15, s3_3_c11_c13_7 - 1e1c: d51bbe0f msr s3_3_c11_c14_0, x15 - 1e20: d53bbe0f mrs x15, s3_3_c11_c14_0 - 1e24: d51bbe2f msr s3_3_c11_c14_1, x15 - 1e28: d53bbe2f mrs x15, s3_3_c11_c14_1 - 1e2c: d51bbe4f msr s3_3_c11_c14_2, x15 - 1e30: d53bbe4f mrs x15, s3_3_c11_c14_2 - 1e34: d51bbe6f msr s3_3_c11_c14_3, x15 - 1e38: d53bbe6f mrs x15, s3_3_c11_c14_3 - 1e3c: d51bbe8f msr s3_3_c11_c14_4, x15 - 1e40: d53bbe8f mrs x15, s3_3_c11_c14_4 - 1e44: d51bbeaf msr s3_3_c11_c14_5, x15 - 1e48: d53bbeaf mrs x15, s3_3_c11_c14_5 - 1e4c: d51bbecf msr s3_3_c11_c14_6, x15 - 1e50: d53bbecf mrs x15, s3_3_c11_c14_6 - 1e54: d51bbeef msr s3_3_c11_c14_7, x15 - 1e58: d53bbeef mrs x15, s3_3_c11_c14_7 - 1e5c: d51bbf0f msr s3_3_c11_c15_0, x15 - 1e60: d53bbf0f mrs x15, s3_3_c11_c15_0 - 1e64: d51bbf2f msr s3_3_c11_c15_1, x15 - 1e68: d53bbf2f mrs x15, s3_3_c11_c15_1 - 1e6c: d51bbf4f msr s3_3_c11_c15_2, x15 - 1e70: d53bbf4f mrs x15, s3_3_c11_c15_2 - 1e74: d51bbf6f msr s3_3_c11_c15_3, x15 - 1e78: d53bbf6f mrs x15, s3_3_c11_c15_3 - 1e7c: d51bbf8f msr s3_3_c11_c15_4, x15 - 1e80: d53bbf8f mrs x15, s3_3_c11_c15_4 - 1e84: d51bbfaf msr s3_3_c11_c15_5, x15 - 1e88: d53bbfaf mrs x15, s3_3_c11_c15_5 - 1e8c: d51bbfcf msr s3_3_c11_c15_6, x15 - 1e90: d53bbfcf mrs x15, s3_3_c11_c15_6 - 1e94: d51bbfef msr s3_3_c11_c15_7, x15 - 1e98: d53bbfef mrs x15, s3_3_c11_c15_7 - 1e9c: d51bf00f msr s3_3_c15_c0_0, x15 - 1ea0: d53bf00f mrs x15, s3_3_c15_c0_0 - 1ea4: d51bf02f msr s3_3_c15_c0_1, x15 - 1ea8: d53bf02f mrs x15, s3_3_c15_c0_1 - 1eac: d51bf04f msr s3_3_c15_c0_2, x15 - 1eb0: d53bf04f mrs x15, s3_3_c15_c0_2 - 1eb4: d51bf06f msr s3_3_c15_c0_3, x15 - 1eb8: d53bf06f mrs x15, s3_3_c15_c0_3 - 1ebc: d51bf08f msr s3_3_c15_c0_4, x15 - 1ec0: d53bf08f mrs x15, s3_3_c15_c0_4 - 1ec4: d51bf0af msr s3_3_c15_c0_5, x15 - 1ec8: d53bf0af mrs x15, s3_3_c15_c0_5 - 1ecc: d51bf0cf msr s3_3_c15_c0_6, x15 - 1ed0: d53bf0cf mrs x15, s3_3_c15_c0_6 - 1ed4: d51bf0ef msr s3_3_c15_c0_7, x15 - 1ed8: d53bf0ef mrs x15, s3_3_c15_c0_7 - 1edc: d51bf10f msr s3_3_c15_c1_0, x15 - 1ee0: d53bf10f mrs x15, s3_3_c15_c1_0 - 1ee4: d51bf12f msr s3_3_c15_c1_1, x15 - 1ee8: d53bf12f mrs x15, s3_3_c15_c1_1 - 1eec: d51bf14f msr s3_3_c15_c1_2, x15 - 1ef0: d53bf14f mrs x15, s3_3_c15_c1_2 - 1ef4: d51bf16f msr s3_3_c15_c1_3, x15 - 1ef8: d53bf16f mrs x15, s3_3_c15_c1_3 - 1efc: d51bf18f msr s3_3_c15_c1_4, x15 - 1f00: d53bf18f mrs x15, s3_3_c15_c1_4 - 1f04: d51bf1af msr s3_3_c15_c1_5, x15 - 1f08: d53bf1af mrs x15, s3_3_c15_c1_5 - 1f0c: d51bf1cf msr s3_3_c15_c1_6, x15 - 1f10: d53bf1cf mrs x15, s3_3_c15_c1_6 - 1f14: d51bf1ef msr s3_3_c15_c1_7, x15 - 1f18: d53bf1ef mrs x15, s3_3_c15_c1_7 - 1f1c: d51bf20f msr s3_3_c15_c2_0, x15 - 1f20: d53bf20f mrs x15, s3_3_c15_c2_0 - 1f24: d51bf22f msr s3_3_c15_c2_1, x15 - 1f28: d53bf22f mrs x15, s3_3_c15_c2_1 - 1f2c: d51bf24f msr s3_3_c15_c2_2, x15 - 1f30: d53bf24f mrs x15, s3_3_c15_c2_2 - 1f34: d51bf26f msr s3_3_c15_c2_3, x15 - 1f38: d53bf26f mrs x15, s3_3_c15_c2_3 - 1f3c: d51bf28f msr s3_3_c15_c2_4, x15 - 1f40: d53bf28f mrs x15, s3_3_c15_c2_4 - 1f44: d51bf2af msr s3_3_c15_c2_5, x15 - 1f48: d53bf2af mrs x15, s3_3_c15_c2_5 - 1f4c: d51bf2cf msr s3_3_c15_c2_6, x15 - 1f50: d53bf2cf mrs x15, s3_3_c15_c2_6 - 1f54: d51bf2ef msr s3_3_c15_c2_7, x15 - 1f58: d53bf2ef mrs x15, s3_3_c15_c2_7 - 1f5c: d51bf30f msr s3_3_c15_c3_0, x15 - 1f60: d53bf30f mrs x15, s3_3_c15_c3_0 - 1f64: d51bf32f msr s3_3_c15_c3_1, x15 - 1f68: d53bf32f mrs x15, s3_3_c15_c3_1 - 1f6c: d51bf34f msr s3_3_c15_c3_2, x15 - 1f70: d53bf34f mrs x15, s3_3_c15_c3_2 - 1f74: d51bf36f msr s3_3_c15_c3_3, x15 - 1f78: d53bf36f mrs x15, s3_3_c15_c3_3 - 1f7c: d51bf38f msr s3_3_c15_c3_4, x15 - 1f80: d53bf38f mrs x15, s3_3_c15_c3_4 - 1f84: d51bf3af msr s3_3_c15_c3_5, x15 - 1f88: d53bf3af mrs x15, s3_3_c15_c3_5 - 1f8c: d51bf3cf msr s3_3_c15_c3_6, x15 - 1f90: d53bf3cf mrs x15, s3_3_c15_c3_6 - 1f94: d51bf3ef msr s3_3_c15_c3_7, x15 - 1f98: d53bf3ef mrs x15, s3_3_c15_c3_7 - 1f9c: d51bf40f msr s3_3_c15_c4_0, x15 - 1fa0: d53bf40f mrs x15, s3_3_c15_c4_0 - 1fa4: d51bf42f msr s3_3_c15_c4_1, x15 - 1fa8: d53bf42f mrs x15, s3_3_c15_c4_1 - 1fac: d51bf44f msr s3_3_c15_c4_2, x15 - 1fb0: d53bf44f mrs x15, s3_3_c15_c4_2 - 1fb4: d51bf46f msr s3_3_c15_c4_3, x15 - 1fb8: d53bf46f mrs x15, s3_3_c15_c4_3 - 1fbc: d51bf48f msr s3_3_c15_c4_4, x15 - 1fc0: d53bf48f mrs x15, s3_3_c15_c4_4 - 1fc4: d51bf4af msr s3_3_c15_c4_5, x15 - 1fc8: d53bf4af mrs x15, s3_3_c15_c4_5 - 1fcc: d51bf4cf msr s3_3_c15_c4_6, x15 - 1fd0: d53bf4cf mrs x15, s3_3_c15_c4_6 - 1fd4: d51bf4ef msr s3_3_c15_c4_7, x15 - 1fd8: d53bf4ef mrs x15, s3_3_c15_c4_7 - 1fdc: d51bf50f msr s3_3_c15_c5_0, x15 - 1fe0: d53bf50f mrs x15, s3_3_c15_c5_0 - 1fe4: d51bf52f msr s3_3_c15_c5_1, x15 - 1fe8: d53bf52f mrs x15, s3_3_c15_c5_1 - 1fec: d51bf54f msr s3_3_c15_c5_2, x15 - 1ff0: d53bf54f mrs x15, s3_3_c15_c5_2 - 1ff4: d51bf56f msr s3_3_c15_c5_3, x15 - 1ff8: d53bf56f mrs x15, s3_3_c15_c5_3 - 1ffc: d51bf58f msr s3_3_c15_c5_4, x15 - 2000: d53bf58f mrs x15, s3_3_c15_c5_4 - 2004: d51bf5af msr s3_3_c15_c5_5, x15 - 2008: d53bf5af mrs x15, s3_3_c15_c5_5 - 200c: d51bf5cf msr s3_3_c15_c5_6, x15 - 2010: d53bf5cf mrs x15, s3_3_c15_c5_6 - 2014: d51bf5ef msr s3_3_c15_c5_7, x15 - 2018: d53bf5ef mrs x15, s3_3_c15_c5_7 - 201c: d51bf60f msr s3_3_c15_c6_0, x15 - 2020: d53bf60f mrs x15, s3_3_c15_c6_0 - 2024: d51bf62f msr s3_3_c15_c6_1, x15 - 2028: d53bf62f mrs x15, s3_3_c15_c6_1 - 202c: d51bf64f msr s3_3_c15_c6_2, x15 - 2030: d53bf64f mrs x15, s3_3_c15_c6_2 - 2034: d51bf66f msr s3_3_c15_c6_3, x15 - 2038: d53bf66f mrs x15, s3_3_c15_c6_3 - 203c: d51bf68f msr s3_3_c15_c6_4, x15 - 2040: d53bf68f mrs x15, s3_3_c15_c6_4 - 2044: d51bf6af msr s3_3_c15_c6_5, x15 - 2048: d53bf6af mrs x15, s3_3_c15_c6_5 - 204c: d51bf6cf msr s3_3_c15_c6_6, x15 - 2050: d53bf6cf mrs x15, s3_3_c15_c6_6 - 2054: d51bf6ef msr s3_3_c15_c6_7, x15 - 2058: d53bf6ef mrs x15, s3_3_c15_c6_7 - 205c: d51bf70f msr s3_3_c15_c7_0, x15 - 2060: d53bf70f mrs x15, s3_3_c15_c7_0 - 2064: d51bf72f msr s3_3_c15_c7_1, x15 - 2068: d53bf72f mrs x15, s3_3_c15_c7_1 - 206c: d51bf74f msr s3_3_c15_c7_2, x15 - 2070: d53bf74f mrs x15, s3_3_c15_c7_2 - 2074: d51bf76f msr s3_3_c15_c7_3, x15 - 2078: d53bf76f mrs x15, s3_3_c15_c7_3 - 207c: d51bf78f msr s3_3_c15_c7_4, x15 - 2080: d53bf78f mrs x15, s3_3_c15_c7_4 - 2084: d51bf7af msr s3_3_c15_c7_5, x15 - 2088: d53bf7af mrs x15, s3_3_c15_c7_5 - 208c: d51bf7cf msr s3_3_c15_c7_6, x15 - 2090: d53bf7cf mrs x15, s3_3_c15_c7_6 - 2094: d51bf7ef msr s3_3_c15_c7_7, x15 - 2098: d53bf7ef mrs x15, s3_3_c15_c7_7 - 209c: d51bf80f msr s3_3_c15_c8_0, x15 - 20a0: d53bf80f mrs x15, s3_3_c15_c8_0 - 20a4: d51bf82f msr s3_3_c15_c8_1, x15 - 20a8: d53bf82f mrs x15, s3_3_c15_c8_1 - 20ac: d51bf84f msr s3_3_c15_c8_2, x15 - 20b0: d53bf84f mrs x15, s3_3_c15_c8_2 - 20b4: d51bf86f msr s3_3_c15_c8_3, x15 - 20b8: d53bf86f mrs x15, s3_3_c15_c8_3 - 20bc: d51bf88f msr s3_3_c15_c8_4, x15 - 20c0: d53bf88f mrs x15, s3_3_c15_c8_4 - 20c4: d51bf8af msr s3_3_c15_c8_5, x15 - 20c8: d53bf8af mrs x15, s3_3_c15_c8_5 - 20cc: d51bf8cf msr s3_3_c15_c8_6, x15 - 20d0: d53bf8cf mrs x15, s3_3_c15_c8_6 - 20d4: d51bf8ef msr s3_3_c15_c8_7, x15 - 20d8: d53bf8ef mrs x15, s3_3_c15_c8_7 - 20dc: d51bf90f msr s3_3_c15_c9_0, x15 - 20e0: d53bf90f mrs x15, s3_3_c15_c9_0 - 20e4: d51bf92f msr s3_3_c15_c9_1, x15 - 20e8: d53bf92f mrs x15, s3_3_c15_c9_1 - 20ec: d51bf94f msr s3_3_c15_c9_2, x15 - 20f0: d53bf94f mrs x15, s3_3_c15_c9_2 - 20f4: d51bf96f msr s3_3_c15_c9_3, x15 - 20f8: d53bf96f mrs x15, s3_3_c15_c9_3 - 20fc: d51bf98f msr s3_3_c15_c9_4, x15 - 2100: d53bf98f mrs x15, s3_3_c15_c9_4 - 2104: d51bf9af msr s3_3_c15_c9_5, x15 - 2108: d53bf9af mrs x15, s3_3_c15_c9_5 - 210c: d51bf9cf msr s3_3_c15_c9_6, x15 - 2110: d53bf9cf mrs x15, s3_3_c15_c9_6 - 2114: d51bf9ef msr s3_3_c15_c9_7, x15 - 2118: d53bf9ef mrs x15, s3_3_c15_c9_7 - 211c: d51bfa0f msr s3_3_c15_c10_0, x15 - 2120: d53bfa0f mrs x15, s3_3_c15_c10_0 - 2124: d51bfa2f msr s3_3_c15_c10_1, x15 - 2128: d53bfa2f mrs x15, s3_3_c15_c10_1 - 212c: d51bfa4f msr s3_3_c15_c10_2, x15 - 2130: d53bfa4f mrs x15, s3_3_c15_c10_2 - 2134: d51bfa6f msr s3_3_c15_c10_3, x15 - 2138: d53bfa6f mrs x15, s3_3_c15_c10_3 - 213c: d51bfa8f msr s3_3_c15_c10_4, x15 - 2140: d53bfa8f mrs x15, s3_3_c15_c10_4 - 2144: d51bfaaf msr s3_3_c15_c10_5, x15 - 2148: d53bfaaf mrs x15, s3_3_c15_c10_5 - 214c: d51bfacf msr s3_3_c15_c10_6, x15 - 2150: d53bfacf mrs x15, s3_3_c15_c10_6 - 2154: d51bfaef msr s3_3_c15_c10_7, x15 - 2158: d53bfaef mrs x15, s3_3_c15_c10_7 - 215c: d51bfb0f msr s3_3_c15_c11_0, x15 - 2160: d53bfb0f mrs x15, s3_3_c15_c11_0 - 2164: d51bfb2f msr s3_3_c15_c11_1, x15 - 2168: d53bfb2f mrs x15, s3_3_c15_c11_1 - 216c: d51bfb4f msr s3_3_c15_c11_2, x15 - 2170: d53bfb4f mrs x15, s3_3_c15_c11_2 - 2174: d51bfb6f msr s3_3_c15_c11_3, x15 - 2178: d53bfb6f mrs x15, s3_3_c15_c11_3 - 217c: d51bfb8f msr s3_3_c15_c11_4, x15 - 2180: d53bfb8f mrs x15, s3_3_c15_c11_4 - 2184: d51bfbaf msr s3_3_c15_c11_5, x15 - 2188: d53bfbaf mrs x15, s3_3_c15_c11_5 - 218c: d51bfbcf msr s3_3_c15_c11_6, x15 - 2190: d53bfbcf mrs x15, s3_3_c15_c11_6 - 2194: d51bfbef msr s3_3_c15_c11_7, x15 - 2198: d53bfbef mrs x15, s3_3_c15_c11_7 - 219c: d51bfc0f msr s3_3_c15_c12_0, x15 - 21a0: d53bfc0f mrs x15, s3_3_c15_c12_0 - 21a4: d51bfc2f msr s3_3_c15_c12_1, x15 - 21a8: d53bfc2f mrs x15, s3_3_c15_c12_1 - 21ac: d51bfc4f msr s3_3_c15_c12_2, x15 - 21b0: d53bfc4f mrs x15, s3_3_c15_c12_2 - 21b4: d51bfc6f msr s3_3_c15_c12_3, x15 - 21b8: d53bfc6f mrs x15, s3_3_c15_c12_3 - 21bc: d51bfc8f msr s3_3_c15_c12_4, x15 - 21c0: d53bfc8f mrs x15, s3_3_c15_c12_4 - 21c4: d51bfcaf msr s3_3_c15_c12_5, x15 - 21c8: d53bfcaf mrs x15, s3_3_c15_c12_5 - 21cc: d51bfccf msr s3_3_c15_c12_6, x15 - 21d0: d53bfccf mrs x15, s3_3_c15_c12_6 - 21d4: d51bfcef msr s3_3_c15_c12_7, x15 - 21d8: d53bfcef mrs x15, s3_3_c15_c12_7 - 21dc: d51bfd0f msr s3_3_c15_c13_0, x15 - 21e0: d53bfd0f mrs x15, s3_3_c15_c13_0 - 21e4: d51bfd2f msr s3_3_c15_c13_1, x15 - 21e8: d53bfd2f mrs x15, s3_3_c15_c13_1 - 21ec: d51bfd4f msr s3_3_c15_c13_2, x15 - 21f0: d53bfd4f mrs x15, s3_3_c15_c13_2 - 21f4: d51bfd6f msr s3_3_c15_c13_3, x15 - 21f8: d53bfd6f mrs x15, s3_3_c15_c13_3 - 21fc: d51bfd8f msr s3_3_c15_c13_4, x15 - 2200: d53bfd8f mrs x15, s3_3_c15_c13_4 - 2204: d51bfdaf msr s3_3_c15_c13_5, x15 - 2208: d53bfdaf mrs x15, s3_3_c15_c13_5 - 220c: d51bfdcf msr s3_3_c15_c13_6, x15 - 2210: d53bfdcf mrs x15, s3_3_c15_c13_6 - 2214: d51bfdef msr s3_3_c15_c13_7, x15 - 2218: d53bfdef mrs x15, s3_3_c15_c13_7 - 221c: d51bfe0f msr s3_3_c15_c14_0, x15 - 2220: d53bfe0f mrs x15, s3_3_c15_c14_0 - 2224: d51bfe2f msr s3_3_c15_c14_1, x15 - 2228: d53bfe2f mrs x15, s3_3_c15_c14_1 - 222c: d51bfe4f msr s3_3_c15_c14_2, x15 - 2230: d53bfe4f mrs x15, s3_3_c15_c14_2 - 2234: d51bfe6f msr s3_3_c15_c14_3, x15 - 2238: d53bfe6f mrs x15, s3_3_c15_c14_3 - 223c: d51bfe8f msr s3_3_c15_c14_4, x15 - 2240: d53bfe8f mrs x15, s3_3_c15_c14_4 - 2244: d51bfeaf msr s3_3_c15_c14_5, x15 - 2248: d53bfeaf mrs x15, s3_3_c15_c14_5 - 224c: d51bfecf msr s3_3_c15_c14_6, x15 - 2250: d53bfecf mrs x15, s3_3_c15_c14_6 - 2254: d51bfeef msr s3_3_c15_c14_7, x15 - 2258: d53bfeef mrs x15, s3_3_c15_c14_7 - 225c: d51bff0f msr s3_3_c15_c15_0, x15 - 2260: d53bff0f mrs x15, s3_3_c15_c15_0 - 2264: d51bff2f msr s3_3_c15_c15_1, x15 - 2268: d53bff2f mrs x15, s3_3_c15_c15_1 - 226c: d51bff4f msr s3_3_c15_c15_2, x15 - 2270: d53bff4f mrs x15, s3_3_c15_c15_2 - 2274: d51bff6f msr s3_3_c15_c15_3, x15 - 2278: d53bff6f mrs x15, s3_3_c15_c15_3 - 227c: d51bff8f msr s3_3_c15_c15_4, x15 - 2280: d53bff8f mrs x15, s3_3_c15_c15_4 - 2284: d51bffaf msr s3_3_c15_c15_5, x15 - 2288: d53bffaf mrs x15, s3_3_c15_c15_5 - 228c: d51bffcf msr s3_3_c15_c15_6, x15 - 2290: d53bffcf mrs x15, s3_3_c15_c15_6 - 2294: d51bffef msr s3_3_c15_c15_7, x15 - 2298: d53bffef mrs x15, s3_3_c15_c15_7 - 229c: d51cb00f msr s3_4_c11_c0_0, x15 - 22a0: d53cb00f mrs x15, s3_4_c11_c0_0 - 22a4: d51cb02f msr s3_4_c11_c0_1, x15 - 22a8: d53cb02f mrs x15, s3_4_c11_c0_1 - 22ac: d51cb04f msr s3_4_c11_c0_2, x15 - 22b0: d53cb04f mrs x15, s3_4_c11_c0_2 - 22b4: d51cb06f msr s3_4_c11_c0_3, x15 - 22b8: d53cb06f mrs x15, s3_4_c11_c0_3 - 22bc: d51cb08f msr s3_4_c11_c0_4, x15 - 22c0: d53cb08f mrs x15, s3_4_c11_c0_4 - 22c4: d51cb0af msr s3_4_c11_c0_5, x15 - 22c8: d53cb0af mrs x15, s3_4_c11_c0_5 - 22cc: d51cb0cf msr s3_4_c11_c0_6, x15 - 22d0: d53cb0cf mrs x15, s3_4_c11_c0_6 - 22d4: d51cb0ef msr s3_4_c11_c0_7, x15 - 22d8: d53cb0ef mrs x15, s3_4_c11_c0_7 - 22dc: d51cb10f msr s3_4_c11_c1_0, x15 - 22e0: d53cb10f mrs x15, s3_4_c11_c1_0 - 22e4: d51cb12f msr s3_4_c11_c1_1, x15 - 22e8: d53cb12f mrs x15, s3_4_c11_c1_1 - 22ec: d51cb14f msr s3_4_c11_c1_2, x15 - 22f0: d53cb14f mrs x15, s3_4_c11_c1_2 - 22f4: d51cb16f msr s3_4_c11_c1_3, x15 - 22f8: d53cb16f mrs x15, s3_4_c11_c1_3 - 22fc: d51cb18f msr s3_4_c11_c1_4, x15 - 2300: d53cb18f mrs x15, s3_4_c11_c1_4 - 2304: d51cb1af msr s3_4_c11_c1_5, x15 - 2308: d53cb1af mrs x15, s3_4_c11_c1_5 - 230c: d51cb1cf msr s3_4_c11_c1_6, x15 - 2310: d53cb1cf mrs x15, s3_4_c11_c1_6 - 2314: d51cb1ef msr s3_4_c11_c1_7, x15 - 2318: d53cb1ef mrs x15, s3_4_c11_c1_7 - 231c: d51cb20f msr s3_4_c11_c2_0, x15 - 2320: d53cb20f mrs x15, s3_4_c11_c2_0 - 2324: d51cb22f msr s3_4_c11_c2_1, x15 - 2328: d53cb22f mrs x15, s3_4_c11_c2_1 - 232c: d51cb24f msr s3_4_c11_c2_2, x15 - 2330: d53cb24f mrs x15, s3_4_c11_c2_2 - 2334: d51cb26f msr s3_4_c11_c2_3, x15 - 2338: d53cb26f mrs x15, s3_4_c11_c2_3 - 233c: d51cb28f msr s3_4_c11_c2_4, x15 - 2340: d53cb28f mrs x15, s3_4_c11_c2_4 - 2344: d51cb2af msr s3_4_c11_c2_5, x15 - 2348: d53cb2af mrs x15, s3_4_c11_c2_5 - 234c: d51cb2cf msr s3_4_c11_c2_6, x15 - 2350: d53cb2cf mrs x15, s3_4_c11_c2_6 - 2354: d51cb2ef msr s3_4_c11_c2_7, x15 - 2358: d53cb2ef mrs x15, s3_4_c11_c2_7 - 235c: d51cb30f msr s3_4_c11_c3_0, x15 - 2360: d53cb30f mrs x15, s3_4_c11_c3_0 - 2364: d51cb32f msr s3_4_c11_c3_1, x15 - 2368: d53cb32f mrs x15, s3_4_c11_c3_1 - 236c: d51cb34f msr s3_4_c11_c3_2, x15 - 2370: d53cb34f mrs x15, s3_4_c11_c3_2 - 2374: d51cb36f msr s3_4_c11_c3_3, x15 - 2378: d53cb36f mrs x15, s3_4_c11_c3_3 - 237c: d51cb38f msr s3_4_c11_c3_4, x15 - 2380: d53cb38f mrs x15, s3_4_c11_c3_4 - 2384: d51cb3af msr s3_4_c11_c3_5, x15 - 2388: d53cb3af mrs x15, s3_4_c11_c3_5 - 238c: d51cb3cf msr s3_4_c11_c3_6, x15 - 2390: d53cb3cf mrs x15, s3_4_c11_c3_6 - 2394: d51cb3ef msr s3_4_c11_c3_7, x15 - 2398: d53cb3ef mrs x15, s3_4_c11_c3_7 - 239c: d51cb40f msr s3_4_c11_c4_0, x15 - 23a0: d53cb40f mrs x15, s3_4_c11_c4_0 - 23a4: d51cb42f msr s3_4_c11_c4_1, x15 - 23a8: d53cb42f mrs x15, s3_4_c11_c4_1 - 23ac: d51cb44f msr s3_4_c11_c4_2, x15 - 23b0: d53cb44f mrs x15, s3_4_c11_c4_2 - 23b4: d51cb46f msr s3_4_c11_c4_3, x15 - 23b8: d53cb46f mrs x15, s3_4_c11_c4_3 - 23bc: d51cb48f msr s3_4_c11_c4_4, x15 - 23c0: d53cb48f mrs x15, s3_4_c11_c4_4 - 23c4: d51cb4af msr s3_4_c11_c4_5, x15 - 23c8: d53cb4af mrs x15, s3_4_c11_c4_5 - 23cc: d51cb4cf msr s3_4_c11_c4_6, x15 - 23d0: d53cb4cf mrs x15, s3_4_c11_c4_6 - 23d4: d51cb4ef msr s3_4_c11_c4_7, x15 - 23d8: d53cb4ef mrs x15, s3_4_c11_c4_7 - 23dc: d51cb50f msr s3_4_c11_c5_0, x15 - 23e0: d53cb50f mrs x15, s3_4_c11_c5_0 - 23e4: d51cb52f msr s3_4_c11_c5_1, x15 - 23e8: d53cb52f mrs x15, s3_4_c11_c5_1 - 23ec: d51cb54f msr s3_4_c11_c5_2, x15 - 23f0: d53cb54f mrs x15, s3_4_c11_c5_2 - 23f4: d51cb56f msr s3_4_c11_c5_3, x15 - 23f8: d53cb56f mrs x15, s3_4_c11_c5_3 - 23fc: d51cb58f msr s3_4_c11_c5_4, x15 - 2400: d53cb58f mrs x15, s3_4_c11_c5_4 - 2404: d51cb5af msr s3_4_c11_c5_5, x15 - 2408: d53cb5af mrs x15, s3_4_c11_c5_5 - 240c: d51cb5cf msr s3_4_c11_c5_6, x15 - 2410: d53cb5cf mrs x15, s3_4_c11_c5_6 - 2414: d51cb5ef msr s3_4_c11_c5_7, x15 - 2418: d53cb5ef mrs x15, s3_4_c11_c5_7 - 241c: d51cb60f msr s3_4_c11_c6_0, x15 - 2420: d53cb60f mrs x15, s3_4_c11_c6_0 - 2424: d51cb62f msr s3_4_c11_c6_1, x15 - 2428: d53cb62f mrs x15, s3_4_c11_c6_1 - 242c: d51cb64f msr s3_4_c11_c6_2, x15 - 2430: d53cb64f mrs x15, s3_4_c11_c6_2 - 2434: d51cb66f msr s3_4_c11_c6_3, x15 - 2438: d53cb66f mrs x15, s3_4_c11_c6_3 - 243c: d51cb68f msr s3_4_c11_c6_4, x15 - 2440: d53cb68f mrs x15, s3_4_c11_c6_4 - 2444: d51cb6af msr s3_4_c11_c6_5, x15 - 2448: d53cb6af mrs x15, s3_4_c11_c6_5 - 244c: d51cb6cf msr s3_4_c11_c6_6, x15 - 2450: d53cb6cf mrs x15, s3_4_c11_c6_6 - 2454: d51cb6ef msr s3_4_c11_c6_7, x15 - 2458: d53cb6ef mrs x15, s3_4_c11_c6_7 - 245c: d51cb70f msr s3_4_c11_c7_0, x15 - 2460: d53cb70f mrs x15, s3_4_c11_c7_0 - 2464: d51cb72f msr s3_4_c11_c7_1, x15 - 2468: d53cb72f mrs x15, s3_4_c11_c7_1 - 246c: d51cb74f msr s3_4_c11_c7_2, x15 - 2470: d53cb74f mrs x15, s3_4_c11_c7_2 - 2474: d51cb76f msr s3_4_c11_c7_3, x15 - 2478: d53cb76f mrs x15, s3_4_c11_c7_3 - 247c: d51cb78f msr s3_4_c11_c7_4, x15 - 2480: d53cb78f mrs x15, s3_4_c11_c7_4 - 2484: d51cb7af msr s3_4_c11_c7_5, x15 - 2488: d53cb7af mrs x15, s3_4_c11_c7_5 - 248c: d51cb7cf msr s3_4_c11_c7_6, x15 - 2490: d53cb7cf mrs x15, s3_4_c11_c7_6 - 2494: d51cb7ef msr s3_4_c11_c7_7, x15 - 2498: d53cb7ef mrs x15, s3_4_c11_c7_7 - 249c: d51cb80f msr s3_4_c11_c8_0, x15 - 24a0: d53cb80f mrs x15, s3_4_c11_c8_0 - 24a4: d51cb82f msr s3_4_c11_c8_1, x15 - 24a8: d53cb82f mrs x15, s3_4_c11_c8_1 - 24ac: d51cb84f msr s3_4_c11_c8_2, x15 - 24b0: d53cb84f mrs x15, s3_4_c11_c8_2 - 24b4: d51cb86f msr s3_4_c11_c8_3, x15 - 24b8: d53cb86f mrs x15, s3_4_c11_c8_3 - 24bc: d51cb88f msr s3_4_c11_c8_4, x15 - 24c0: d53cb88f mrs x15, s3_4_c11_c8_4 - 24c4: d51cb8af msr s3_4_c11_c8_5, x15 - 24c8: d53cb8af mrs x15, s3_4_c11_c8_5 - 24cc: d51cb8cf msr s3_4_c11_c8_6, x15 - 24d0: d53cb8cf mrs x15, s3_4_c11_c8_6 - 24d4: d51cb8ef msr s3_4_c11_c8_7, x15 - 24d8: d53cb8ef mrs x15, s3_4_c11_c8_7 - 24dc: d51cb90f msr s3_4_c11_c9_0, x15 - 24e0: d53cb90f mrs x15, s3_4_c11_c9_0 - 24e4: d51cb92f msr s3_4_c11_c9_1, x15 - 24e8: d53cb92f mrs x15, s3_4_c11_c9_1 - 24ec: d51cb94f msr s3_4_c11_c9_2, x15 - 24f0: d53cb94f mrs x15, s3_4_c11_c9_2 - 24f4: d51cb96f msr s3_4_c11_c9_3, x15 - 24f8: d53cb96f mrs x15, s3_4_c11_c9_3 - 24fc: d51cb98f msr s3_4_c11_c9_4, x15 - 2500: d53cb98f mrs x15, s3_4_c11_c9_4 - 2504: d51cb9af msr s3_4_c11_c9_5, x15 - 2508: d53cb9af mrs x15, s3_4_c11_c9_5 - 250c: d51cb9cf msr s3_4_c11_c9_6, x15 - 2510: d53cb9cf mrs x15, s3_4_c11_c9_6 - 2514: d51cb9ef msr s3_4_c11_c9_7, x15 - 2518: d53cb9ef mrs x15, s3_4_c11_c9_7 - 251c: d51cba0f msr s3_4_c11_c10_0, x15 - 2520: d53cba0f mrs x15, s3_4_c11_c10_0 - 2524: d51cba2f msr s3_4_c11_c10_1, x15 - 2528: d53cba2f mrs x15, s3_4_c11_c10_1 - 252c: d51cba4f msr s3_4_c11_c10_2, x15 - 2530: d53cba4f mrs x15, s3_4_c11_c10_2 - 2534: d51cba6f msr s3_4_c11_c10_3, x15 - 2538: d53cba6f mrs x15, s3_4_c11_c10_3 - 253c: d51cba8f msr s3_4_c11_c10_4, x15 - 2540: d53cba8f mrs x15, s3_4_c11_c10_4 - 2544: d51cbaaf msr s3_4_c11_c10_5, x15 - 2548: d53cbaaf mrs x15, s3_4_c11_c10_5 - 254c: d51cbacf msr s3_4_c11_c10_6, x15 - 2550: d53cbacf mrs x15, s3_4_c11_c10_6 - 2554: d51cbaef msr s3_4_c11_c10_7, x15 - 2558: d53cbaef mrs x15, s3_4_c11_c10_7 - 255c: d51cbb0f msr s3_4_c11_c11_0, x15 - 2560: d53cbb0f mrs x15, s3_4_c11_c11_0 - 2564: d51cbb2f msr s3_4_c11_c11_1, x15 - 2568: d53cbb2f mrs x15, s3_4_c11_c11_1 - 256c: d51cbb4f msr s3_4_c11_c11_2, x15 - 2570: d53cbb4f mrs x15, s3_4_c11_c11_2 - 2574: d51cbb6f msr s3_4_c11_c11_3, x15 - 2578: d53cbb6f mrs x15, s3_4_c11_c11_3 - 257c: d51cbb8f msr s3_4_c11_c11_4, x15 - 2580: d53cbb8f mrs x15, s3_4_c11_c11_4 - 2584: d51cbbaf msr s3_4_c11_c11_5, x15 - 2588: d53cbbaf mrs x15, s3_4_c11_c11_5 - 258c: d51cbbcf msr s3_4_c11_c11_6, x15 - 2590: d53cbbcf mrs x15, s3_4_c11_c11_6 - 2594: d51cbbef msr s3_4_c11_c11_7, x15 - 2598: d53cbbef mrs x15, s3_4_c11_c11_7 - 259c: d51cbc0f msr s3_4_c11_c12_0, x15 - 25a0: d53cbc0f mrs x15, s3_4_c11_c12_0 - 25a4: d51cbc2f msr s3_4_c11_c12_1, x15 - 25a8: d53cbc2f mrs x15, s3_4_c11_c12_1 - 25ac: d51cbc4f msr s3_4_c11_c12_2, x15 - 25b0: d53cbc4f mrs x15, s3_4_c11_c12_2 - 25b4: d51cbc6f msr s3_4_c11_c12_3, x15 - 25b8: d53cbc6f mrs x15, s3_4_c11_c12_3 - 25bc: d51cbc8f msr s3_4_c11_c12_4, x15 - 25c0: d53cbc8f mrs x15, s3_4_c11_c12_4 - 25c4: d51cbcaf msr s3_4_c11_c12_5, x15 - 25c8: d53cbcaf mrs x15, s3_4_c11_c12_5 - 25cc: d51cbccf msr s3_4_c11_c12_6, x15 - 25d0: d53cbccf mrs x15, s3_4_c11_c12_6 - 25d4: d51cbcef msr s3_4_c11_c12_7, x15 - 25d8: d53cbcef mrs x15, s3_4_c11_c12_7 - 25dc: d51cbd0f msr s3_4_c11_c13_0, x15 - 25e0: d53cbd0f mrs x15, s3_4_c11_c13_0 - 25e4: d51cbd2f msr s3_4_c11_c13_1, x15 - 25e8: d53cbd2f mrs x15, s3_4_c11_c13_1 - 25ec: d51cbd4f msr s3_4_c11_c13_2, x15 - 25f0: d53cbd4f mrs x15, s3_4_c11_c13_2 - 25f4: d51cbd6f msr s3_4_c11_c13_3, x15 - 25f8: d53cbd6f mrs x15, s3_4_c11_c13_3 - 25fc: d51cbd8f msr s3_4_c11_c13_4, x15 - 2600: d53cbd8f mrs x15, s3_4_c11_c13_4 - 2604: d51cbdaf msr s3_4_c11_c13_5, x15 - 2608: d53cbdaf mrs x15, s3_4_c11_c13_5 - 260c: d51cbdcf msr s3_4_c11_c13_6, x15 - 2610: d53cbdcf mrs x15, s3_4_c11_c13_6 - 2614: d51cbdef msr s3_4_c11_c13_7, x15 - 2618: d53cbdef mrs x15, s3_4_c11_c13_7 - 261c: d51cbe0f msr s3_4_c11_c14_0, x15 - 2620: d53cbe0f mrs x15, s3_4_c11_c14_0 - 2624: d51cbe2f msr s3_4_c11_c14_1, x15 - 2628: d53cbe2f mrs x15, s3_4_c11_c14_1 - 262c: d51cbe4f msr s3_4_c11_c14_2, x15 - 2630: d53cbe4f mrs x15, s3_4_c11_c14_2 - 2634: d51cbe6f msr s3_4_c11_c14_3, x15 - 2638: d53cbe6f mrs x15, s3_4_c11_c14_3 - 263c: d51cbe8f msr s3_4_c11_c14_4, x15 - 2640: d53cbe8f mrs x15, s3_4_c11_c14_4 - 2644: d51cbeaf msr s3_4_c11_c14_5, x15 - 2648: d53cbeaf mrs x15, s3_4_c11_c14_5 - 264c: d51cbecf msr s3_4_c11_c14_6, x15 - 2650: d53cbecf mrs x15, s3_4_c11_c14_6 - 2654: d51cbeef msr s3_4_c11_c14_7, x15 - 2658: d53cbeef mrs x15, s3_4_c11_c14_7 - 265c: d51cbf0f msr s3_4_c11_c15_0, x15 - 2660: d53cbf0f mrs x15, s3_4_c11_c15_0 - 2664: d51cbf2f msr s3_4_c11_c15_1, x15 - 2668: d53cbf2f mrs x15, s3_4_c11_c15_1 - 266c: d51cbf4f msr s3_4_c11_c15_2, x15 - 2670: d53cbf4f mrs x15, s3_4_c11_c15_2 - 2674: d51cbf6f msr s3_4_c11_c15_3, x15 - 2678: d53cbf6f mrs x15, s3_4_c11_c15_3 - 267c: d51cbf8f msr s3_4_c11_c15_4, x15 - 2680: d53cbf8f mrs x15, s3_4_c11_c15_4 - 2684: d51cbfaf msr s3_4_c11_c15_5, x15 - 2688: d53cbfaf mrs x15, s3_4_c11_c15_5 - 268c: d51cbfcf msr s3_4_c11_c15_6, x15 - 2690: d53cbfcf mrs x15, s3_4_c11_c15_6 - 2694: d51cbfef msr s3_4_c11_c15_7, x15 - 2698: d53cbfef mrs x15, s3_4_c11_c15_7 - 269c: d51cf00f msr s3_4_c15_c0_0, x15 - 26a0: d53cf00f mrs x15, s3_4_c15_c0_0 - 26a4: d51cf02f msr s3_4_c15_c0_1, x15 - 26a8: d53cf02f mrs x15, s3_4_c15_c0_1 - 26ac: d51cf04f msr s3_4_c15_c0_2, x15 - 26b0: d53cf04f mrs x15, s3_4_c15_c0_2 - 26b4: d51cf06f msr s3_4_c15_c0_3, x15 - 26b8: d53cf06f mrs x15, s3_4_c15_c0_3 - 26bc: d51cf08f msr s3_4_c15_c0_4, x15 - 26c0: d53cf08f mrs x15, s3_4_c15_c0_4 - 26c4: d51cf0af msr s3_4_c15_c0_5, x15 - 26c8: d53cf0af mrs x15, s3_4_c15_c0_5 - 26cc: d51cf0cf msr s3_4_c15_c0_6, x15 - 26d0: d53cf0cf mrs x15, s3_4_c15_c0_6 - 26d4: d51cf0ef msr s3_4_c15_c0_7, x15 - 26d8: d53cf0ef mrs x15, s3_4_c15_c0_7 - 26dc: d51cf10f msr s3_4_c15_c1_0, x15 - 26e0: d53cf10f mrs x15, s3_4_c15_c1_0 - 26e4: d51cf12f msr s3_4_c15_c1_1, x15 - 26e8: d53cf12f mrs x15, s3_4_c15_c1_1 - 26ec: d51cf14f msr s3_4_c15_c1_2, x15 - 26f0: d53cf14f mrs x15, s3_4_c15_c1_2 - 26f4: d51cf16f msr s3_4_c15_c1_3, x15 - 26f8: d53cf16f mrs x15, s3_4_c15_c1_3 - 26fc: d51cf18f msr s3_4_c15_c1_4, x15 - 2700: d53cf18f mrs x15, s3_4_c15_c1_4 - 2704: d51cf1af msr s3_4_c15_c1_5, x15 - 2708: d53cf1af mrs x15, s3_4_c15_c1_5 - 270c: d51cf1cf msr s3_4_c15_c1_6, x15 - 2710: d53cf1cf mrs x15, s3_4_c15_c1_6 - 2714: d51cf1ef msr s3_4_c15_c1_7, x15 - 2718: d53cf1ef mrs x15, s3_4_c15_c1_7 - 271c: d51cf20f msr s3_4_c15_c2_0, x15 - 2720: d53cf20f mrs x15, s3_4_c15_c2_0 - 2724: d51cf22f msr s3_4_c15_c2_1, x15 - 2728: d53cf22f mrs x15, s3_4_c15_c2_1 - 272c: d51cf24f msr s3_4_c15_c2_2, x15 - 2730: d53cf24f mrs x15, s3_4_c15_c2_2 - 2734: d51cf26f msr s3_4_c15_c2_3, x15 - 2738: d53cf26f mrs x15, s3_4_c15_c2_3 - 273c: d51cf28f msr s3_4_c15_c2_4, x15 - 2740: d53cf28f mrs x15, s3_4_c15_c2_4 - 2744: d51cf2af msr s3_4_c15_c2_5, x15 - 2748: d53cf2af mrs x15, s3_4_c15_c2_5 - 274c: d51cf2cf msr s3_4_c15_c2_6, x15 - 2750: d53cf2cf mrs x15, s3_4_c15_c2_6 - 2754: d51cf2ef msr s3_4_c15_c2_7, x15 - 2758: d53cf2ef mrs x15, s3_4_c15_c2_7 - 275c: d51cf30f msr s3_4_c15_c3_0, x15 - 2760: d53cf30f mrs x15, s3_4_c15_c3_0 - 2764: d51cf32f msr s3_4_c15_c3_1, x15 - 2768: d53cf32f mrs x15, s3_4_c15_c3_1 - 276c: d51cf34f msr s3_4_c15_c3_2, x15 - 2770: d53cf34f mrs x15, s3_4_c15_c3_2 - 2774: d51cf36f msr s3_4_c15_c3_3, x15 - 2778: d53cf36f mrs x15, s3_4_c15_c3_3 - 277c: d51cf38f msr s3_4_c15_c3_4, x15 - 2780: d53cf38f mrs x15, s3_4_c15_c3_4 - 2784: d51cf3af msr s3_4_c15_c3_5, x15 - 2788: d53cf3af mrs x15, s3_4_c15_c3_5 - 278c: d51cf3cf msr s3_4_c15_c3_6, x15 - 2790: d53cf3cf mrs x15, s3_4_c15_c3_6 - 2794: d51cf3ef msr s3_4_c15_c3_7, x15 - 2798: d53cf3ef mrs x15, s3_4_c15_c3_7 - 279c: d51cf40f msr s3_4_c15_c4_0, x15 - 27a0: d53cf40f mrs x15, s3_4_c15_c4_0 - 27a4: d51cf42f msr s3_4_c15_c4_1, x15 - 27a8: d53cf42f mrs x15, s3_4_c15_c4_1 - 27ac: d51cf44f msr s3_4_c15_c4_2, x15 - 27b0: d53cf44f mrs x15, s3_4_c15_c4_2 - 27b4: d51cf46f msr s3_4_c15_c4_3, x15 - 27b8: d53cf46f mrs x15, s3_4_c15_c4_3 - 27bc: d51cf48f msr s3_4_c15_c4_4, x15 - 27c0: d53cf48f mrs x15, s3_4_c15_c4_4 - 27c4: d51cf4af msr s3_4_c15_c4_5, x15 - 27c8: d53cf4af mrs x15, s3_4_c15_c4_5 - 27cc: d51cf4cf msr s3_4_c15_c4_6, x15 - 27d0: d53cf4cf mrs x15, s3_4_c15_c4_6 - 27d4: d51cf4ef msr s3_4_c15_c4_7, x15 - 27d8: d53cf4ef mrs x15, s3_4_c15_c4_7 - 27dc: d51cf50f msr s3_4_c15_c5_0, x15 - 27e0: d53cf50f mrs x15, s3_4_c15_c5_0 - 27e4: d51cf52f msr s3_4_c15_c5_1, x15 - 27e8: d53cf52f mrs x15, s3_4_c15_c5_1 - 27ec: d51cf54f msr s3_4_c15_c5_2, x15 - 27f0: d53cf54f mrs x15, s3_4_c15_c5_2 - 27f4: d51cf56f msr s3_4_c15_c5_3, x15 - 27f8: d53cf56f mrs x15, s3_4_c15_c5_3 - 27fc: d51cf58f msr s3_4_c15_c5_4, x15 - 2800: d53cf58f mrs x15, s3_4_c15_c5_4 - 2804: d51cf5af msr s3_4_c15_c5_5, x15 - 2808: d53cf5af mrs x15, s3_4_c15_c5_5 - 280c: d51cf5cf msr s3_4_c15_c5_6, x15 - 2810: d53cf5cf mrs x15, s3_4_c15_c5_6 - 2814: d51cf5ef msr s3_4_c15_c5_7, x15 - 2818: d53cf5ef mrs x15, s3_4_c15_c5_7 - 281c: d51cf60f msr s3_4_c15_c6_0, x15 - 2820: d53cf60f mrs x15, s3_4_c15_c6_0 - 2824: d51cf62f msr s3_4_c15_c6_1, x15 - 2828: d53cf62f mrs x15, s3_4_c15_c6_1 - 282c: d51cf64f msr s3_4_c15_c6_2, x15 - 2830: d53cf64f mrs x15, s3_4_c15_c6_2 - 2834: d51cf66f msr s3_4_c15_c6_3, x15 - 2838: d53cf66f mrs x15, s3_4_c15_c6_3 - 283c: d51cf68f msr s3_4_c15_c6_4, x15 - 2840: d53cf68f mrs x15, s3_4_c15_c6_4 - 2844: d51cf6af msr s3_4_c15_c6_5, x15 - 2848: d53cf6af mrs x15, s3_4_c15_c6_5 - 284c: d51cf6cf msr s3_4_c15_c6_6, x15 - 2850: d53cf6cf mrs x15, s3_4_c15_c6_6 - 2854: d51cf6ef msr s3_4_c15_c6_7, x15 - 2858: d53cf6ef mrs x15, s3_4_c15_c6_7 - 285c: d51cf70f msr s3_4_c15_c7_0, x15 - 2860: d53cf70f mrs x15, s3_4_c15_c7_0 - 2864: d51cf72f msr s3_4_c15_c7_1, x15 - 2868: d53cf72f mrs x15, s3_4_c15_c7_1 - 286c: d51cf74f msr s3_4_c15_c7_2, x15 - 2870: d53cf74f mrs x15, s3_4_c15_c7_2 - 2874: d51cf76f msr s3_4_c15_c7_3, x15 - 2878: d53cf76f mrs x15, s3_4_c15_c7_3 - 287c: d51cf78f msr s3_4_c15_c7_4, x15 - 2880: d53cf78f mrs x15, s3_4_c15_c7_4 - 2884: d51cf7af msr s3_4_c15_c7_5, x15 - 2888: d53cf7af mrs x15, s3_4_c15_c7_5 - 288c: d51cf7cf msr s3_4_c15_c7_6, x15 - 2890: d53cf7cf mrs x15, s3_4_c15_c7_6 - 2894: d51cf7ef msr s3_4_c15_c7_7, x15 - 2898: d53cf7ef mrs x15, s3_4_c15_c7_7 - 289c: d51cf80f msr s3_4_c15_c8_0, x15 - 28a0: d53cf80f mrs x15, s3_4_c15_c8_0 - 28a4: d51cf82f msr s3_4_c15_c8_1, x15 - 28a8: d53cf82f mrs x15, s3_4_c15_c8_1 - 28ac: d51cf84f msr s3_4_c15_c8_2, x15 - 28b0: d53cf84f mrs x15, s3_4_c15_c8_2 - 28b4: d51cf86f msr s3_4_c15_c8_3, x15 - 28b8: d53cf86f mrs x15, s3_4_c15_c8_3 - 28bc: d51cf88f msr s3_4_c15_c8_4, x15 - 28c0: d53cf88f mrs x15, s3_4_c15_c8_4 - 28c4: d51cf8af msr s3_4_c15_c8_5, x15 - 28c8: d53cf8af mrs x15, s3_4_c15_c8_5 - 28cc: d51cf8cf msr s3_4_c15_c8_6, x15 - 28d0: d53cf8cf mrs x15, s3_4_c15_c8_6 - 28d4: d51cf8ef msr s3_4_c15_c8_7, x15 - 28d8: d53cf8ef mrs x15, s3_4_c15_c8_7 - 28dc: d51cf90f msr s3_4_c15_c9_0, x15 - 28e0: d53cf90f mrs x15, s3_4_c15_c9_0 - 28e4: d51cf92f msr s3_4_c15_c9_1, x15 - 28e8: d53cf92f mrs x15, s3_4_c15_c9_1 - 28ec: d51cf94f msr s3_4_c15_c9_2, x15 - 28f0: d53cf94f mrs x15, s3_4_c15_c9_2 - 28f4: d51cf96f msr s3_4_c15_c9_3, x15 - 28f8: d53cf96f mrs x15, s3_4_c15_c9_3 - 28fc: d51cf98f msr s3_4_c15_c9_4, x15 - 2900: d53cf98f mrs x15, s3_4_c15_c9_4 - 2904: d51cf9af msr s3_4_c15_c9_5, x15 - 2908: d53cf9af mrs x15, s3_4_c15_c9_5 - 290c: d51cf9cf msr s3_4_c15_c9_6, x15 - 2910: d53cf9cf mrs x15, s3_4_c15_c9_6 - 2914: d51cf9ef msr s3_4_c15_c9_7, x15 - 2918: d53cf9ef mrs x15, s3_4_c15_c9_7 - 291c: d51cfa0f msr s3_4_c15_c10_0, x15 - 2920: d53cfa0f mrs x15, s3_4_c15_c10_0 - 2924: d51cfa2f msr s3_4_c15_c10_1, x15 - 2928: d53cfa2f mrs x15, s3_4_c15_c10_1 - 292c: d51cfa4f msr s3_4_c15_c10_2, x15 - 2930: d53cfa4f mrs x15, s3_4_c15_c10_2 - 2934: d51cfa6f msr s3_4_c15_c10_3, x15 - 2938: d53cfa6f mrs x15, s3_4_c15_c10_3 - 293c: d51cfa8f msr s3_4_c15_c10_4, x15 - 2940: d53cfa8f mrs x15, s3_4_c15_c10_4 - 2944: d51cfaaf msr s3_4_c15_c10_5, x15 - 2948: d53cfaaf mrs x15, s3_4_c15_c10_5 - 294c: d51cfacf msr s3_4_c15_c10_6, x15 - 2950: d53cfacf mrs x15, s3_4_c15_c10_6 - 2954: d51cfaef msr s3_4_c15_c10_7, x15 - 2958: d53cfaef mrs x15, s3_4_c15_c10_7 - 295c: d51cfb0f msr s3_4_c15_c11_0, x15 - 2960: d53cfb0f mrs x15, s3_4_c15_c11_0 - 2964: d51cfb2f msr s3_4_c15_c11_1, x15 - 2968: d53cfb2f mrs x15, s3_4_c15_c11_1 - 296c: d51cfb4f msr s3_4_c15_c11_2, x15 - 2970: d53cfb4f mrs x15, s3_4_c15_c11_2 - 2974: d51cfb6f msr s3_4_c15_c11_3, x15 - 2978: d53cfb6f mrs x15, s3_4_c15_c11_3 - 297c: d51cfb8f msr s3_4_c15_c11_4, x15 - 2980: d53cfb8f mrs x15, s3_4_c15_c11_4 - 2984: d51cfbaf msr s3_4_c15_c11_5, x15 - 2988: d53cfbaf mrs x15, s3_4_c15_c11_5 - 298c: d51cfbcf msr s3_4_c15_c11_6, x15 - 2990: d53cfbcf mrs x15, s3_4_c15_c11_6 - 2994: d51cfbef msr s3_4_c15_c11_7, x15 - 2998: d53cfbef mrs x15, s3_4_c15_c11_7 - 299c: d51cfc0f msr s3_4_c15_c12_0, x15 - 29a0: d53cfc0f mrs x15, s3_4_c15_c12_0 - 29a4: d51cfc2f msr s3_4_c15_c12_1, x15 - 29a8: d53cfc2f mrs x15, s3_4_c15_c12_1 - 29ac: d51cfc4f msr s3_4_c15_c12_2, x15 - 29b0: d53cfc4f mrs x15, s3_4_c15_c12_2 - 29b4: d51cfc6f msr s3_4_c15_c12_3, x15 - 29b8: d53cfc6f mrs x15, s3_4_c15_c12_3 - 29bc: d51cfc8f msr s3_4_c15_c12_4, x15 - 29c0: d53cfc8f mrs x15, s3_4_c15_c12_4 - 29c4: d51cfcaf msr s3_4_c15_c12_5, x15 - 29c8: d53cfcaf mrs x15, s3_4_c15_c12_5 - 29cc: d51cfccf msr s3_4_c15_c12_6, x15 - 29d0: d53cfccf mrs x15, s3_4_c15_c12_6 - 29d4: d51cfcef msr s3_4_c15_c12_7, x15 - 29d8: d53cfcef mrs x15, s3_4_c15_c12_7 - 29dc: d51cfd0f msr s3_4_c15_c13_0, x15 - 29e0: d53cfd0f mrs x15, s3_4_c15_c13_0 - 29e4: d51cfd2f msr s3_4_c15_c13_1, x15 - 29e8: d53cfd2f mrs x15, s3_4_c15_c13_1 - 29ec: d51cfd4f msr s3_4_c15_c13_2, x15 - 29f0: d53cfd4f mrs x15, s3_4_c15_c13_2 - 29f4: d51cfd6f msr s3_4_c15_c13_3, x15 - 29f8: d53cfd6f mrs x15, s3_4_c15_c13_3 - 29fc: d51cfd8f msr s3_4_c15_c13_4, x15 - 2a00: d53cfd8f mrs x15, s3_4_c15_c13_4 - 2a04: d51cfdaf msr s3_4_c15_c13_5, x15 - 2a08: d53cfdaf mrs x15, s3_4_c15_c13_5 - 2a0c: d51cfdcf msr s3_4_c15_c13_6, x15 - 2a10: d53cfdcf mrs x15, s3_4_c15_c13_6 - 2a14: d51cfdef msr s3_4_c15_c13_7, x15 - 2a18: d53cfdef mrs x15, s3_4_c15_c13_7 - 2a1c: d51cfe0f msr s3_4_c15_c14_0, x15 - 2a20: d53cfe0f mrs x15, s3_4_c15_c14_0 - 2a24: d51cfe2f msr s3_4_c15_c14_1, x15 - 2a28: d53cfe2f mrs x15, s3_4_c15_c14_1 - 2a2c: d51cfe4f msr s3_4_c15_c14_2, x15 - 2a30: d53cfe4f mrs x15, s3_4_c15_c14_2 - 2a34: d51cfe6f msr s3_4_c15_c14_3, x15 - 2a38: d53cfe6f mrs x15, s3_4_c15_c14_3 - 2a3c: d51cfe8f msr s3_4_c15_c14_4, x15 - 2a40: d53cfe8f mrs x15, s3_4_c15_c14_4 - 2a44: d51cfeaf msr s3_4_c15_c14_5, x15 - 2a48: d53cfeaf mrs x15, s3_4_c15_c14_5 - 2a4c: d51cfecf msr s3_4_c15_c14_6, x15 - 2a50: d53cfecf mrs x15, s3_4_c15_c14_6 - 2a54: d51cfeef msr s3_4_c15_c14_7, x15 - 2a58: d53cfeef mrs x15, s3_4_c15_c14_7 - 2a5c: d51cff0f msr s3_4_c15_c15_0, x15 - 2a60: d53cff0f mrs x15, s3_4_c15_c15_0 - 2a64: d51cff2f msr s3_4_c15_c15_1, x15 - 2a68: d53cff2f mrs x15, s3_4_c15_c15_1 - 2a6c: d51cff4f msr s3_4_c15_c15_2, x15 - 2a70: d53cff4f mrs x15, s3_4_c15_c15_2 - 2a74: d51cff6f msr s3_4_c15_c15_3, x15 - 2a78: d53cff6f mrs x15, s3_4_c15_c15_3 - 2a7c: d51cff8f msr s3_4_c15_c15_4, x15 - 2a80: d53cff8f mrs x15, s3_4_c15_c15_4 - 2a84: d51cffaf msr s3_4_c15_c15_5, x15 - 2a88: d53cffaf mrs x15, s3_4_c15_c15_5 - 2a8c: d51cffcf msr s3_4_c15_c15_6, x15 - 2a90: d53cffcf mrs x15, s3_4_c15_c15_6 - 2a94: d51cffef msr s3_4_c15_c15_7, x15 - 2a98: d53cffef mrs x15, s3_4_c15_c15_7 - 2a9c: d51db00f msr s3_5_c11_c0_0, x15 - 2aa0: d53db00f mrs x15, s3_5_c11_c0_0 - 2aa4: d51db02f msr s3_5_c11_c0_1, x15 - 2aa8: d53db02f mrs x15, s3_5_c11_c0_1 - 2aac: d51db04f msr s3_5_c11_c0_2, x15 - 2ab0: d53db04f mrs x15, s3_5_c11_c0_2 - 2ab4: d51db06f msr s3_5_c11_c0_3, x15 - 2ab8: d53db06f mrs x15, s3_5_c11_c0_3 - 2abc: d51db08f msr s3_5_c11_c0_4, x15 - 2ac0: d53db08f mrs x15, s3_5_c11_c0_4 - 2ac4: d51db0af msr s3_5_c11_c0_5, x15 - 2ac8: d53db0af mrs x15, s3_5_c11_c0_5 - 2acc: d51db0cf msr s3_5_c11_c0_6, x15 - 2ad0: d53db0cf mrs x15, s3_5_c11_c0_6 - 2ad4: d51db0ef msr s3_5_c11_c0_7, x15 - 2ad8: d53db0ef mrs x15, s3_5_c11_c0_7 - 2adc: d51db10f msr s3_5_c11_c1_0, x15 - 2ae0: d53db10f mrs x15, s3_5_c11_c1_0 - 2ae4: d51db12f msr s3_5_c11_c1_1, x15 - 2ae8: d53db12f mrs x15, s3_5_c11_c1_1 - 2aec: d51db14f msr s3_5_c11_c1_2, x15 - 2af0: d53db14f mrs x15, s3_5_c11_c1_2 - 2af4: d51db16f msr s3_5_c11_c1_3, x15 - 2af8: d53db16f mrs x15, s3_5_c11_c1_3 - 2afc: d51db18f msr s3_5_c11_c1_4, x15 - 2b00: d53db18f mrs x15, s3_5_c11_c1_4 - 2b04: d51db1af msr s3_5_c11_c1_5, x15 - 2b08: d53db1af mrs x15, s3_5_c11_c1_5 - 2b0c: d51db1cf msr s3_5_c11_c1_6, x15 - 2b10: d53db1cf mrs x15, s3_5_c11_c1_6 - 2b14: d51db1ef msr s3_5_c11_c1_7, x15 - 2b18: d53db1ef mrs x15, s3_5_c11_c1_7 - 2b1c: d51db20f msr s3_5_c11_c2_0, x15 - 2b20: d53db20f mrs x15, s3_5_c11_c2_0 - 2b24: d51db22f msr s3_5_c11_c2_1, x15 - 2b28: d53db22f mrs x15, s3_5_c11_c2_1 - 2b2c: d51db24f msr s3_5_c11_c2_2, x15 - 2b30: d53db24f mrs x15, s3_5_c11_c2_2 - 2b34: d51db26f msr s3_5_c11_c2_3, x15 - 2b38: d53db26f mrs x15, s3_5_c11_c2_3 - 2b3c: d51db28f msr s3_5_c11_c2_4, x15 - 2b40: d53db28f mrs x15, s3_5_c11_c2_4 - 2b44: d51db2af msr s3_5_c11_c2_5, x15 - 2b48: d53db2af mrs x15, s3_5_c11_c2_5 - 2b4c: d51db2cf msr s3_5_c11_c2_6, x15 - 2b50: d53db2cf mrs x15, s3_5_c11_c2_6 - 2b54: d51db2ef msr s3_5_c11_c2_7, x15 - 2b58: d53db2ef mrs x15, s3_5_c11_c2_7 - 2b5c: d51db30f msr s3_5_c11_c3_0, x15 - 2b60: d53db30f mrs x15, s3_5_c11_c3_0 - 2b64: d51db32f msr s3_5_c11_c3_1, x15 - 2b68: d53db32f mrs x15, s3_5_c11_c3_1 - 2b6c: d51db34f msr s3_5_c11_c3_2, x15 - 2b70: d53db34f mrs x15, s3_5_c11_c3_2 - 2b74: d51db36f msr s3_5_c11_c3_3, x15 - 2b78: d53db36f mrs x15, s3_5_c11_c3_3 - 2b7c: d51db38f msr s3_5_c11_c3_4, x15 - 2b80: d53db38f mrs x15, s3_5_c11_c3_4 - 2b84: d51db3af msr s3_5_c11_c3_5, x15 - 2b88: d53db3af mrs x15, s3_5_c11_c3_5 - 2b8c: d51db3cf msr s3_5_c11_c3_6, x15 - 2b90: d53db3cf mrs x15, s3_5_c11_c3_6 - 2b94: d51db3ef msr s3_5_c11_c3_7, x15 - 2b98: d53db3ef mrs x15, s3_5_c11_c3_7 - 2b9c: d51db40f msr s3_5_c11_c4_0, x15 - 2ba0: d53db40f mrs x15, s3_5_c11_c4_0 - 2ba4: d51db42f msr s3_5_c11_c4_1, x15 - 2ba8: d53db42f mrs x15, s3_5_c11_c4_1 - 2bac: d51db44f msr s3_5_c11_c4_2, x15 - 2bb0: d53db44f mrs x15, s3_5_c11_c4_2 - 2bb4: d51db46f msr s3_5_c11_c4_3, x15 - 2bb8: d53db46f mrs x15, s3_5_c11_c4_3 - 2bbc: d51db48f msr s3_5_c11_c4_4, x15 - 2bc0: d53db48f mrs x15, s3_5_c11_c4_4 - 2bc4: d51db4af msr s3_5_c11_c4_5, x15 - 2bc8: d53db4af mrs x15, s3_5_c11_c4_5 - 2bcc: d51db4cf msr s3_5_c11_c4_6, x15 - 2bd0: d53db4cf mrs x15, s3_5_c11_c4_6 - 2bd4: d51db4ef msr s3_5_c11_c4_7, x15 - 2bd8: d53db4ef mrs x15, s3_5_c11_c4_7 - 2bdc: d51db50f msr s3_5_c11_c5_0, x15 - 2be0: d53db50f mrs x15, s3_5_c11_c5_0 - 2be4: d51db52f msr s3_5_c11_c5_1, x15 - 2be8: d53db52f mrs x15, s3_5_c11_c5_1 - 2bec: d51db54f msr s3_5_c11_c5_2, x15 - 2bf0: d53db54f mrs x15, s3_5_c11_c5_2 - 2bf4: d51db56f msr s3_5_c11_c5_3, x15 - 2bf8: d53db56f mrs x15, s3_5_c11_c5_3 - 2bfc: d51db58f msr s3_5_c11_c5_4, x15 - 2c00: d53db58f mrs x15, s3_5_c11_c5_4 - 2c04: d51db5af msr s3_5_c11_c5_5, x15 - 2c08: d53db5af mrs x15, s3_5_c11_c5_5 - 2c0c: d51db5cf msr s3_5_c11_c5_6, x15 - 2c10: d53db5cf mrs x15, s3_5_c11_c5_6 - 2c14: d51db5ef msr s3_5_c11_c5_7, x15 - 2c18: d53db5ef mrs x15, s3_5_c11_c5_7 - 2c1c: d51db60f msr s3_5_c11_c6_0, x15 - 2c20: d53db60f mrs x15, s3_5_c11_c6_0 - 2c24: d51db62f msr s3_5_c11_c6_1, x15 - 2c28: d53db62f mrs x15, s3_5_c11_c6_1 - 2c2c: d51db64f msr s3_5_c11_c6_2, x15 - 2c30: d53db64f mrs x15, s3_5_c11_c6_2 - 2c34: d51db66f msr s3_5_c11_c6_3, x15 - 2c38: d53db66f mrs x15, s3_5_c11_c6_3 - 2c3c: d51db68f msr s3_5_c11_c6_4, x15 - 2c40: d53db68f mrs x15, s3_5_c11_c6_4 - 2c44: d51db6af msr s3_5_c11_c6_5, x15 - 2c48: d53db6af mrs x15, s3_5_c11_c6_5 - 2c4c: d51db6cf msr s3_5_c11_c6_6, x15 - 2c50: d53db6cf mrs x15, s3_5_c11_c6_6 - 2c54: d51db6ef msr s3_5_c11_c6_7, x15 - 2c58: d53db6ef mrs x15, s3_5_c11_c6_7 - 2c5c: d51db70f msr s3_5_c11_c7_0, x15 - 2c60: d53db70f mrs x15, s3_5_c11_c7_0 - 2c64: d51db72f msr s3_5_c11_c7_1, x15 - 2c68: d53db72f mrs x15, s3_5_c11_c7_1 - 2c6c: d51db74f msr s3_5_c11_c7_2, x15 - 2c70: d53db74f mrs x15, s3_5_c11_c7_2 - 2c74: d51db76f msr s3_5_c11_c7_3, x15 - 2c78: d53db76f mrs x15, s3_5_c11_c7_3 - 2c7c: d51db78f msr s3_5_c11_c7_4, x15 - 2c80: d53db78f mrs x15, s3_5_c11_c7_4 - 2c84: d51db7af msr s3_5_c11_c7_5, x15 - 2c88: d53db7af mrs x15, s3_5_c11_c7_5 - 2c8c: d51db7cf msr s3_5_c11_c7_6, x15 - 2c90: d53db7cf mrs x15, s3_5_c11_c7_6 - 2c94: d51db7ef msr s3_5_c11_c7_7, x15 - 2c98: d53db7ef mrs x15, s3_5_c11_c7_7 - 2c9c: d51db80f msr s3_5_c11_c8_0, x15 - 2ca0: d53db80f mrs x15, s3_5_c11_c8_0 - 2ca4: d51db82f msr s3_5_c11_c8_1, x15 - 2ca8: d53db82f mrs x15, s3_5_c11_c8_1 - 2cac: d51db84f msr s3_5_c11_c8_2, x15 - 2cb0: d53db84f mrs x15, s3_5_c11_c8_2 - 2cb4: d51db86f msr s3_5_c11_c8_3, x15 - 2cb8: d53db86f mrs x15, s3_5_c11_c8_3 - 2cbc: d51db88f msr s3_5_c11_c8_4, x15 - 2cc0: d53db88f mrs x15, s3_5_c11_c8_4 - 2cc4: d51db8af msr s3_5_c11_c8_5, x15 - 2cc8: d53db8af mrs x15, s3_5_c11_c8_5 - 2ccc: d51db8cf msr s3_5_c11_c8_6, x15 - 2cd0: d53db8cf mrs x15, s3_5_c11_c8_6 - 2cd4: d51db8ef msr s3_5_c11_c8_7, x15 - 2cd8: d53db8ef mrs x15, s3_5_c11_c8_7 - 2cdc: d51db90f msr s3_5_c11_c9_0, x15 - 2ce0: d53db90f mrs x15, s3_5_c11_c9_0 - 2ce4: d51db92f msr s3_5_c11_c9_1, x15 - 2ce8: d53db92f mrs x15, s3_5_c11_c9_1 - 2cec: d51db94f msr s3_5_c11_c9_2, x15 - 2cf0: d53db94f mrs x15, s3_5_c11_c9_2 - 2cf4: d51db96f msr s3_5_c11_c9_3, x15 - 2cf8: d53db96f mrs x15, s3_5_c11_c9_3 - 2cfc: d51db98f msr s3_5_c11_c9_4, x15 - 2d00: d53db98f mrs x15, s3_5_c11_c9_4 - 2d04: d51db9af msr s3_5_c11_c9_5, x15 - 2d08: d53db9af mrs x15, s3_5_c11_c9_5 - 2d0c: d51db9cf msr s3_5_c11_c9_6, x15 - 2d10: d53db9cf mrs x15, s3_5_c11_c9_6 - 2d14: d51db9ef msr s3_5_c11_c9_7, x15 - 2d18: d53db9ef mrs x15, s3_5_c11_c9_7 - 2d1c: d51dba0f msr s3_5_c11_c10_0, x15 - 2d20: d53dba0f mrs x15, s3_5_c11_c10_0 - 2d24: d51dba2f msr s3_5_c11_c10_1, x15 - 2d28: d53dba2f mrs x15, s3_5_c11_c10_1 - 2d2c: d51dba4f msr s3_5_c11_c10_2, x15 - 2d30: d53dba4f mrs x15, s3_5_c11_c10_2 - 2d34: d51dba6f msr s3_5_c11_c10_3, x15 - 2d38: d53dba6f mrs x15, s3_5_c11_c10_3 - 2d3c: d51dba8f msr s3_5_c11_c10_4, x15 - 2d40: d53dba8f mrs x15, s3_5_c11_c10_4 - 2d44: d51dbaaf msr s3_5_c11_c10_5, x15 - 2d48: d53dbaaf mrs x15, s3_5_c11_c10_5 - 2d4c: d51dbacf msr s3_5_c11_c10_6, x15 - 2d50: d53dbacf mrs x15, s3_5_c11_c10_6 - 2d54: d51dbaef msr s3_5_c11_c10_7, x15 - 2d58: d53dbaef mrs x15, s3_5_c11_c10_7 - 2d5c: d51dbb0f msr s3_5_c11_c11_0, x15 - 2d60: d53dbb0f mrs x15, s3_5_c11_c11_0 - 2d64: d51dbb2f msr s3_5_c11_c11_1, x15 - 2d68: d53dbb2f mrs x15, s3_5_c11_c11_1 - 2d6c: d51dbb4f msr s3_5_c11_c11_2, x15 - 2d70: d53dbb4f mrs x15, s3_5_c11_c11_2 - 2d74: d51dbb6f msr s3_5_c11_c11_3, x15 - 2d78: d53dbb6f mrs x15, s3_5_c11_c11_3 - 2d7c: d51dbb8f msr s3_5_c11_c11_4, x15 - 2d80: d53dbb8f mrs x15, s3_5_c11_c11_4 - 2d84: d51dbbaf msr s3_5_c11_c11_5, x15 - 2d88: d53dbbaf mrs x15, s3_5_c11_c11_5 - 2d8c: d51dbbcf msr s3_5_c11_c11_6, x15 - 2d90: d53dbbcf mrs x15, s3_5_c11_c11_6 - 2d94: d51dbbef msr s3_5_c11_c11_7, x15 - 2d98: d53dbbef mrs x15, s3_5_c11_c11_7 - 2d9c: d51dbc0f msr s3_5_c11_c12_0, x15 - 2da0: d53dbc0f mrs x15, s3_5_c11_c12_0 - 2da4: d51dbc2f msr s3_5_c11_c12_1, x15 - 2da8: d53dbc2f mrs x15, s3_5_c11_c12_1 - 2dac: d51dbc4f msr s3_5_c11_c12_2, x15 - 2db0: d53dbc4f mrs x15, s3_5_c11_c12_2 - 2db4: d51dbc6f msr s3_5_c11_c12_3, x15 - 2db8: d53dbc6f mrs x15, s3_5_c11_c12_3 - 2dbc: d51dbc8f msr s3_5_c11_c12_4, x15 - 2dc0: d53dbc8f mrs x15, s3_5_c11_c12_4 - 2dc4: d51dbcaf msr s3_5_c11_c12_5, x15 - 2dc8: d53dbcaf mrs x15, s3_5_c11_c12_5 - 2dcc: d51dbccf msr s3_5_c11_c12_6, x15 - 2dd0: d53dbccf mrs x15, s3_5_c11_c12_6 - 2dd4: d51dbcef msr s3_5_c11_c12_7, x15 - 2dd8: d53dbcef mrs x15, s3_5_c11_c12_7 - 2ddc: d51dbd0f msr s3_5_c11_c13_0, x15 - 2de0: d53dbd0f mrs x15, s3_5_c11_c13_0 - 2de4: d51dbd2f msr s3_5_c11_c13_1, x15 - 2de8: d53dbd2f mrs x15, s3_5_c11_c13_1 - 2dec: d51dbd4f msr s3_5_c11_c13_2, x15 - 2df0: d53dbd4f mrs x15, s3_5_c11_c13_2 - 2df4: d51dbd6f msr s3_5_c11_c13_3, x15 - 2df8: d53dbd6f mrs x15, s3_5_c11_c13_3 - 2dfc: d51dbd8f msr s3_5_c11_c13_4, x15 - 2e00: d53dbd8f mrs x15, s3_5_c11_c13_4 - 2e04: d51dbdaf msr s3_5_c11_c13_5, x15 - 2e08: d53dbdaf mrs x15, s3_5_c11_c13_5 - 2e0c: d51dbdcf msr s3_5_c11_c13_6, x15 - 2e10: d53dbdcf mrs x15, s3_5_c11_c13_6 - 2e14: d51dbdef msr s3_5_c11_c13_7, x15 - 2e18: d53dbdef mrs x15, s3_5_c11_c13_7 - 2e1c: d51dbe0f msr s3_5_c11_c14_0, x15 - 2e20: d53dbe0f mrs x15, s3_5_c11_c14_0 - 2e24: d51dbe2f msr s3_5_c11_c14_1, x15 - 2e28: d53dbe2f mrs x15, s3_5_c11_c14_1 - 2e2c: d51dbe4f msr s3_5_c11_c14_2, x15 - 2e30: d53dbe4f mrs x15, s3_5_c11_c14_2 - 2e34: d51dbe6f msr s3_5_c11_c14_3, x15 - 2e38: d53dbe6f mrs x15, s3_5_c11_c14_3 - 2e3c: d51dbe8f msr s3_5_c11_c14_4, x15 - 2e40: d53dbe8f mrs x15, s3_5_c11_c14_4 - 2e44: d51dbeaf msr s3_5_c11_c14_5, x15 - 2e48: d53dbeaf mrs x15, s3_5_c11_c14_5 - 2e4c: d51dbecf msr s3_5_c11_c14_6, x15 - 2e50: d53dbecf mrs x15, s3_5_c11_c14_6 - 2e54: d51dbeef msr s3_5_c11_c14_7, x15 - 2e58: d53dbeef mrs x15, s3_5_c11_c14_7 - 2e5c: d51dbf0f msr s3_5_c11_c15_0, x15 - 2e60: d53dbf0f mrs x15, s3_5_c11_c15_0 - 2e64: d51dbf2f msr s3_5_c11_c15_1, x15 - 2e68: d53dbf2f mrs x15, s3_5_c11_c15_1 - 2e6c: d51dbf4f msr s3_5_c11_c15_2, x15 - 2e70: d53dbf4f mrs x15, s3_5_c11_c15_2 - 2e74: d51dbf6f msr s3_5_c11_c15_3, x15 - 2e78: d53dbf6f mrs x15, s3_5_c11_c15_3 - 2e7c: d51dbf8f msr s3_5_c11_c15_4, x15 - 2e80: d53dbf8f mrs x15, s3_5_c11_c15_4 - 2e84: d51dbfaf msr s3_5_c11_c15_5, x15 - 2e88: d53dbfaf mrs x15, s3_5_c11_c15_5 - 2e8c: d51dbfcf msr s3_5_c11_c15_6, x15 - 2e90: d53dbfcf mrs x15, s3_5_c11_c15_6 - 2e94: d51dbfef msr s3_5_c11_c15_7, x15 - 2e98: d53dbfef mrs x15, s3_5_c11_c15_7 - 2e9c: d51df00f msr s3_5_c15_c0_0, x15 - 2ea0: d53df00f mrs x15, s3_5_c15_c0_0 - 2ea4: d51df02f msr s3_5_c15_c0_1, x15 - 2ea8: d53df02f mrs x15, s3_5_c15_c0_1 - 2eac: d51df04f msr s3_5_c15_c0_2, x15 - 2eb0: d53df04f mrs x15, s3_5_c15_c0_2 - 2eb4: d51df06f msr s3_5_c15_c0_3, x15 - 2eb8: d53df06f mrs x15, s3_5_c15_c0_3 - 2ebc: d51df08f msr s3_5_c15_c0_4, x15 - 2ec0: d53df08f mrs x15, s3_5_c15_c0_4 - 2ec4: d51df0af msr s3_5_c15_c0_5, x15 - 2ec8: d53df0af mrs x15, s3_5_c15_c0_5 - 2ecc: d51df0cf msr s3_5_c15_c0_6, x15 - 2ed0: d53df0cf mrs x15, s3_5_c15_c0_6 - 2ed4: d51df0ef msr s3_5_c15_c0_7, x15 - 2ed8: d53df0ef mrs x15, s3_5_c15_c0_7 - 2edc: d51df10f msr s3_5_c15_c1_0, x15 - 2ee0: d53df10f mrs x15, s3_5_c15_c1_0 - 2ee4: d51df12f msr s3_5_c15_c1_1, x15 - 2ee8: d53df12f mrs x15, s3_5_c15_c1_1 - 2eec: d51df14f msr s3_5_c15_c1_2, x15 - 2ef0: d53df14f mrs x15, s3_5_c15_c1_2 - 2ef4: d51df16f msr s3_5_c15_c1_3, x15 - 2ef8: d53df16f mrs x15, s3_5_c15_c1_3 - 2efc: d51df18f msr s3_5_c15_c1_4, x15 - 2f00: d53df18f mrs x15, s3_5_c15_c1_4 - 2f04: d51df1af msr s3_5_c15_c1_5, x15 - 2f08: d53df1af mrs x15, s3_5_c15_c1_5 - 2f0c: d51df1cf msr s3_5_c15_c1_6, x15 - 2f10: d53df1cf mrs x15, s3_5_c15_c1_6 - 2f14: d51df1ef msr s3_5_c15_c1_7, x15 - 2f18: d53df1ef mrs x15, s3_5_c15_c1_7 - 2f1c: d51df20f msr s3_5_c15_c2_0, x15 - 2f20: d53df20f mrs x15, s3_5_c15_c2_0 - 2f24: d51df22f msr s3_5_c15_c2_1, x15 - 2f28: d53df22f mrs x15, s3_5_c15_c2_1 - 2f2c: d51df24f msr s3_5_c15_c2_2, x15 - 2f30: d53df24f mrs x15, s3_5_c15_c2_2 - 2f34: d51df26f msr s3_5_c15_c2_3, x15 - 2f38: d53df26f mrs x15, s3_5_c15_c2_3 - 2f3c: d51df28f msr s3_5_c15_c2_4, x15 - 2f40: d53df28f mrs x15, s3_5_c15_c2_4 - 2f44: d51df2af msr s3_5_c15_c2_5, x15 - 2f48: d53df2af mrs x15, s3_5_c15_c2_5 - 2f4c: d51df2cf msr s3_5_c15_c2_6, x15 - 2f50: d53df2cf mrs x15, s3_5_c15_c2_6 - 2f54: d51df2ef msr s3_5_c15_c2_7, x15 - 2f58: d53df2ef mrs x15, s3_5_c15_c2_7 - 2f5c: d51df30f msr s3_5_c15_c3_0, x15 - 2f60: d53df30f mrs x15, s3_5_c15_c3_0 - 2f64: d51df32f msr s3_5_c15_c3_1, x15 - 2f68: d53df32f mrs x15, s3_5_c15_c3_1 - 2f6c: d51df34f msr s3_5_c15_c3_2, x15 - 2f70: d53df34f mrs x15, s3_5_c15_c3_2 - 2f74: d51df36f msr s3_5_c15_c3_3, x15 - 2f78: d53df36f mrs x15, s3_5_c15_c3_3 - 2f7c: d51df38f msr s3_5_c15_c3_4, x15 - 2f80: d53df38f mrs x15, s3_5_c15_c3_4 - 2f84: d51df3af msr s3_5_c15_c3_5, x15 - 2f88: d53df3af mrs x15, s3_5_c15_c3_5 - 2f8c: d51df3cf msr s3_5_c15_c3_6, x15 - 2f90: d53df3cf mrs x15, s3_5_c15_c3_6 - 2f94: d51df3ef msr s3_5_c15_c3_7, x15 - 2f98: d53df3ef mrs x15, s3_5_c15_c3_7 - 2f9c: d51df40f msr s3_5_c15_c4_0, x15 - 2fa0: d53df40f mrs x15, s3_5_c15_c4_0 - 2fa4: d51df42f msr s3_5_c15_c4_1, x15 - 2fa8: d53df42f mrs x15, s3_5_c15_c4_1 - 2fac: d51df44f msr s3_5_c15_c4_2, x15 - 2fb0: d53df44f mrs x15, s3_5_c15_c4_2 - 2fb4: d51df46f msr s3_5_c15_c4_3, x15 - 2fb8: d53df46f mrs x15, s3_5_c15_c4_3 - 2fbc: d51df48f msr s3_5_c15_c4_4, x15 - 2fc0: d53df48f mrs x15, s3_5_c15_c4_4 - 2fc4: d51df4af msr s3_5_c15_c4_5, x15 - 2fc8: d53df4af mrs x15, s3_5_c15_c4_5 - 2fcc: d51df4cf msr s3_5_c15_c4_6, x15 - 2fd0: d53df4cf mrs x15, s3_5_c15_c4_6 - 2fd4: d51df4ef msr s3_5_c15_c4_7, x15 - 2fd8: d53df4ef mrs x15, s3_5_c15_c4_7 - 2fdc: d51df50f msr s3_5_c15_c5_0, x15 - 2fe0: d53df50f mrs x15, s3_5_c15_c5_0 - 2fe4: d51df52f msr s3_5_c15_c5_1, x15 - 2fe8: d53df52f mrs x15, s3_5_c15_c5_1 - 2fec: d51df54f msr s3_5_c15_c5_2, x15 - 2ff0: d53df54f mrs x15, s3_5_c15_c5_2 - 2ff4: d51df56f msr s3_5_c15_c5_3, x15 - 2ff8: d53df56f mrs x15, s3_5_c15_c5_3 - 2ffc: d51df58f msr s3_5_c15_c5_4, x15 - 3000: d53df58f mrs x15, s3_5_c15_c5_4 - 3004: d51df5af msr s3_5_c15_c5_5, x15 - 3008: d53df5af mrs x15, s3_5_c15_c5_5 - 300c: d51df5cf msr s3_5_c15_c5_6, x15 - 3010: d53df5cf mrs x15, s3_5_c15_c5_6 - 3014: d51df5ef msr s3_5_c15_c5_7, x15 - 3018: d53df5ef mrs x15, s3_5_c15_c5_7 - 301c: d51df60f msr s3_5_c15_c6_0, x15 - 3020: d53df60f mrs x15, s3_5_c15_c6_0 - 3024: d51df62f msr s3_5_c15_c6_1, x15 - 3028: d53df62f mrs x15, s3_5_c15_c6_1 - 302c: d51df64f msr s3_5_c15_c6_2, x15 - 3030: d53df64f mrs x15, s3_5_c15_c6_2 - 3034: d51df66f msr s3_5_c15_c6_3, x15 - 3038: d53df66f mrs x15, s3_5_c15_c6_3 - 303c: d51df68f msr s3_5_c15_c6_4, x15 - 3040: d53df68f mrs x15, s3_5_c15_c6_4 - 3044: d51df6af msr s3_5_c15_c6_5, x15 - 3048: d53df6af mrs x15, s3_5_c15_c6_5 - 304c: d51df6cf msr s3_5_c15_c6_6, x15 - 3050: d53df6cf mrs x15, s3_5_c15_c6_6 - 3054: d51df6ef msr s3_5_c15_c6_7, x15 - 3058: d53df6ef mrs x15, s3_5_c15_c6_7 - 305c: d51df70f msr s3_5_c15_c7_0, x15 - 3060: d53df70f mrs x15, s3_5_c15_c7_0 - 3064: d51df72f msr s3_5_c15_c7_1, x15 - 3068: d53df72f mrs x15, s3_5_c15_c7_1 - 306c: d51df74f msr s3_5_c15_c7_2, x15 - 3070: d53df74f mrs x15, s3_5_c15_c7_2 - 3074: d51df76f msr s3_5_c15_c7_3, x15 - 3078: d53df76f mrs x15, s3_5_c15_c7_3 - 307c: d51df78f msr s3_5_c15_c7_4, x15 - 3080: d53df78f mrs x15, s3_5_c15_c7_4 - 3084: d51df7af msr s3_5_c15_c7_5, x15 - 3088: d53df7af mrs x15, s3_5_c15_c7_5 - 308c: d51df7cf msr s3_5_c15_c7_6, x15 - 3090: d53df7cf mrs x15, s3_5_c15_c7_6 - 3094: d51df7ef msr s3_5_c15_c7_7, x15 - 3098: d53df7ef mrs x15, s3_5_c15_c7_7 - 309c: d51df80f msr s3_5_c15_c8_0, x15 - 30a0: d53df80f mrs x15, s3_5_c15_c8_0 - 30a4: d51df82f msr s3_5_c15_c8_1, x15 - 30a8: d53df82f mrs x15, s3_5_c15_c8_1 - 30ac: d51df84f msr s3_5_c15_c8_2, x15 - 30b0: d53df84f mrs x15, s3_5_c15_c8_2 - 30b4: d51df86f msr s3_5_c15_c8_3, x15 - 30b8: d53df86f mrs x15, s3_5_c15_c8_3 - 30bc: d51df88f msr s3_5_c15_c8_4, x15 - 30c0: d53df88f mrs x15, s3_5_c15_c8_4 - 30c4: d51df8af msr s3_5_c15_c8_5, x15 - 30c8: d53df8af mrs x15, s3_5_c15_c8_5 - 30cc: d51df8cf msr s3_5_c15_c8_6, x15 - 30d0: d53df8cf mrs x15, s3_5_c15_c8_6 - 30d4: d51df8ef msr s3_5_c15_c8_7, x15 - 30d8: d53df8ef mrs x15, s3_5_c15_c8_7 - 30dc: d51df90f msr s3_5_c15_c9_0, x15 - 30e0: d53df90f mrs x15, s3_5_c15_c9_0 - 30e4: d51df92f msr s3_5_c15_c9_1, x15 - 30e8: d53df92f mrs x15, s3_5_c15_c9_1 - 30ec: d51df94f msr s3_5_c15_c9_2, x15 - 30f0: d53df94f mrs x15, s3_5_c15_c9_2 - 30f4: d51df96f msr s3_5_c15_c9_3, x15 - 30f8: d53df96f mrs x15, s3_5_c15_c9_3 - 30fc: d51df98f msr s3_5_c15_c9_4, x15 - 3100: d53df98f mrs x15, s3_5_c15_c9_4 - 3104: d51df9af msr s3_5_c15_c9_5, x15 - 3108: d53df9af mrs x15, s3_5_c15_c9_5 - 310c: d51df9cf msr s3_5_c15_c9_6, x15 - 3110: d53df9cf mrs x15, s3_5_c15_c9_6 - 3114: d51df9ef msr s3_5_c15_c9_7, x15 - 3118: d53df9ef mrs x15, s3_5_c15_c9_7 - 311c: d51dfa0f msr s3_5_c15_c10_0, x15 - 3120: d53dfa0f mrs x15, s3_5_c15_c10_0 - 3124: d51dfa2f msr s3_5_c15_c10_1, x15 - 3128: d53dfa2f mrs x15, s3_5_c15_c10_1 - 312c: d51dfa4f msr s3_5_c15_c10_2, x15 - 3130: d53dfa4f mrs x15, s3_5_c15_c10_2 - 3134: d51dfa6f msr s3_5_c15_c10_3, x15 - 3138: d53dfa6f mrs x15, s3_5_c15_c10_3 - 313c: d51dfa8f msr s3_5_c15_c10_4, x15 - 3140: d53dfa8f mrs x15, s3_5_c15_c10_4 - 3144: d51dfaaf msr s3_5_c15_c10_5, x15 - 3148: d53dfaaf mrs x15, s3_5_c15_c10_5 - 314c: d51dfacf msr s3_5_c15_c10_6, x15 - 3150: d53dfacf mrs x15, s3_5_c15_c10_6 - 3154: d51dfaef msr s3_5_c15_c10_7, x15 - 3158: d53dfaef mrs x15, s3_5_c15_c10_7 - 315c: d51dfb0f msr s3_5_c15_c11_0, x15 - 3160: d53dfb0f mrs x15, s3_5_c15_c11_0 - 3164: d51dfb2f msr s3_5_c15_c11_1, x15 - 3168: d53dfb2f mrs x15, s3_5_c15_c11_1 - 316c: d51dfb4f msr s3_5_c15_c11_2, x15 - 3170: d53dfb4f mrs x15, s3_5_c15_c11_2 - 3174: d51dfb6f msr s3_5_c15_c11_3, x15 - 3178: d53dfb6f mrs x15, s3_5_c15_c11_3 - 317c: d51dfb8f msr s3_5_c15_c11_4, x15 - 3180: d53dfb8f mrs x15, s3_5_c15_c11_4 - 3184: d51dfbaf msr s3_5_c15_c11_5, x15 - 3188: d53dfbaf mrs x15, s3_5_c15_c11_5 - 318c: d51dfbcf msr s3_5_c15_c11_6, x15 - 3190: d53dfbcf mrs x15, s3_5_c15_c11_6 - 3194: d51dfbef msr s3_5_c15_c11_7, x15 - 3198: d53dfbef mrs x15, s3_5_c15_c11_7 - 319c: d51dfc0f msr s3_5_c15_c12_0, x15 - 31a0: d53dfc0f mrs x15, s3_5_c15_c12_0 - 31a4: d51dfc2f msr s3_5_c15_c12_1, x15 - 31a8: d53dfc2f mrs x15, s3_5_c15_c12_1 - 31ac: d51dfc4f msr s3_5_c15_c12_2, x15 - 31b0: d53dfc4f mrs x15, s3_5_c15_c12_2 - 31b4: d51dfc6f msr s3_5_c15_c12_3, x15 - 31b8: d53dfc6f mrs x15, s3_5_c15_c12_3 - 31bc: d51dfc8f msr s3_5_c15_c12_4, x15 - 31c0: d53dfc8f mrs x15, s3_5_c15_c12_4 - 31c4: d51dfcaf msr s3_5_c15_c12_5, x15 - 31c8: d53dfcaf mrs x15, s3_5_c15_c12_5 - 31cc: d51dfccf msr s3_5_c15_c12_6, x15 - 31d0: d53dfccf mrs x15, s3_5_c15_c12_6 - 31d4: d51dfcef msr s3_5_c15_c12_7, x15 - 31d8: d53dfcef mrs x15, s3_5_c15_c12_7 - 31dc: d51dfd0f msr s3_5_c15_c13_0, x15 - 31e0: d53dfd0f mrs x15, s3_5_c15_c13_0 - 31e4: d51dfd2f msr s3_5_c15_c13_1, x15 - 31e8: d53dfd2f mrs x15, s3_5_c15_c13_1 - 31ec: d51dfd4f msr s3_5_c15_c13_2, x15 - 31f0: d53dfd4f mrs x15, s3_5_c15_c13_2 - 31f4: d51dfd6f msr s3_5_c15_c13_3, x15 - 31f8: d53dfd6f mrs x15, s3_5_c15_c13_3 - 31fc: d51dfd8f msr s3_5_c15_c13_4, x15 - 3200: d53dfd8f mrs x15, s3_5_c15_c13_4 - 3204: d51dfdaf msr s3_5_c15_c13_5, x15 - 3208: d53dfdaf mrs x15, s3_5_c15_c13_5 - 320c: d51dfdcf msr s3_5_c15_c13_6, x15 - 3210: d53dfdcf mrs x15, s3_5_c15_c13_6 - 3214: d51dfdef msr s3_5_c15_c13_7, x15 - 3218: d53dfdef mrs x15, s3_5_c15_c13_7 - 321c: d51dfe0f msr s3_5_c15_c14_0, x15 - 3220: d53dfe0f mrs x15, s3_5_c15_c14_0 - 3224: d51dfe2f msr s3_5_c15_c14_1, x15 - 3228: d53dfe2f mrs x15, s3_5_c15_c14_1 - 322c: d51dfe4f msr s3_5_c15_c14_2, x15 - 3230: d53dfe4f mrs x15, s3_5_c15_c14_2 - 3234: d51dfe6f msr s3_5_c15_c14_3, x15 - 3238: d53dfe6f mrs x15, s3_5_c15_c14_3 - 323c: d51dfe8f msr s3_5_c15_c14_4, x15 - 3240: d53dfe8f mrs x15, s3_5_c15_c14_4 - 3244: d51dfeaf msr s3_5_c15_c14_5, x15 - 3248: d53dfeaf mrs x15, s3_5_c15_c14_5 - 324c: d51dfecf msr s3_5_c15_c14_6, x15 - 3250: d53dfecf mrs x15, s3_5_c15_c14_6 - 3254: d51dfeef msr s3_5_c15_c14_7, x15 - 3258: d53dfeef mrs x15, s3_5_c15_c14_7 - 325c: d51dff0f msr s3_5_c15_c15_0, x15 - 3260: d53dff0f mrs x15, s3_5_c15_c15_0 - 3264: d51dff2f msr s3_5_c15_c15_1, x15 - 3268: d53dff2f mrs x15, s3_5_c15_c15_1 - 326c: d51dff4f msr s3_5_c15_c15_2, x15 - 3270: d53dff4f mrs x15, s3_5_c15_c15_2 - 3274: d51dff6f msr s3_5_c15_c15_3, x15 - 3278: d53dff6f mrs x15, s3_5_c15_c15_3 - 327c: d51dff8f msr s3_5_c15_c15_4, x15 - 3280: d53dff8f mrs x15, s3_5_c15_c15_4 - 3284: d51dffaf msr s3_5_c15_c15_5, x15 - 3288: d53dffaf mrs x15, s3_5_c15_c15_5 - 328c: d51dffcf msr s3_5_c15_c15_6, x15 - 3290: d53dffcf mrs x15, s3_5_c15_c15_6 - 3294: d51dffef msr s3_5_c15_c15_7, x15 - 3298: d53dffef mrs x15, s3_5_c15_c15_7 - 329c: d51eb00f msr s3_6_c11_c0_0, x15 - 32a0: d53eb00f mrs x15, s3_6_c11_c0_0 - 32a4: d51eb02f msr s3_6_c11_c0_1, x15 - 32a8: d53eb02f mrs x15, s3_6_c11_c0_1 - 32ac: d51eb04f msr s3_6_c11_c0_2, x15 - 32b0: d53eb04f mrs x15, s3_6_c11_c0_2 - 32b4: d51eb06f msr s3_6_c11_c0_3, x15 - 32b8: d53eb06f mrs x15, s3_6_c11_c0_3 - 32bc: d51eb08f msr s3_6_c11_c0_4, x15 - 32c0: d53eb08f mrs x15, s3_6_c11_c0_4 - 32c4: d51eb0af msr s3_6_c11_c0_5, x15 - 32c8: d53eb0af mrs x15, s3_6_c11_c0_5 - 32cc: d51eb0cf msr s3_6_c11_c0_6, x15 - 32d0: d53eb0cf mrs x15, s3_6_c11_c0_6 - 32d4: d51eb0ef msr s3_6_c11_c0_7, x15 - 32d8: d53eb0ef mrs x15, s3_6_c11_c0_7 - 32dc: d51eb10f msr s3_6_c11_c1_0, x15 - 32e0: d53eb10f mrs x15, s3_6_c11_c1_0 - 32e4: d51eb12f msr s3_6_c11_c1_1, x15 - 32e8: d53eb12f mrs x15, s3_6_c11_c1_1 - 32ec: d51eb14f msr s3_6_c11_c1_2, x15 - 32f0: d53eb14f mrs x15, s3_6_c11_c1_2 - 32f4: d51eb16f msr s3_6_c11_c1_3, x15 - 32f8: d53eb16f mrs x15, s3_6_c11_c1_3 - 32fc: d51eb18f msr s3_6_c11_c1_4, x15 - 3300: d53eb18f mrs x15, s3_6_c11_c1_4 - 3304: d51eb1af msr s3_6_c11_c1_5, x15 - 3308: d53eb1af mrs x15, s3_6_c11_c1_5 - 330c: d51eb1cf msr s3_6_c11_c1_6, x15 - 3310: d53eb1cf mrs x15, s3_6_c11_c1_6 - 3314: d51eb1ef msr s3_6_c11_c1_7, x15 - 3318: d53eb1ef mrs x15, s3_6_c11_c1_7 - 331c: d51eb20f msr s3_6_c11_c2_0, x15 - 3320: d53eb20f mrs x15, s3_6_c11_c2_0 - 3324: d51eb22f msr s3_6_c11_c2_1, x15 - 3328: d53eb22f mrs x15, s3_6_c11_c2_1 - 332c: d51eb24f msr s3_6_c11_c2_2, x15 - 3330: d53eb24f mrs x15, s3_6_c11_c2_2 - 3334: d51eb26f msr s3_6_c11_c2_3, x15 - 3338: d53eb26f mrs x15, s3_6_c11_c2_3 - 333c: d51eb28f msr s3_6_c11_c2_4, x15 - 3340: d53eb28f mrs x15, s3_6_c11_c2_4 - 3344: d51eb2af msr s3_6_c11_c2_5, x15 - 3348: d53eb2af mrs x15, s3_6_c11_c2_5 - 334c: d51eb2cf msr s3_6_c11_c2_6, x15 - 3350: d53eb2cf mrs x15, s3_6_c11_c2_6 - 3354: d51eb2ef msr s3_6_c11_c2_7, x15 - 3358: d53eb2ef mrs x15, s3_6_c11_c2_7 - 335c: d51eb30f msr s3_6_c11_c3_0, x15 - 3360: d53eb30f mrs x15, s3_6_c11_c3_0 - 3364: d51eb32f msr s3_6_c11_c3_1, x15 - 3368: d53eb32f mrs x15, s3_6_c11_c3_1 - 336c: d51eb34f msr s3_6_c11_c3_2, x15 - 3370: d53eb34f mrs x15, s3_6_c11_c3_2 - 3374: d51eb36f msr s3_6_c11_c3_3, x15 - 3378: d53eb36f mrs x15, s3_6_c11_c3_3 - 337c: d51eb38f msr s3_6_c11_c3_4, x15 - 3380: d53eb38f mrs x15, s3_6_c11_c3_4 - 3384: d51eb3af msr s3_6_c11_c3_5, x15 - 3388: d53eb3af mrs x15, s3_6_c11_c3_5 - 338c: d51eb3cf msr s3_6_c11_c3_6, x15 - 3390: d53eb3cf mrs x15, s3_6_c11_c3_6 - 3394: d51eb3ef msr s3_6_c11_c3_7, x15 - 3398: d53eb3ef mrs x15, s3_6_c11_c3_7 - 339c: d51eb40f msr s3_6_c11_c4_0, x15 - 33a0: d53eb40f mrs x15, s3_6_c11_c4_0 - 33a4: d51eb42f msr s3_6_c11_c4_1, x15 - 33a8: d53eb42f mrs x15, s3_6_c11_c4_1 - 33ac: d51eb44f msr s3_6_c11_c4_2, x15 - 33b0: d53eb44f mrs x15, s3_6_c11_c4_2 - 33b4: d51eb46f msr s3_6_c11_c4_3, x15 - 33b8: d53eb46f mrs x15, s3_6_c11_c4_3 - 33bc: d51eb48f msr s3_6_c11_c4_4, x15 - 33c0: d53eb48f mrs x15, s3_6_c11_c4_4 - 33c4: d51eb4af msr s3_6_c11_c4_5, x15 - 33c8: d53eb4af mrs x15, s3_6_c11_c4_5 - 33cc: d51eb4cf msr s3_6_c11_c4_6, x15 - 33d0: d53eb4cf mrs x15, s3_6_c11_c4_6 - 33d4: d51eb4ef msr s3_6_c11_c4_7, x15 - 33d8: d53eb4ef mrs x15, s3_6_c11_c4_7 - 33dc: d51eb50f msr s3_6_c11_c5_0, x15 - 33e0: d53eb50f mrs x15, s3_6_c11_c5_0 - 33e4: d51eb52f msr s3_6_c11_c5_1, x15 - 33e8: d53eb52f mrs x15, s3_6_c11_c5_1 - 33ec: d51eb54f msr s3_6_c11_c5_2, x15 - 33f0: d53eb54f mrs x15, s3_6_c11_c5_2 - 33f4: d51eb56f msr s3_6_c11_c5_3, x15 - 33f8: d53eb56f mrs x15, s3_6_c11_c5_3 - 33fc: d51eb58f msr s3_6_c11_c5_4, x15 - 3400: d53eb58f mrs x15, s3_6_c11_c5_4 - 3404: d51eb5af msr s3_6_c11_c5_5, x15 - 3408: d53eb5af mrs x15, s3_6_c11_c5_5 - 340c: d51eb5cf msr s3_6_c11_c5_6, x15 - 3410: d53eb5cf mrs x15, s3_6_c11_c5_6 - 3414: d51eb5ef msr s3_6_c11_c5_7, x15 - 3418: d53eb5ef mrs x15, s3_6_c11_c5_7 - 341c: d51eb60f msr s3_6_c11_c6_0, x15 - 3420: d53eb60f mrs x15, s3_6_c11_c6_0 - 3424: d51eb62f msr s3_6_c11_c6_1, x15 - 3428: d53eb62f mrs x15, s3_6_c11_c6_1 - 342c: d51eb64f msr s3_6_c11_c6_2, x15 - 3430: d53eb64f mrs x15, s3_6_c11_c6_2 - 3434: d51eb66f msr s3_6_c11_c6_3, x15 - 3438: d53eb66f mrs x15, s3_6_c11_c6_3 - 343c: d51eb68f msr s3_6_c11_c6_4, x15 - 3440: d53eb68f mrs x15, s3_6_c11_c6_4 - 3444: d51eb6af msr s3_6_c11_c6_5, x15 - 3448: d53eb6af mrs x15, s3_6_c11_c6_5 - 344c: d51eb6cf msr s3_6_c11_c6_6, x15 - 3450: d53eb6cf mrs x15, s3_6_c11_c6_6 - 3454: d51eb6ef msr s3_6_c11_c6_7, x15 - 3458: d53eb6ef mrs x15, s3_6_c11_c6_7 - 345c: d51eb70f msr s3_6_c11_c7_0, x15 - 3460: d53eb70f mrs x15, s3_6_c11_c7_0 - 3464: d51eb72f msr s3_6_c11_c7_1, x15 - 3468: d53eb72f mrs x15, s3_6_c11_c7_1 - 346c: d51eb74f msr s3_6_c11_c7_2, x15 - 3470: d53eb74f mrs x15, s3_6_c11_c7_2 - 3474: d51eb76f msr s3_6_c11_c7_3, x15 - 3478: d53eb76f mrs x15, s3_6_c11_c7_3 - 347c: d51eb78f msr s3_6_c11_c7_4, x15 - 3480: d53eb78f mrs x15, s3_6_c11_c7_4 - 3484: d51eb7af msr s3_6_c11_c7_5, x15 - 3488: d53eb7af mrs x15, s3_6_c11_c7_5 - 348c: d51eb7cf msr s3_6_c11_c7_6, x15 - 3490: d53eb7cf mrs x15, s3_6_c11_c7_6 - 3494: d51eb7ef msr s3_6_c11_c7_7, x15 - 3498: d53eb7ef mrs x15, s3_6_c11_c7_7 - 349c: d51eb80f msr s3_6_c11_c8_0, x15 - 34a0: d53eb80f mrs x15, s3_6_c11_c8_0 - 34a4: d51eb82f msr s3_6_c11_c8_1, x15 - 34a8: d53eb82f mrs x15, s3_6_c11_c8_1 - 34ac: d51eb84f msr s3_6_c11_c8_2, x15 - 34b0: d53eb84f mrs x15, s3_6_c11_c8_2 - 34b4: d51eb86f msr s3_6_c11_c8_3, x15 - 34b8: d53eb86f mrs x15, s3_6_c11_c8_3 - 34bc: d51eb88f msr s3_6_c11_c8_4, x15 - 34c0: d53eb88f mrs x15, s3_6_c11_c8_4 - 34c4: d51eb8af msr s3_6_c11_c8_5, x15 - 34c8: d53eb8af mrs x15, s3_6_c11_c8_5 - 34cc: d51eb8cf msr s3_6_c11_c8_6, x15 - 34d0: d53eb8cf mrs x15, s3_6_c11_c8_6 - 34d4: d51eb8ef msr s3_6_c11_c8_7, x15 - 34d8: d53eb8ef mrs x15, s3_6_c11_c8_7 - 34dc: d51eb90f msr s3_6_c11_c9_0, x15 - 34e0: d53eb90f mrs x15, s3_6_c11_c9_0 - 34e4: d51eb92f msr s3_6_c11_c9_1, x15 - 34e8: d53eb92f mrs x15, s3_6_c11_c9_1 - 34ec: d51eb94f msr s3_6_c11_c9_2, x15 - 34f0: d53eb94f mrs x15, s3_6_c11_c9_2 - 34f4: d51eb96f msr s3_6_c11_c9_3, x15 - 34f8: d53eb96f mrs x15, s3_6_c11_c9_3 - 34fc: d51eb98f msr s3_6_c11_c9_4, x15 - 3500: d53eb98f mrs x15, s3_6_c11_c9_4 - 3504: d51eb9af msr s3_6_c11_c9_5, x15 - 3508: d53eb9af mrs x15, s3_6_c11_c9_5 - 350c: d51eb9cf msr s3_6_c11_c9_6, x15 - 3510: d53eb9cf mrs x15, s3_6_c11_c9_6 - 3514: d51eb9ef msr s3_6_c11_c9_7, x15 - 3518: d53eb9ef mrs x15, s3_6_c11_c9_7 - 351c: d51eba0f msr s3_6_c11_c10_0, x15 - 3520: d53eba0f mrs x15, s3_6_c11_c10_0 - 3524: d51eba2f msr s3_6_c11_c10_1, x15 - 3528: d53eba2f mrs x15, s3_6_c11_c10_1 - 352c: d51eba4f msr s3_6_c11_c10_2, x15 - 3530: d53eba4f mrs x15, s3_6_c11_c10_2 - 3534: d51eba6f msr s3_6_c11_c10_3, x15 - 3538: d53eba6f mrs x15, s3_6_c11_c10_3 - 353c: d51eba8f msr s3_6_c11_c10_4, x15 - 3540: d53eba8f mrs x15, s3_6_c11_c10_4 - 3544: d51ebaaf msr s3_6_c11_c10_5, x15 - 3548: d53ebaaf mrs x15, s3_6_c11_c10_5 - 354c: d51ebacf msr s3_6_c11_c10_6, x15 - 3550: d53ebacf mrs x15, s3_6_c11_c10_6 - 3554: d51ebaef msr s3_6_c11_c10_7, x15 - 3558: d53ebaef mrs x15, s3_6_c11_c10_7 - 355c: d51ebb0f msr s3_6_c11_c11_0, x15 - 3560: d53ebb0f mrs x15, s3_6_c11_c11_0 - 3564: d51ebb2f msr s3_6_c11_c11_1, x15 - 3568: d53ebb2f mrs x15, s3_6_c11_c11_1 - 356c: d51ebb4f msr s3_6_c11_c11_2, x15 - 3570: d53ebb4f mrs x15, s3_6_c11_c11_2 - 3574: d51ebb6f msr s3_6_c11_c11_3, x15 - 3578: d53ebb6f mrs x15, s3_6_c11_c11_3 - 357c: d51ebb8f msr s3_6_c11_c11_4, x15 - 3580: d53ebb8f mrs x15, s3_6_c11_c11_4 - 3584: d51ebbaf msr s3_6_c11_c11_5, x15 - 3588: d53ebbaf mrs x15, s3_6_c11_c11_5 - 358c: d51ebbcf msr s3_6_c11_c11_6, x15 - 3590: d53ebbcf mrs x15, s3_6_c11_c11_6 - 3594: d51ebbef msr s3_6_c11_c11_7, x15 - 3598: d53ebbef mrs x15, s3_6_c11_c11_7 - 359c: d51ebc0f msr s3_6_c11_c12_0, x15 - 35a0: d53ebc0f mrs x15, s3_6_c11_c12_0 - 35a4: d51ebc2f msr s3_6_c11_c12_1, x15 - 35a8: d53ebc2f mrs x15, s3_6_c11_c12_1 - 35ac: d51ebc4f msr s3_6_c11_c12_2, x15 - 35b0: d53ebc4f mrs x15, s3_6_c11_c12_2 - 35b4: d51ebc6f msr s3_6_c11_c12_3, x15 - 35b8: d53ebc6f mrs x15, s3_6_c11_c12_3 - 35bc: d51ebc8f msr s3_6_c11_c12_4, x15 - 35c0: d53ebc8f mrs x15, s3_6_c11_c12_4 - 35c4: d51ebcaf msr s3_6_c11_c12_5, x15 - 35c8: d53ebcaf mrs x15, s3_6_c11_c12_5 - 35cc: d51ebccf msr s3_6_c11_c12_6, x15 - 35d0: d53ebccf mrs x15, s3_6_c11_c12_6 - 35d4: d51ebcef msr s3_6_c11_c12_7, x15 - 35d8: d53ebcef mrs x15, s3_6_c11_c12_7 - 35dc: d51ebd0f msr s3_6_c11_c13_0, x15 - 35e0: d53ebd0f mrs x15, s3_6_c11_c13_0 - 35e4: d51ebd2f msr s3_6_c11_c13_1, x15 - 35e8: d53ebd2f mrs x15, s3_6_c11_c13_1 - 35ec: d51ebd4f msr s3_6_c11_c13_2, x15 - 35f0: d53ebd4f mrs x15, s3_6_c11_c13_2 - 35f4: d51ebd6f msr s3_6_c11_c13_3, x15 - 35f8: d53ebd6f mrs x15, s3_6_c11_c13_3 - 35fc: d51ebd8f msr s3_6_c11_c13_4, x15 - 3600: d53ebd8f mrs x15, s3_6_c11_c13_4 - 3604: d51ebdaf msr s3_6_c11_c13_5, x15 - 3608: d53ebdaf mrs x15, s3_6_c11_c13_5 - 360c: d51ebdcf msr s3_6_c11_c13_6, x15 - 3610: d53ebdcf mrs x15, s3_6_c11_c13_6 - 3614: d51ebdef msr s3_6_c11_c13_7, x15 - 3618: d53ebdef mrs x15, s3_6_c11_c13_7 - 361c: d51ebe0f msr s3_6_c11_c14_0, x15 - 3620: d53ebe0f mrs x15, s3_6_c11_c14_0 - 3624: d51ebe2f msr s3_6_c11_c14_1, x15 - 3628: d53ebe2f mrs x15, s3_6_c11_c14_1 - 362c: d51ebe4f msr s3_6_c11_c14_2, x15 - 3630: d53ebe4f mrs x15, s3_6_c11_c14_2 - 3634: d51ebe6f msr s3_6_c11_c14_3, x15 - 3638: d53ebe6f mrs x15, s3_6_c11_c14_3 - 363c: d51ebe8f msr s3_6_c11_c14_4, x15 - 3640: d53ebe8f mrs x15, s3_6_c11_c14_4 - 3644: d51ebeaf msr s3_6_c11_c14_5, x15 - 3648: d53ebeaf mrs x15, s3_6_c11_c14_5 - 364c: d51ebecf msr s3_6_c11_c14_6, x15 - 3650: d53ebecf mrs x15, s3_6_c11_c14_6 - 3654: d51ebeef msr s3_6_c11_c14_7, x15 - 3658: d53ebeef mrs x15, s3_6_c11_c14_7 - 365c: d51ebf0f msr s3_6_c11_c15_0, x15 - 3660: d53ebf0f mrs x15, s3_6_c11_c15_0 - 3664: d51ebf2f msr s3_6_c11_c15_1, x15 - 3668: d53ebf2f mrs x15, s3_6_c11_c15_1 - 366c: d51ebf4f msr s3_6_c11_c15_2, x15 - 3670: d53ebf4f mrs x15, s3_6_c11_c15_2 - 3674: d51ebf6f msr s3_6_c11_c15_3, x15 - 3678: d53ebf6f mrs x15, s3_6_c11_c15_3 - 367c: d51ebf8f msr s3_6_c11_c15_4, x15 - 3680: d53ebf8f mrs x15, s3_6_c11_c15_4 - 3684: d51ebfaf msr s3_6_c11_c15_5, x15 - 3688: d53ebfaf mrs x15, s3_6_c11_c15_5 - 368c: d51ebfcf msr s3_6_c11_c15_6, x15 - 3690: d53ebfcf mrs x15, s3_6_c11_c15_6 - 3694: d51ebfef msr s3_6_c11_c15_7, x15 - 3698: d53ebfef mrs x15, s3_6_c11_c15_7 - 369c: d51ef00f msr s3_6_c15_c0_0, x15 - 36a0: d53ef00f mrs x15, s3_6_c15_c0_0 - 36a4: d51ef02f msr s3_6_c15_c0_1, x15 - 36a8: d53ef02f mrs x15, s3_6_c15_c0_1 - 36ac: d51ef04f msr s3_6_c15_c0_2, x15 - 36b0: d53ef04f mrs x15, s3_6_c15_c0_2 - 36b4: d51ef06f msr s3_6_c15_c0_3, x15 - 36b8: d53ef06f mrs x15, s3_6_c15_c0_3 - 36bc: d51ef08f msr s3_6_c15_c0_4, x15 - 36c0: d53ef08f mrs x15, s3_6_c15_c0_4 - 36c4: d51ef0af msr s3_6_c15_c0_5, x15 - 36c8: d53ef0af mrs x15, s3_6_c15_c0_5 - 36cc: d51ef0cf msr s3_6_c15_c0_6, x15 - 36d0: d53ef0cf mrs x15, s3_6_c15_c0_6 - 36d4: d51ef0ef msr s3_6_c15_c0_7, x15 - 36d8: d53ef0ef mrs x15, s3_6_c15_c0_7 - 36dc: d51ef10f msr s3_6_c15_c1_0, x15 - 36e0: d53ef10f mrs x15, s3_6_c15_c1_0 - 36e4: d51ef12f msr s3_6_c15_c1_1, x15 - 36e8: d53ef12f mrs x15, s3_6_c15_c1_1 - 36ec: d51ef14f msr s3_6_c15_c1_2, x15 - 36f0: d53ef14f mrs x15, s3_6_c15_c1_2 - 36f4: d51ef16f msr s3_6_c15_c1_3, x15 - 36f8: d53ef16f mrs x15, s3_6_c15_c1_3 - 36fc: d51ef18f msr s3_6_c15_c1_4, x15 - 3700: d53ef18f mrs x15, s3_6_c15_c1_4 - 3704: d51ef1af msr s3_6_c15_c1_5, x15 - 3708: d53ef1af mrs x15, s3_6_c15_c1_5 - 370c: d51ef1cf msr s3_6_c15_c1_6, x15 - 3710: d53ef1cf mrs x15, s3_6_c15_c1_6 - 3714: d51ef1ef msr s3_6_c15_c1_7, x15 - 3718: d53ef1ef mrs x15, s3_6_c15_c1_7 - 371c: d51ef20f msr s3_6_c15_c2_0, x15 - 3720: d53ef20f mrs x15, s3_6_c15_c2_0 - 3724: d51ef22f msr s3_6_c15_c2_1, x15 - 3728: d53ef22f mrs x15, s3_6_c15_c2_1 - 372c: d51ef24f msr s3_6_c15_c2_2, x15 - 3730: d53ef24f mrs x15, s3_6_c15_c2_2 - 3734: d51ef26f msr s3_6_c15_c2_3, x15 - 3738: d53ef26f mrs x15, s3_6_c15_c2_3 - 373c: d51ef28f msr s3_6_c15_c2_4, x15 - 3740: d53ef28f mrs x15, s3_6_c15_c2_4 - 3744: d51ef2af msr s3_6_c15_c2_5, x15 - 3748: d53ef2af mrs x15, s3_6_c15_c2_5 - 374c: d51ef2cf msr s3_6_c15_c2_6, x15 - 3750: d53ef2cf mrs x15, s3_6_c15_c2_6 - 3754: d51ef2ef msr s3_6_c15_c2_7, x15 - 3758: d53ef2ef mrs x15, s3_6_c15_c2_7 - 375c: d51ef30f msr s3_6_c15_c3_0, x15 - 3760: d53ef30f mrs x15, s3_6_c15_c3_0 - 3764: d51ef32f msr s3_6_c15_c3_1, x15 - 3768: d53ef32f mrs x15, s3_6_c15_c3_1 - 376c: d51ef34f msr s3_6_c15_c3_2, x15 - 3770: d53ef34f mrs x15, s3_6_c15_c3_2 - 3774: d51ef36f msr s3_6_c15_c3_3, x15 - 3778: d53ef36f mrs x15, s3_6_c15_c3_3 - 377c: d51ef38f msr s3_6_c15_c3_4, x15 - 3780: d53ef38f mrs x15, s3_6_c15_c3_4 - 3784: d51ef3af msr s3_6_c15_c3_5, x15 - 3788: d53ef3af mrs x15, s3_6_c15_c3_5 - 378c: d51ef3cf msr s3_6_c15_c3_6, x15 - 3790: d53ef3cf mrs x15, s3_6_c15_c3_6 - 3794: d51ef3ef msr s3_6_c15_c3_7, x15 - 3798: d53ef3ef mrs x15, s3_6_c15_c3_7 - 379c: d51ef40f msr s3_6_c15_c4_0, x15 - 37a0: d53ef40f mrs x15, s3_6_c15_c4_0 - 37a4: d51ef42f msr s3_6_c15_c4_1, x15 - 37a8: d53ef42f mrs x15, s3_6_c15_c4_1 - 37ac: d51ef44f msr s3_6_c15_c4_2, x15 - 37b0: d53ef44f mrs x15, s3_6_c15_c4_2 - 37b4: d51ef46f msr s3_6_c15_c4_3, x15 - 37b8: d53ef46f mrs x15, s3_6_c15_c4_3 - 37bc: d51ef48f msr s3_6_c15_c4_4, x15 - 37c0: d53ef48f mrs x15, s3_6_c15_c4_4 - 37c4: d51ef4af msr s3_6_c15_c4_5, x15 - 37c8: d53ef4af mrs x15, s3_6_c15_c4_5 - 37cc: d51ef4cf msr s3_6_c15_c4_6, x15 - 37d0: d53ef4cf mrs x15, s3_6_c15_c4_6 - 37d4: d51ef4ef msr s3_6_c15_c4_7, x15 - 37d8: d53ef4ef mrs x15, s3_6_c15_c4_7 - 37dc: d51ef50f msr s3_6_c15_c5_0, x15 - 37e0: d53ef50f mrs x15, s3_6_c15_c5_0 - 37e4: d51ef52f msr s3_6_c15_c5_1, x15 - 37e8: d53ef52f mrs x15, s3_6_c15_c5_1 - 37ec: d51ef54f msr s3_6_c15_c5_2, x15 - 37f0: d53ef54f mrs x15, s3_6_c15_c5_2 - 37f4: d51ef56f msr s3_6_c15_c5_3, x15 - 37f8: d53ef56f mrs x15, s3_6_c15_c5_3 - 37fc: d51ef58f msr s3_6_c15_c5_4, x15 - 3800: d53ef58f mrs x15, s3_6_c15_c5_4 - 3804: d51ef5af msr s3_6_c15_c5_5, x15 - 3808: d53ef5af mrs x15, s3_6_c15_c5_5 - 380c: d51ef5cf msr s3_6_c15_c5_6, x15 - 3810: d53ef5cf mrs x15, s3_6_c15_c5_6 - 3814: d51ef5ef msr s3_6_c15_c5_7, x15 - 3818: d53ef5ef mrs x15, s3_6_c15_c5_7 - 381c: d51ef60f msr s3_6_c15_c6_0, x15 - 3820: d53ef60f mrs x15, s3_6_c15_c6_0 - 3824: d51ef62f msr s3_6_c15_c6_1, x15 - 3828: d53ef62f mrs x15, s3_6_c15_c6_1 - 382c: d51ef64f msr s3_6_c15_c6_2, x15 - 3830: d53ef64f mrs x15, s3_6_c15_c6_2 - 3834: d51ef66f msr s3_6_c15_c6_3, x15 - 3838: d53ef66f mrs x15, s3_6_c15_c6_3 - 383c: d51ef68f msr s3_6_c15_c6_4, x15 - 3840: d53ef68f mrs x15, s3_6_c15_c6_4 - 3844: d51ef6af msr s3_6_c15_c6_5, x15 - 3848: d53ef6af mrs x15, s3_6_c15_c6_5 - 384c: d51ef6cf msr s3_6_c15_c6_6, x15 - 3850: d53ef6cf mrs x15, s3_6_c15_c6_6 - 3854: d51ef6ef msr s3_6_c15_c6_7, x15 - 3858: d53ef6ef mrs x15, s3_6_c15_c6_7 - 385c: d51ef70f msr s3_6_c15_c7_0, x15 - 3860: d53ef70f mrs x15, s3_6_c15_c7_0 - 3864: d51ef72f msr s3_6_c15_c7_1, x15 - 3868: d53ef72f mrs x15, s3_6_c15_c7_1 - 386c: d51ef74f msr s3_6_c15_c7_2, x15 - 3870: d53ef74f mrs x15, s3_6_c15_c7_2 - 3874: d51ef76f msr s3_6_c15_c7_3, x15 - 3878: d53ef76f mrs x15, s3_6_c15_c7_3 - 387c: d51ef78f msr s3_6_c15_c7_4, x15 - 3880: d53ef78f mrs x15, s3_6_c15_c7_4 - 3884: d51ef7af msr s3_6_c15_c7_5, x15 - 3888: d53ef7af mrs x15, s3_6_c15_c7_5 - 388c: d51ef7cf msr s3_6_c15_c7_6, x15 - 3890: d53ef7cf mrs x15, s3_6_c15_c7_6 - 3894: d51ef7ef msr s3_6_c15_c7_7, x15 - 3898: d53ef7ef mrs x15, s3_6_c15_c7_7 - 389c: d51ef80f msr s3_6_c15_c8_0, x15 - 38a0: d53ef80f mrs x15, s3_6_c15_c8_0 - 38a4: d51ef82f msr s3_6_c15_c8_1, x15 - 38a8: d53ef82f mrs x15, s3_6_c15_c8_1 - 38ac: d51ef84f msr s3_6_c15_c8_2, x15 - 38b0: d53ef84f mrs x15, s3_6_c15_c8_2 - 38b4: d51ef86f msr s3_6_c15_c8_3, x15 - 38b8: d53ef86f mrs x15, s3_6_c15_c8_3 - 38bc: d51ef88f msr s3_6_c15_c8_4, x15 - 38c0: d53ef88f mrs x15, s3_6_c15_c8_4 - 38c4: d51ef8af msr s3_6_c15_c8_5, x15 - 38c8: d53ef8af mrs x15, s3_6_c15_c8_5 - 38cc: d51ef8cf msr s3_6_c15_c8_6, x15 - 38d0: d53ef8cf mrs x15, s3_6_c15_c8_6 - 38d4: d51ef8ef msr s3_6_c15_c8_7, x15 - 38d8: d53ef8ef mrs x15, s3_6_c15_c8_7 - 38dc: d51ef90f msr s3_6_c15_c9_0, x15 - 38e0: d53ef90f mrs x15, s3_6_c15_c9_0 - 38e4: d51ef92f msr s3_6_c15_c9_1, x15 - 38e8: d53ef92f mrs x15, s3_6_c15_c9_1 - 38ec: d51ef94f msr s3_6_c15_c9_2, x15 - 38f0: d53ef94f mrs x15, s3_6_c15_c9_2 - 38f4: d51ef96f msr s3_6_c15_c9_3, x15 - 38f8: d53ef96f mrs x15, s3_6_c15_c9_3 - 38fc: d51ef98f msr s3_6_c15_c9_4, x15 - 3900: d53ef98f mrs x15, s3_6_c15_c9_4 - 3904: d51ef9af msr s3_6_c15_c9_5, x15 - 3908: d53ef9af mrs x15, s3_6_c15_c9_5 - 390c: d51ef9cf msr s3_6_c15_c9_6, x15 - 3910: d53ef9cf mrs x15, s3_6_c15_c9_6 - 3914: d51ef9ef msr s3_6_c15_c9_7, x15 - 3918: d53ef9ef mrs x15, s3_6_c15_c9_7 - 391c: d51efa0f msr s3_6_c15_c10_0, x15 - 3920: d53efa0f mrs x15, s3_6_c15_c10_0 - 3924: d51efa2f msr s3_6_c15_c10_1, x15 - 3928: d53efa2f mrs x15, s3_6_c15_c10_1 - 392c: d51efa4f msr s3_6_c15_c10_2, x15 - 3930: d53efa4f mrs x15, s3_6_c15_c10_2 - 3934: d51efa6f msr s3_6_c15_c10_3, x15 - 3938: d53efa6f mrs x15, s3_6_c15_c10_3 - 393c: d51efa8f msr s3_6_c15_c10_4, x15 - 3940: d53efa8f mrs x15, s3_6_c15_c10_4 - 3944: d51efaaf msr s3_6_c15_c10_5, x15 - 3948: d53efaaf mrs x15, s3_6_c15_c10_5 - 394c: d51efacf msr s3_6_c15_c10_6, x15 - 3950: d53efacf mrs x15, s3_6_c15_c10_6 - 3954: d51efaef msr s3_6_c15_c10_7, x15 - 3958: d53efaef mrs x15, s3_6_c15_c10_7 - 395c: d51efb0f msr s3_6_c15_c11_0, x15 - 3960: d53efb0f mrs x15, s3_6_c15_c11_0 - 3964: d51efb2f msr s3_6_c15_c11_1, x15 - 3968: d53efb2f mrs x15, s3_6_c15_c11_1 - 396c: d51efb4f msr s3_6_c15_c11_2, x15 - 3970: d53efb4f mrs x15, s3_6_c15_c11_2 - 3974: d51efb6f msr s3_6_c15_c11_3, x15 - 3978: d53efb6f mrs x15, s3_6_c15_c11_3 - 397c: d51efb8f msr s3_6_c15_c11_4, x15 - 3980: d53efb8f mrs x15, s3_6_c15_c11_4 - 3984: d51efbaf msr s3_6_c15_c11_5, x15 - 3988: d53efbaf mrs x15, s3_6_c15_c11_5 - 398c: d51efbcf msr s3_6_c15_c11_6, x15 - 3990: d53efbcf mrs x15, s3_6_c15_c11_6 - 3994: d51efbef msr s3_6_c15_c11_7, x15 - 3998: d53efbef mrs x15, s3_6_c15_c11_7 - 399c: d51efc0f msr s3_6_c15_c12_0, x15 - 39a0: d53efc0f mrs x15, s3_6_c15_c12_0 - 39a4: d51efc2f msr s3_6_c15_c12_1, x15 - 39a8: d53efc2f mrs x15, s3_6_c15_c12_1 - 39ac: d51efc4f msr s3_6_c15_c12_2, x15 - 39b0: d53efc4f mrs x15, s3_6_c15_c12_2 - 39b4: d51efc6f msr s3_6_c15_c12_3, x15 - 39b8: d53efc6f mrs x15, s3_6_c15_c12_3 - 39bc: d51efc8f msr s3_6_c15_c12_4, x15 - 39c0: d53efc8f mrs x15, s3_6_c15_c12_4 - 39c4: d51efcaf msr s3_6_c15_c12_5, x15 - 39c8: d53efcaf mrs x15, s3_6_c15_c12_5 - 39cc: d51efccf msr s3_6_c15_c12_6, x15 - 39d0: d53efccf mrs x15, s3_6_c15_c12_6 - 39d4: d51efcef msr s3_6_c15_c12_7, x15 - 39d8: d53efcef mrs x15, s3_6_c15_c12_7 - 39dc: d51efd0f msr s3_6_c15_c13_0, x15 - 39e0: d53efd0f mrs x15, s3_6_c15_c13_0 - 39e4: d51efd2f msr s3_6_c15_c13_1, x15 - 39e8: d53efd2f mrs x15, s3_6_c15_c13_1 - 39ec: d51efd4f msr s3_6_c15_c13_2, x15 - 39f0: d53efd4f mrs x15, s3_6_c15_c13_2 - 39f4: d51efd6f msr s3_6_c15_c13_3, x15 - 39f8: d53efd6f mrs x15, s3_6_c15_c13_3 - 39fc: d51efd8f msr s3_6_c15_c13_4, x15 - 3a00: d53efd8f mrs x15, s3_6_c15_c13_4 - 3a04: d51efdaf msr s3_6_c15_c13_5, x15 - 3a08: d53efdaf mrs x15, s3_6_c15_c13_5 - 3a0c: d51efdcf msr s3_6_c15_c13_6, x15 - 3a10: d53efdcf mrs x15, s3_6_c15_c13_6 - 3a14: d51efdef msr s3_6_c15_c13_7, x15 - 3a18: d53efdef mrs x15, s3_6_c15_c13_7 - 3a1c: d51efe0f msr s3_6_c15_c14_0, x15 - 3a20: d53efe0f mrs x15, s3_6_c15_c14_0 - 3a24: d51efe2f msr s3_6_c15_c14_1, x15 - 3a28: d53efe2f mrs x15, s3_6_c15_c14_1 - 3a2c: d51efe4f msr s3_6_c15_c14_2, x15 - 3a30: d53efe4f mrs x15, s3_6_c15_c14_2 - 3a34: d51efe6f msr s3_6_c15_c14_3, x15 - 3a38: d53efe6f mrs x15, s3_6_c15_c14_3 - 3a3c: d51efe8f msr s3_6_c15_c14_4, x15 - 3a40: d53efe8f mrs x15, s3_6_c15_c14_4 - 3a44: d51efeaf msr s3_6_c15_c14_5, x15 - 3a48: d53efeaf mrs x15, s3_6_c15_c14_5 - 3a4c: d51efecf msr s3_6_c15_c14_6, x15 - 3a50: d53efecf mrs x15, s3_6_c15_c14_6 - 3a54: d51efeef msr s3_6_c15_c14_7, x15 - 3a58: d53efeef mrs x15, s3_6_c15_c14_7 - 3a5c: d51eff0f msr s3_6_c15_c15_0, x15 - 3a60: d53eff0f mrs x15, s3_6_c15_c15_0 - 3a64: d51eff2f msr s3_6_c15_c15_1, x15 - 3a68: d53eff2f mrs x15, s3_6_c15_c15_1 - 3a6c: d51eff4f msr s3_6_c15_c15_2, x15 - 3a70: d53eff4f mrs x15, s3_6_c15_c15_2 - 3a74: d51eff6f msr s3_6_c15_c15_3, x15 - 3a78: d53eff6f mrs x15, s3_6_c15_c15_3 - 3a7c: d51eff8f msr s3_6_c15_c15_4, x15 - 3a80: d53eff8f mrs x15, s3_6_c15_c15_4 - 3a84: d51effaf msr s3_6_c15_c15_5, x15 - 3a88: d53effaf mrs x15, s3_6_c15_c15_5 - 3a8c: d51effcf msr s3_6_c15_c15_6, x15 - 3a90: d53effcf mrs x15, s3_6_c15_c15_6 - 3a94: d51effef msr s3_6_c15_c15_7, x15 - 3a98: d53effef mrs x15, s3_6_c15_c15_7 - 3a9c: d51fb00f msr s3_7_c11_c0_0, x15 - 3aa0: d53fb00f mrs x15, s3_7_c11_c0_0 - 3aa4: d51fb02f msr s3_7_c11_c0_1, x15 - 3aa8: d53fb02f mrs x15, s3_7_c11_c0_1 - 3aac: d51fb04f msr s3_7_c11_c0_2, x15 - 3ab0: d53fb04f mrs x15, s3_7_c11_c0_2 - 3ab4: d51fb06f msr s3_7_c11_c0_3, x15 - 3ab8: d53fb06f mrs x15, s3_7_c11_c0_3 - 3abc: d51fb08f msr s3_7_c11_c0_4, x15 - 3ac0: d53fb08f mrs x15, s3_7_c11_c0_4 - 3ac4: d51fb0af msr s3_7_c11_c0_5, x15 - 3ac8: d53fb0af mrs x15, s3_7_c11_c0_5 - 3acc: d51fb0cf msr s3_7_c11_c0_6, x15 - 3ad0: d53fb0cf mrs x15, s3_7_c11_c0_6 - 3ad4: d51fb0ef msr s3_7_c11_c0_7, x15 - 3ad8: d53fb0ef mrs x15, s3_7_c11_c0_7 - 3adc: d51fb10f msr s3_7_c11_c1_0, x15 - 3ae0: d53fb10f mrs x15, s3_7_c11_c1_0 - 3ae4: d51fb12f msr s3_7_c11_c1_1, x15 - 3ae8: d53fb12f mrs x15, s3_7_c11_c1_1 - 3aec: d51fb14f msr s3_7_c11_c1_2, x15 - 3af0: d53fb14f mrs x15, s3_7_c11_c1_2 - 3af4: d51fb16f msr s3_7_c11_c1_3, x15 - 3af8: d53fb16f mrs x15, s3_7_c11_c1_3 - 3afc: d51fb18f msr s3_7_c11_c1_4, x15 - 3b00: d53fb18f mrs x15, s3_7_c11_c1_4 - 3b04: d51fb1af msr s3_7_c11_c1_5, x15 - 3b08: d53fb1af mrs x15, s3_7_c11_c1_5 - 3b0c: d51fb1cf msr s3_7_c11_c1_6, x15 - 3b10: d53fb1cf mrs x15, s3_7_c11_c1_6 - 3b14: d51fb1ef msr s3_7_c11_c1_7, x15 - 3b18: d53fb1ef mrs x15, s3_7_c11_c1_7 - 3b1c: d51fb20f msr s3_7_c11_c2_0, x15 - 3b20: d53fb20f mrs x15, s3_7_c11_c2_0 - 3b24: d51fb22f msr s3_7_c11_c2_1, x15 - 3b28: d53fb22f mrs x15, s3_7_c11_c2_1 - 3b2c: d51fb24f msr s3_7_c11_c2_2, x15 - 3b30: d53fb24f mrs x15, s3_7_c11_c2_2 - 3b34: d51fb26f msr s3_7_c11_c2_3, x15 - 3b38: d53fb26f mrs x15, s3_7_c11_c2_3 - 3b3c: d51fb28f msr s3_7_c11_c2_4, x15 - 3b40: d53fb28f mrs x15, s3_7_c11_c2_4 - 3b44: d51fb2af msr s3_7_c11_c2_5, x15 - 3b48: d53fb2af mrs x15, s3_7_c11_c2_5 - 3b4c: d51fb2cf msr s3_7_c11_c2_6, x15 - 3b50: d53fb2cf mrs x15, s3_7_c11_c2_6 - 3b54: d51fb2ef msr s3_7_c11_c2_7, x15 - 3b58: d53fb2ef mrs x15, s3_7_c11_c2_7 - 3b5c: d51fb30f msr s3_7_c11_c3_0, x15 - 3b60: d53fb30f mrs x15, s3_7_c11_c3_0 - 3b64: d51fb32f msr s3_7_c11_c3_1, x15 - 3b68: d53fb32f mrs x15, s3_7_c11_c3_1 - 3b6c: d51fb34f msr s3_7_c11_c3_2, x15 - 3b70: d53fb34f mrs x15, s3_7_c11_c3_2 - 3b74: d51fb36f msr s3_7_c11_c3_3, x15 - 3b78: d53fb36f mrs x15, s3_7_c11_c3_3 - 3b7c: d51fb38f msr s3_7_c11_c3_4, x15 - 3b80: d53fb38f mrs x15, s3_7_c11_c3_4 - 3b84: d51fb3af msr s3_7_c11_c3_5, x15 - 3b88: d53fb3af mrs x15, s3_7_c11_c3_5 - 3b8c: d51fb3cf msr s3_7_c11_c3_6, x15 - 3b90: d53fb3cf mrs x15, s3_7_c11_c3_6 - 3b94: d51fb3ef msr s3_7_c11_c3_7, x15 - 3b98: d53fb3ef mrs x15, s3_7_c11_c3_7 - 3b9c: d51fb40f msr s3_7_c11_c4_0, x15 - 3ba0: d53fb40f mrs x15, s3_7_c11_c4_0 - 3ba4: d51fb42f msr s3_7_c11_c4_1, x15 - 3ba8: d53fb42f mrs x15, s3_7_c11_c4_1 - 3bac: d51fb44f msr s3_7_c11_c4_2, x15 - 3bb0: d53fb44f mrs x15, s3_7_c11_c4_2 - 3bb4: d51fb46f msr s3_7_c11_c4_3, x15 - 3bb8: d53fb46f mrs x15, s3_7_c11_c4_3 - 3bbc: d51fb48f msr s3_7_c11_c4_4, x15 - 3bc0: d53fb48f mrs x15, s3_7_c11_c4_4 - 3bc4: d51fb4af msr s3_7_c11_c4_5, x15 - 3bc8: d53fb4af mrs x15, s3_7_c11_c4_5 - 3bcc: d51fb4cf msr s3_7_c11_c4_6, x15 - 3bd0: d53fb4cf mrs x15, s3_7_c11_c4_6 - 3bd4: d51fb4ef msr s3_7_c11_c4_7, x15 - 3bd8: d53fb4ef mrs x15, s3_7_c11_c4_7 - 3bdc: d51fb50f msr s3_7_c11_c5_0, x15 - 3be0: d53fb50f mrs x15, s3_7_c11_c5_0 - 3be4: d51fb52f msr s3_7_c11_c5_1, x15 - 3be8: d53fb52f mrs x15, s3_7_c11_c5_1 - 3bec: d51fb54f msr s3_7_c11_c5_2, x15 - 3bf0: d53fb54f mrs x15, s3_7_c11_c5_2 - 3bf4: d51fb56f msr s3_7_c11_c5_3, x15 - 3bf8: d53fb56f mrs x15, s3_7_c11_c5_3 - 3bfc: d51fb58f msr s3_7_c11_c5_4, x15 - 3c00: d53fb58f mrs x15, s3_7_c11_c5_4 - 3c04: d51fb5af msr s3_7_c11_c5_5, x15 - 3c08: d53fb5af mrs x15, s3_7_c11_c5_5 - 3c0c: d51fb5cf msr s3_7_c11_c5_6, x15 - 3c10: d53fb5cf mrs x15, s3_7_c11_c5_6 - 3c14: d51fb5ef msr s3_7_c11_c5_7, x15 - 3c18: d53fb5ef mrs x15, s3_7_c11_c5_7 - 3c1c: d51fb60f msr s3_7_c11_c6_0, x15 - 3c20: d53fb60f mrs x15, s3_7_c11_c6_0 - 3c24: d51fb62f msr s3_7_c11_c6_1, x15 - 3c28: d53fb62f mrs x15, s3_7_c11_c6_1 - 3c2c: d51fb64f msr s3_7_c11_c6_2, x15 - 3c30: d53fb64f mrs x15, s3_7_c11_c6_2 - 3c34: d51fb66f msr s3_7_c11_c6_3, x15 - 3c38: d53fb66f mrs x15, s3_7_c11_c6_3 - 3c3c: d51fb68f msr s3_7_c11_c6_4, x15 - 3c40: d53fb68f mrs x15, s3_7_c11_c6_4 - 3c44: d51fb6af msr s3_7_c11_c6_5, x15 - 3c48: d53fb6af mrs x15, s3_7_c11_c6_5 - 3c4c: d51fb6cf msr s3_7_c11_c6_6, x15 - 3c50: d53fb6cf mrs x15, s3_7_c11_c6_6 - 3c54: d51fb6ef msr s3_7_c11_c6_7, x15 - 3c58: d53fb6ef mrs x15, s3_7_c11_c6_7 - 3c5c: d51fb70f msr s3_7_c11_c7_0, x15 - 3c60: d53fb70f mrs x15, s3_7_c11_c7_0 - 3c64: d51fb72f msr s3_7_c11_c7_1, x15 - 3c68: d53fb72f mrs x15, s3_7_c11_c7_1 - 3c6c: d51fb74f msr s3_7_c11_c7_2, x15 - 3c70: d53fb74f mrs x15, s3_7_c11_c7_2 - 3c74: d51fb76f msr s3_7_c11_c7_3, x15 - 3c78: d53fb76f mrs x15, s3_7_c11_c7_3 - 3c7c: d51fb78f msr s3_7_c11_c7_4, x15 - 3c80: d53fb78f mrs x15, s3_7_c11_c7_4 - 3c84: d51fb7af msr s3_7_c11_c7_5, x15 - 3c88: d53fb7af mrs x15, s3_7_c11_c7_5 - 3c8c: d51fb7cf msr s3_7_c11_c7_6, x15 - 3c90: d53fb7cf mrs x15, s3_7_c11_c7_6 - 3c94: d51fb7ef msr s3_7_c11_c7_7, x15 - 3c98: d53fb7ef mrs x15, s3_7_c11_c7_7 - 3c9c: d51fb80f msr s3_7_c11_c8_0, x15 - 3ca0: d53fb80f mrs x15, s3_7_c11_c8_0 - 3ca4: d51fb82f msr s3_7_c11_c8_1, x15 - 3ca8: d53fb82f mrs x15, s3_7_c11_c8_1 - 3cac: d51fb84f msr s3_7_c11_c8_2, x15 - 3cb0: d53fb84f mrs x15, s3_7_c11_c8_2 - 3cb4: d51fb86f msr s3_7_c11_c8_3, x15 - 3cb8: d53fb86f mrs x15, s3_7_c11_c8_3 - 3cbc: d51fb88f msr s3_7_c11_c8_4, x15 - 3cc0: d53fb88f mrs x15, s3_7_c11_c8_4 - 3cc4: d51fb8af msr s3_7_c11_c8_5, x15 - 3cc8: d53fb8af mrs x15, s3_7_c11_c8_5 - 3ccc: d51fb8cf msr s3_7_c11_c8_6, x15 - 3cd0: d53fb8cf mrs x15, s3_7_c11_c8_6 - 3cd4: d51fb8ef msr s3_7_c11_c8_7, x15 - 3cd8: d53fb8ef mrs x15, s3_7_c11_c8_7 - 3cdc: d51fb90f msr s3_7_c11_c9_0, x15 - 3ce0: d53fb90f mrs x15, s3_7_c11_c9_0 - 3ce4: d51fb92f msr s3_7_c11_c9_1, x15 - 3ce8: d53fb92f mrs x15, s3_7_c11_c9_1 - 3cec: d51fb94f msr s3_7_c11_c9_2, x15 - 3cf0: d53fb94f mrs x15, s3_7_c11_c9_2 - 3cf4: d51fb96f msr s3_7_c11_c9_3, x15 - 3cf8: d53fb96f mrs x15, s3_7_c11_c9_3 - 3cfc: d51fb98f msr s3_7_c11_c9_4, x15 - 3d00: d53fb98f mrs x15, s3_7_c11_c9_4 - 3d04: d51fb9af msr s3_7_c11_c9_5, x15 - 3d08: d53fb9af mrs x15, s3_7_c11_c9_5 - 3d0c: d51fb9cf msr s3_7_c11_c9_6, x15 - 3d10: d53fb9cf mrs x15, s3_7_c11_c9_6 - 3d14: d51fb9ef msr s3_7_c11_c9_7, x15 - 3d18: d53fb9ef mrs x15, s3_7_c11_c9_7 - 3d1c: d51fba0f msr s3_7_c11_c10_0, x15 - 3d20: d53fba0f mrs x15, s3_7_c11_c10_0 - 3d24: d51fba2f msr s3_7_c11_c10_1, x15 - 3d28: d53fba2f mrs x15, s3_7_c11_c10_1 - 3d2c: d51fba4f msr s3_7_c11_c10_2, x15 - 3d30: d53fba4f mrs x15, s3_7_c11_c10_2 - 3d34: d51fba6f msr s3_7_c11_c10_3, x15 - 3d38: d53fba6f mrs x15, s3_7_c11_c10_3 - 3d3c: d51fba8f msr s3_7_c11_c10_4, x15 - 3d40: d53fba8f mrs x15, s3_7_c11_c10_4 - 3d44: d51fbaaf msr s3_7_c11_c10_5, x15 - 3d48: d53fbaaf mrs x15, s3_7_c11_c10_5 - 3d4c: d51fbacf msr s3_7_c11_c10_6, x15 - 3d50: d53fbacf mrs x15, s3_7_c11_c10_6 - 3d54: d51fbaef msr s3_7_c11_c10_7, x15 - 3d58: d53fbaef mrs x15, s3_7_c11_c10_7 - 3d5c: d51fbb0f msr s3_7_c11_c11_0, x15 - 3d60: d53fbb0f mrs x15, s3_7_c11_c11_0 - 3d64: d51fbb2f msr s3_7_c11_c11_1, x15 - 3d68: d53fbb2f mrs x15, s3_7_c11_c11_1 - 3d6c: d51fbb4f msr s3_7_c11_c11_2, x15 - 3d70: d53fbb4f mrs x15, s3_7_c11_c11_2 - 3d74: d51fbb6f msr s3_7_c11_c11_3, x15 - 3d78: d53fbb6f mrs x15, s3_7_c11_c11_3 - 3d7c: d51fbb8f msr s3_7_c11_c11_4, x15 - 3d80: d53fbb8f mrs x15, s3_7_c11_c11_4 - 3d84: d51fbbaf msr s3_7_c11_c11_5, x15 - 3d88: d53fbbaf mrs x15, s3_7_c11_c11_5 - 3d8c: d51fbbcf msr s3_7_c11_c11_6, x15 - 3d90: d53fbbcf mrs x15, s3_7_c11_c11_6 - 3d94: d51fbbef msr s3_7_c11_c11_7, x15 - 3d98: d53fbbef mrs x15, s3_7_c11_c11_7 - 3d9c: d51fbc0f msr s3_7_c11_c12_0, x15 - 3da0: d53fbc0f mrs x15, s3_7_c11_c12_0 - 3da4: d51fbc2f msr s3_7_c11_c12_1, x15 - 3da8: d53fbc2f mrs x15, s3_7_c11_c12_1 - 3dac: d51fbc4f msr s3_7_c11_c12_2, x15 - 3db0: d53fbc4f mrs x15, s3_7_c11_c12_2 - 3db4: d51fbc6f msr s3_7_c11_c12_3, x15 - 3db8: d53fbc6f mrs x15, s3_7_c11_c12_3 - 3dbc: d51fbc8f msr s3_7_c11_c12_4, x15 - 3dc0: d53fbc8f mrs x15, s3_7_c11_c12_4 - 3dc4: d51fbcaf msr s3_7_c11_c12_5, x15 - 3dc8: d53fbcaf mrs x15, s3_7_c11_c12_5 - 3dcc: d51fbccf msr s3_7_c11_c12_6, x15 - 3dd0: d53fbccf mrs x15, s3_7_c11_c12_6 - 3dd4: d51fbcef msr s3_7_c11_c12_7, x15 - 3dd8: d53fbcef mrs x15, s3_7_c11_c12_7 - 3ddc: d51fbd0f msr s3_7_c11_c13_0, x15 - 3de0: d53fbd0f mrs x15, s3_7_c11_c13_0 - 3de4: d51fbd2f msr s3_7_c11_c13_1, x15 - 3de8: d53fbd2f mrs x15, s3_7_c11_c13_1 - 3dec: d51fbd4f msr s3_7_c11_c13_2, x15 - 3df0: d53fbd4f mrs x15, s3_7_c11_c13_2 - 3df4: d51fbd6f msr s3_7_c11_c13_3, x15 - 3df8: d53fbd6f mrs x15, s3_7_c11_c13_3 - 3dfc: d51fbd8f msr s3_7_c11_c13_4, x15 - 3e00: d53fbd8f mrs x15, s3_7_c11_c13_4 - 3e04: d51fbdaf msr s3_7_c11_c13_5, x15 - 3e08: d53fbdaf mrs x15, s3_7_c11_c13_5 - 3e0c: d51fbdcf msr s3_7_c11_c13_6, x15 - 3e10: d53fbdcf mrs x15, s3_7_c11_c13_6 - 3e14: d51fbdef msr s3_7_c11_c13_7, x15 - 3e18: d53fbdef mrs x15, s3_7_c11_c13_7 - 3e1c: d51fbe0f msr s3_7_c11_c14_0, x15 - 3e20: d53fbe0f mrs x15, s3_7_c11_c14_0 - 3e24: d51fbe2f msr s3_7_c11_c14_1, x15 - 3e28: d53fbe2f mrs x15, s3_7_c11_c14_1 - 3e2c: d51fbe4f msr s3_7_c11_c14_2, x15 - 3e30: d53fbe4f mrs x15, s3_7_c11_c14_2 - 3e34: d51fbe6f msr s3_7_c11_c14_3, x15 - 3e38: d53fbe6f mrs x15, s3_7_c11_c14_3 - 3e3c: d51fbe8f msr s3_7_c11_c14_4, x15 - 3e40: d53fbe8f mrs x15, s3_7_c11_c14_4 - 3e44: d51fbeaf msr s3_7_c11_c14_5, x15 - 3e48: d53fbeaf mrs x15, s3_7_c11_c14_5 - 3e4c: d51fbecf msr s3_7_c11_c14_6, x15 - 3e50: d53fbecf mrs x15, s3_7_c11_c14_6 - 3e54: d51fbeef msr s3_7_c11_c14_7, x15 - 3e58: d53fbeef mrs x15, s3_7_c11_c14_7 - 3e5c: d51fbf0f msr s3_7_c11_c15_0, x15 - 3e60: d53fbf0f mrs x15, s3_7_c11_c15_0 - 3e64: d51fbf2f msr s3_7_c11_c15_1, x15 - 3e68: d53fbf2f mrs x15, s3_7_c11_c15_1 - 3e6c: d51fbf4f msr s3_7_c11_c15_2, x15 - 3e70: d53fbf4f mrs x15, s3_7_c11_c15_2 - 3e74: d51fbf6f msr s3_7_c11_c15_3, x15 - 3e78: d53fbf6f mrs x15, s3_7_c11_c15_3 - 3e7c: d51fbf8f msr s3_7_c11_c15_4, x15 - 3e80: d53fbf8f mrs x15, s3_7_c11_c15_4 - 3e84: d51fbfaf msr s3_7_c11_c15_5, x15 - 3e88: d53fbfaf mrs x15, s3_7_c11_c15_5 - 3e8c: d51fbfcf msr s3_7_c11_c15_6, x15 - 3e90: d53fbfcf mrs x15, s3_7_c11_c15_6 - 3e94: d51fbfef msr s3_7_c11_c15_7, x15 - 3e98: d53fbfef mrs x15, s3_7_c11_c15_7 - 3e9c: d51ff00f msr s3_7_c15_c0_0, x15 - 3ea0: d53ff00f mrs x15, s3_7_c15_c0_0 - 3ea4: d51ff02f msr s3_7_c15_c0_1, x15 - 3ea8: d53ff02f mrs x15, s3_7_c15_c0_1 - 3eac: d51ff04f msr s3_7_c15_c0_2, x15 - 3eb0: d53ff04f mrs x15, s3_7_c15_c0_2 - 3eb4: d51ff06f msr s3_7_c15_c0_3, x15 - 3eb8: d53ff06f mrs x15, s3_7_c15_c0_3 - 3ebc: d51ff08f msr s3_7_c15_c0_4, x15 - 3ec0: d53ff08f mrs x15, s3_7_c15_c0_4 - 3ec4: d51ff0af msr s3_7_c15_c0_5, x15 - 3ec8: d53ff0af mrs x15, s3_7_c15_c0_5 - 3ecc: d51ff0cf msr s3_7_c15_c0_6, x15 - 3ed0: d53ff0cf mrs x15, s3_7_c15_c0_6 - 3ed4: d51ff0ef msr s3_7_c15_c0_7, x15 - 3ed8: d53ff0ef mrs x15, s3_7_c15_c0_7 - 3edc: d51ff10f msr s3_7_c15_c1_0, x15 - 3ee0: d53ff10f mrs x15, s3_7_c15_c1_0 - 3ee4: d51ff12f msr s3_7_c15_c1_1, x15 - 3ee8: d53ff12f mrs x15, s3_7_c15_c1_1 - 3eec: d51ff14f msr s3_7_c15_c1_2, x15 - 3ef0: d53ff14f mrs x15, s3_7_c15_c1_2 - 3ef4: d51ff16f msr s3_7_c15_c1_3, x15 - 3ef8: d53ff16f mrs x15, s3_7_c15_c1_3 - 3efc: d51ff18f msr s3_7_c15_c1_4, x15 - 3f00: d53ff18f mrs x15, s3_7_c15_c1_4 - 3f04: d51ff1af msr s3_7_c15_c1_5, x15 - 3f08: d53ff1af mrs x15, s3_7_c15_c1_5 - 3f0c: d51ff1cf msr s3_7_c15_c1_6, x15 - 3f10: d53ff1cf mrs x15, s3_7_c15_c1_6 - 3f14: d51ff1ef msr s3_7_c15_c1_7, x15 - 3f18: d53ff1ef mrs x15, s3_7_c15_c1_7 - 3f1c: d51ff20f msr s3_7_c15_c2_0, x15 - 3f20: d53ff20f mrs x15, s3_7_c15_c2_0 - 3f24: d51ff22f msr s3_7_c15_c2_1, x15 - 3f28: d53ff22f mrs x15, s3_7_c15_c2_1 - 3f2c: d51ff24f msr s3_7_c15_c2_2, x15 - 3f30: d53ff24f mrs x15, s3_7_c15_c2_2 - 3f34: d51ff26f msr s3_7_c15_c2_3, x15 - 3f38: d53ff26f mrs x15, s3_7_c15_c2_3 - 3f3c: d51ff28f msr s3_7_c15_c2_4, x15 - 3f40: d53ff28f mrs x15, s3_7_c15_c2_4 - 3f44: d51ff2af msr s3_7_c15_c2_5, x15 - 3f48: d53ff2af mrs x15, s3_7_c15_c2_5 - 3f4c: d51ff2cf msr s3_7_c15_c2_6, x15 - 3f50: d53ff2cf mrs x15, s3_7_c15_c2_6 - 3f54: d51ff2ef msr s3_7_c15_c2_7, x15 - 3f58: d53ff2ef mrs x15, s3_7_c15_c2_7 - 3f5c: d51ff30f msr s3_7_c15_c3_0, x15 - 3f60: d53ff30f mrs x15, s3_7_c15_c3_0 - 3f64: d51ff32f msr s3_7_c15_c3_1, x15 - 3f68: d53ff32f mrs x15, s3_7_c15_c3_1 - 3f6c: d51ff34f msr s3_7_c15_c3_2, x15 - 3f70: d53ff34f mrs x15, s3_7_c15_c3_2 - 3f74: d51ff36f msr s3_7_c15_c3_3, x15 - 3f78: d53ff36f mrs x15, s3_7_c15_c3_3 - 3f7c: d51ff38f msr s3_7_c15_c3_4, x15 - 3f80: d53ff38f mrs x15, s3_7_c15_c3_4 - 3f84: d51ff3af msr s3_7_c15_c3_5, x15 - 3f88: d53ff3af mrs x15, s3_7_c15_c3_5 - 3f8c: d51ff3cf msr s3_7_c15_c3_6, x15 - 3f90: d53ff3cf mrs x15, s3_7_c15_c3_6 - 3f94: d51ff3ef msr s3_7_c15_c3_7, x15 - 3f98: d53ff3ef mrs x15, s3_7_c15_c3_7 - 3f9c: d51ff40f msr s3_7_c15_c4_0, x15 - 3fa0: d53ff40f mrs x15, s3_7_c15_c4_0 - 3fa4: d51ff42f msr s3_7_c15_c4_1, x15 - 3fa8: d53ff42f mrs x15, s3_7_c15_c4_1 - 3fac: d51ff44f msr s3_7_c15_c4_2, x15 - 3fb0: d53ff44f mrs x15, s3_7_c15_c4_2 - 3fb4: d51ff46f msr s3_7_c15_c4_3, x15 - 3fb8: d53ff46f mrs x15, s3_7_c15_c4_3 - 3fbc: d51ff48f msr s3_7_c15_c4_4, x15 - 3fc0: d53ff48f mrs x15, s3_7_c15_c4_4 - 3fc4: d51ff4af msr s3_7_c15_c4_5, x15 - 3fc8: d53ff4af mrs x15, s3_7_c15_c4_5 - 3fcc: d51ff4cf msr s3_7_c15_c4_6, x15 - 3fd0: d53ff4cf mrs x15, s3_7_c15_c4_6 - 3fd4: d51ff4ef msr s3_7_c15_c4_7, x15 - 3fd8: d53ff4ef mrs x15, s3_7_c15_c4_7 - 3fdc: d51ff50f msr s3_7_c15_c5_0, x15 - 3fe0: d53ff50f mrs x15, s3_7_c15_c5_0 - 3fe4: d51ff52f msr s3_7_c15_c5_1, x15 - 3fe8: d53ff52f mrs x15, s3_7_c15_c5_1 - 3fec: d51ff54f msr s3_7_c15_c5_2, x15 - 3ff0: d53ff54f mrs x15, s3_7_c15_c5_2 - 3ff4: d51ff56f msr s3_7_c15_c5_3, x15 - 3ff8: d53ff56f mrs x15, s3_7_c15_c5_3 - 3ffc: d51ff58f msr s3_7_c15_c5_4, x15 - 4000: d53ff58f mrs x15, s3_7_c15_c5_4 - 4004: d51ff5af msr s3_7_c15_c5_5, x15 - 4008: d53ff5af mrs x15, s3_7_c15_c5_5 - 400c: d51ff5cf msr s3_7_c15_c5_6, x15 - 4010: d53ff5cf mrs x15, s3_7_c15_c5_6 - 4014: d51ff5ef msr s3_7_c15_c5_7, x15 - 4018: d53ff5ef mrs x15, s3_7_c15_c5_7 - 401c: d51ff60f msr s3_7_c15_c6_0, x15 - 4020: d53ff60f mrs x15, s3_7_c15_c6_0 - 4024: d51ff62f msr s3_7_c15_c6_1, x15 - 4028: d53ff62f mrs x15, s3_7_c15_c6_1 - 402c: d51ff64f msr s3_7_c15_c6_2, x15 - 4030: d53ff64f mrs x15, s3_7_c15_c6_2 - 4034: d51ff66f msr s3_7_c15_c6_3, x15 - 4038: d53ff66f mrs x15, s3_7_c15_c6_3 - 403c: d51ff68f msr s3_7_c15_c6_4, x15 - 4040: d53ff68f mrs x15, s3_7_c15_c6_4 - 4044: d51ff6af msr s3_7_c15_c6_5, x15 - 4048: d53ff6af mrs x15, s3_7_c15_c6_5 - 404c: d51ff6cf msr s3_7_c15_c6_6, x15 - 4050: d53ff6cf mrs x15, s3_7_c15_c6_6 - 4054: d51ff6ef msr s3_7_c15_c6_7, x15 - 4058: d53ff6ef mrs x15, s3_7_c15_c6_7 - 405c: d51ff70f msr s3_7_c15_c7_0, x15 - 4060: d53ff70f mrs x15, s3_7_c15_c7_0 - 4064: d51ff72f msr s3_7_c15_c7_1, x15 - 4068: d53ff72f mrs x15, s3_7_c15_c7_1 - 406c: d51ff74f msr s3_7_c15_c7_2, x15 - 4070: d53ff74f mrs x15, s3_7_c15_c7_2 - 4074: d51ff76f msr s3_7_c15_c7_3, x15 - 4078: d53ff76f mrs x15, s3_7_c15_c7_3 - 407c: d51ff78f msr s3_7_c15_c7_4, x15 - 4080: d53ff78f mrs x15, s3_7_c15_c7_4 - 4084: d51ff7af msr s3_7_c15_c7_5, x15 - 4088: d53ff7af mrs x15, s3_7_c15_c7_5 - 408c: d51ff7cf msr s3_7_c15_c7_6, x15 - 4090: d53ff7cf mrs x15, s3_7_c15_c7_6 - 4094: d51ff7ef msr s3_7_c15_c7_7, x15 - 4098: d53ff7ef mrs x15, s3_7_c15_c7_7 - 409c: d51ff80f msr s3_7_c15_c8_0, x15 - 40a0: d53ff80f mrs x15, s3_7_c15_c8_0 - 40a4: d51ff82f msr s3_7_c15_c8_1, x15 - 40a8: d53ff82f mrs x15, s3_7_c15_c8_1 - 40ac: d51ff84f msr s3_7_c15_c8_2, x15 - 40b0: d53ff84f mrs x15, s3_7_c15_c8_2 - 40b4: d51ff86f msr s3_7_c15_c8_3, x15 - 40b8: d53ff86f mrs x15, s3_7_c15_c8_3 - 40bc: d51ff88f msr s3_7_c15_c8_4, x15 - 40c0: d53ff88f mrs x15, s3_7_c15_c8_4 - 40c4: d51ff8af msr s3_7_c15_c8_5, x15 - 40c8: d53ff8af mrs x15, s3_7_c15_c8_5 - 40cc: d51ff8cf msr s3_7_c15_c8_6, x15 - 40d0: d53ff8cf mrs x15, s3_7_c15_c8_6 - 40d4: d51ff8ef msr s3_7_c15_c8_7, x15 - 40d8: d53ff8ef mrs x15, s3_7_c15_c8_7 - 40dc: d51ff90f msr s3_7_c15_c9_0, x15 - 40e0: d53ff90f mrs x15, s3_7_c15_c9_0 - 40e4: d51ff92f msr s3_7_c15_c9_1, x15 - 40e8: d53ff92f mrs x15, s3_7_c15_c9_1 - 40ec: d51ff94f msr s3_7_c15_c9_2, x15 - 40f0: d53ff94f mrs x15, s3_7_c15_c9_2 - 40f4: d51ff96f msr s3_7_c15_c9_3, x15 - 40f8: d53ff96f mrs x15, s3_7_c15_c9_3 - 40fc: d51ff98f msr s3_7_c15_c9_4, x15 - 4100: d53ff98f mrs x15, s3_7_c15_c9_4 - 4104: d51ff9af msr s3_7_c15_c9_5, x15 - 4108: d53ff9af mrs x15, s3_7_c15_c9_5 - 410c: d51ff9cf msr s3_7_c15_c9_6, x15 - 4110: d53ff9cf mrs x15, s3_7_c15_c9_6 - 4114: d51ff9ef msr s3_7_c15_c9_7, x15 - 4118: d53ff9ef mrs x15, s3_7_c15_c9_7 - 411c: d51ffa0f msr s3_7_c15_c10_0, x15 - 4120: d53ffa0f mrs x15, s3_7_c15_c10_0 - 4124: d51ffa2f msr s3_7_c15_c10_1, x15 - 4128: d53ffa2f mrs x15, s3_7_c15_c10_1 - 412c: d51ffa4f msr s3_7_c15_c10_2, x15 - 4130: d53ffa4f mrs x15, s3_7_c15_c10_2 - 4134: d51ffa6f msr s3_7_c15_c10_3, x15 - 4138: d53ffa6f mrs x15, s3_7_c15_c10_3 - 413c: d51ffa8f msr s3_7_c15_c10_4, x15 - 4140: d53ffa8f mrs x15, s3_7_c15_c10_4 - 4144: d51ffaaf msr s3_7_c15_c10_5, x15 - 4148: d53ffaaf mrs x15, s3_7_c15_c10_5 - 414c: d51ffacf msr s3_7_c15_c10_6, x15 - 4150: d53ffacf mrs x15, s3_7_c15_c10_6 - 4154: d51ffaef msr s3_7_c15_c10_7, x15 - 4158: d53ffaef mrs x15, s3_7_c15_c10_7 - 415c: d51ffb0f msr s3_7_c15_c11_0, x15 - 4160: d53ffb0f mrs x15, s3_7_c15_c11_0 - 4164: d51ffb2f msr s3_7_c15_c11_1, x15 - 4168: d53ffb2f mrs x15, s3_7_c15_c11_1 - 416c: d51ffb4f msr s3_7_c15_c11_2, x15 - 4170: d53ffb4f mrs x15, s3_7_c15_c11_2 - 4174: d51ffb6f msr s3_7_c15_c11_3, x15 - 4178: d53ffb6f mrs x15, s3_7_c15_c11_3 - 417c: d51ffb8f msr s3_7_c15_c11_4, x15 - 4180: d53ffb8f mrs x15, s3_7_c15_c11_4 - 4184: d51ffbaf msr s3_7_c15_c11_5, x15 - 4188: d53ffbaf mrs x15, s3_7_c15_c11_5 - 418c: d51ffbcf msr s3_7_c15_c11_6, x15 - 4190: d53ffbcf mrs x15, s3_7_c15_c11_6 - 4194: d51ffbef msr s3_7_c15_c11_7, x15 - 4198: d53ffbef mrs x15, s3_7_c15_c11_7 - 419c: d51ffc0f msr s3_7_c15_c12_0, x15 - 41a0: d53ffc0f mrs x15, s3_7_c15_c12_0 - 41a4: d51ffc2f msr s3_7_c15_c12_1, x15 - 41a8: d53ffc2f mrs x15, s3_7_c15_c12_1 - 41ac: d51ffc4f msr s3_7_c15_c12_2, x15 - 41b0: d53ffc4f mrs x15, s3_7_c15_c12_2 - 41b4: d51ffc6f msr s3_7_c15_c12_3, x15 - 41b8: d53ffc6f mrs x15, s3_7_c15_c12_3 - 41bc: d51ffc8f msr s3_7_c15_c12_4, x15 - 41c0: d53ffc8f mrs x15, s3_7_c15_c12_4 - 41c4: d51ffcaf msr s3_7_c15_c12_5, x15 - 41c8: d53ffcaf mrs x15, s3_7_c15_c12_5 - 41cc: d51ffccf msr s3_7_c15_c12_6, x15 - 41d0: d53ffccf mrs x15, s3_7_c15_c12_6 - 41d4: d51ffcef msr s3_7_c15_c12_7, x15 - 41d8: d53ffcef mrs x15, s3_7_c15_c12_7 - 41dc: d51ffd0f msr s3_7_c15_c13_0, x15 - 41e0: d53ffd0f mrs x15, s3_7_c15_c13_0 - 41e4: d51ffd2f msr s3_7_c15_c13_1, x15 - 41e8: d53ffd2f mrs x15, s3_7_c15_c13_1 - 41ec: d51ffd4f msr s3_7_c15_c13_2, x15 - 41f0: d53ffd4f mrs x15, s3_7_c15_c13_2 - 41f4: d51ffd6f msr s3_7_c15_c13_3, x15 - 41f8: d53ffd6f mrs x15, s3_7_c15_c13_3 - 41fc: d51ffd8f msr s3_7_c15_c13_4, x15 - 4200: d53ffd8f mrs x15, s3_7_c15_c13_4 - 4204: d51ffdaf msr s3_7_c15_c13_5, x15 - 4208: d53ffdaf mrs x15, s3_7_c15_c13_5 - 420c: d51ffdcf msr s3_7_c15_c13_6, x15 - 4210: d53ffdcf mrs x15, s3_7_c15_c13_6 - 4214: d51ffdef msr s3_7_c15_c13_7, x15 - 4218: d53ffdef mrs x15, s3_7_c15_c13_7 - 421c: d51ffe0f msr s3_7_c15_c14_0, x15 - 4220: d53ffe0f mrs x15, s3_7_c15_c14_0 - 4224: d51ffe2f msr s3_7_c15_c14_1, x15 - 4228: d53ffe2f mrs x15, s3_7_c15_c14_1 - 422c: d51ffe4f msr s3_7_c15_c14_2, x15 - 4230: d53ffe4f mrs x15, s3_7_c15_c14_2 - 4234: d51ffe6f msr s3_7_c15_c14_3, x15 - 4238: d53ffe6f mrs x15, s3_7_c15_c14_3 - 423c: d51ffe8f msr s3_7_c15_c14_4, x15 - 4240: d53ffe8f mrs x15, s3_7_c15_c14_4 - 4244: d51ffeaf msr s3_7_c15_c14_5, x15 - 4248: d53ffeaf mrs x15, s3_7_c15_c14_5 - 424c: d51ffecf msr s3_7_c15_c14_6, x15 - 4250: d53ffecf mrs x15, s3_7_c15_c14_6 - 4254: d51ffeef msr s3_7_c15_c14_7, x15 - 4258: d53ffeef mrs x15, s3_7_c15_c14_7 - 425c: d51fff0f msr s3_7_c15_c15_0, x15 - 4260: d53fff0f mrs x15, s3_7_c15_c15_0 - 4264: d51fff2f msr s3_7_c15_c15_1, x15 - 4268: d53fff2f mrs x15, s3_7_c15_c15_1 - 426c: d51fff4f msr s3_7_c15_c15_2, x15 - 4270: d53fff4f mrs x15, s3_7_c15_c15_2 - 4274: d51fff6f msr s3_7_c15_c15_3, x15 - 4278: d53fff6f mrs x15, s3_7_c15_c15_3 - 427c: d51fff8f msr s3_7_c15_c15_4, x15 - 4280: d53fff8f mrs x15, s3_7_c15_c15_4 - 4284: d51fffaf msr s3_7_c15_c15_5, x15 - 4288: d53fffaf mrs x15, s3_7_c15_c15_5 - 428c: d51fffcf msr s3_7_c15_c15_6, x15 - 4290: d53fffcf mrs x15, s3_7_c15_c15_6 - 4294: d51fffef msr s3_7_c15_c15_7, x15 - 4298: d53fffef mrs x15, s3_7_c15_c15_7 - 429c: d513040f msr dbgdtr_el0, x15 - 42a0: d533040f mrs x15, dbgdtr_el0 - 42a4: d533050f mrs x15, dbgdtrrx_el0 - 42a8: d518c04f msr rmr_el1, x15 - 42ac: d538c04f mrs x15, rmr_el1 - 42b0: d51cc04f msr rmr_el2, x15 - 42b4: d53cc04f mrs x15, rmr_el2 - 42b8: d51ec04f msr rmr_el3, x15 - 42bc: d53ec04f mrs x15, rmr_el3 - 42c0: d518400f msr spsr_el1, x15 - 42c4: d538400f mrs x15, spsr_el1 - 42c8: d51c400f msr spsr_el2, x15 - 42cc: d53c400f mrs x15, spsr_el2 - 42d0: d51e400f msr spsr_el3, x15 - 42d4: d53e400f mrs x15, spsr_el3 - 42d8: d500000f msr s0_0_c0_c0_0, x15 - 42dc: d520000f mrs x15, s0_0_c0_c0_0 - 42e0: d50ffffb sys #7, C15, C15, #7, x27 - 42e4: d52ffffb sysl x27, #7, C15, C15, #7 - 42e8: d514680e msr s2_4_c6_c8_0, x14 - 42ec: d534680e mrs x14, s2_4_c6_c8_0 - 42f0: d50ae444 sys #2, C14, C4, #2, x4 - 42f4: d52ae444 sysl x4, #2, C14, C4, #2 - 42f8: d501d167 msr s0_1_c13_c1_3, x7 - 42fc: d521d167 mrs x7, s0_1_c13_c1_3 diff --git a/gas/testsuite/gas/aarch64/sysreg-1.s b/gas/testsuite/gas/aarch64/sysreg-1.s deleted file mode 100644 index 82a86d3..0000000 --- a/gas/testsuite/gas/aarch64/sysreg-1.s +++ /dev/null @@ -1,174 +0,0 @@ -/* sysreg-1.s Test file for AArch64 system registers. - - Copyright (C) 2011-2024 Free Software Foundation, Inc. - Contributed by ARM Ltd. - - This file is part of GAS. - - GAS is free software; you can redistribute it and/or modify - it under the terms of the GNU General Public License as published by - the Free Software Foundation; either version 3 of the license, or - (at your option) any later version. - - GAS is distributed in the hope that it will be useful, - but WITHOUT ANY WARRANTY; without even the implied warranty of - MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - GNU General Public License for more details. - - You should have received a copy of the GNU General Public License - along with this program; see the file COPYING3. If not, - see . */ - - .macro rw_sys_reg sys_reg xreg r w - .ifc \w, 1 - msr \sys_reg, \xreg - .endif - .ifc \r, 1 - mrs \xreg, \sys_reg - .endif - .endm - - .text - - rw_sys_reg sys_reg=id_aa64afr0_el1 xreg=x7 r=1 w=0 - rw_sys_reg sys_reg=id_aa64afr1_el1 xreg=x7 r=1 w=0 - rw_sys_reg sys_reg=mvfr2_el1 xreg=x7 r=1 w=0 - rw_sys_reg sys_reg=dlr_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=dspsr_el0 xreg=x7 r=1 w=1 - - rw_sys_reg sys_reg=sder32_el3 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=mdcr_el3 xreg=x7 r=1 w=1 - - rw_sys_reg sys_reg=mdccint_el1 xreg=x7 r=1 w=1 - - rw_sys_reg sys_reg=dbgvcr32_el2 xreg=x7 r=1 w=1 - - rw_sys_reg sys_reg=fpexc32_el2 xreg=x7 r=1 w=1 - - rw_sys_reg sys_reg=teecr32_el1 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=teehbr32_el1 xreg=x7 r=1 w=1 - - rw_sys_reg sys_reg=cntp_tval_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=cntp_ctl_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=cntp_cval_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=cntps_tval_el1 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=cntps_ctl_el1 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=cntps_cval_el1 xreg=x7 r=1 w=1 - - rw_sys_reg sys_reg=pmccntr_el0 xreg=x7 r=1 w=1 - - rw_sys_reg sys_reg=pmevcntr0_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevcntr1_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevcntr2_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevcntr3_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevcntr4_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevcntr5_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevcntr6_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevcntr7_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevcntr8_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevcntr9_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevcntr10_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevcntr11_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevcntr12_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevcntr13_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevcntr14_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevcntr15_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevcntr16_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevcntr17_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevcntr18_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevcntr19_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevcntr20_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevcntr21_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevcntr22_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevcntr23_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevcntr24_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevcntr25_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevcntr26_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevcntr27_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevcntr28_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevcntr29_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevcntr30_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevtyper0_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevtyper1_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevtyper2_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevtyper3_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevtyper4_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevtyper5_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevtyper6_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevtyper7_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevtyper8_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevtyper9_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevtyper10_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevtyper11_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevtyper12_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevtyper13_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevtyper14_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevtyper15_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevtyper16_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevtyper17_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevtyper18_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevtyper19_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevtyper20_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevtyper21_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevtyper22_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevtyper23_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevtyper24_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevtyper25_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevtyper26_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevtyper27_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevtyper28_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevtyper29_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmevtyper30_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=pmccfiltr_el0 xreg=x7 r=1 w=1 - - rw_sys_reg sys_reg=tpidrro_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=tpidr_el0 xreg=x7 r=1 w=1 - rw_sys_reg sys_reg=cntfrq_el0 xreg=x7 r=1 w=1 - - // - // Macros to generate MRS and MSR with all the implementation defined - // system registers in the form of S3____. - - .altmacro - .macro all_op2 op1, crn, crm, from=0, to=7 - rw_sys_reg S3_\op1\()_C\crn\()_C\crm\()_\from x15 1 1 - .if (\to-\from > 0) - all_op2 \op1, \crn, \crm, %(\from+1), \to - .endif - .endm - - .macro all_crm op1, crn, from=0, to=15 - all_op2 \op1, \crn, \from, 0, 7 - .if (\to-\from > 0) - all_crm \op1, \crn, %(\from+1), \to - .endif - .endm - - .macro all_imple_defined from=0, to=7 - .irp crn, 11, 15 - all_crm \from, \crn, 0, 15 - .endr - .if \to-\from - all_imple_defined %(\from+1), \to - .endif - .endm - - all_imple_defined 0, 7 - .noaltmacro - - rw_sys_reg sys_reg=dbgdtr_el0 xreg=x15 r=1 w=1 - rw_sys_reg sys_reg=dbgdtrrx_el0 xreg=x15 r=1 w=0 - - rw_sys_reg sys_reg=rmr_el1 xreg=x15 r=1 w=1 - rw_sys_reg sys_reg=rmr_el2 xreg=x15 r=1 w=1 - rw_sys_reg sys_reg=rmr_el3 xreg=x15 r=1 w=1 - - rw_sys_reg sys_reg=spsr_el1 xreg=x15 r=1 w=1 - rw_sys_reg sys_reg=spsr_el2 xreg=x15 r=1 w=1 - rw_sys_reg sys_reg=spsr_el3 xreg=x15 r=1 w=1 - - rw_sys_reg sys_reg=s0_0_C0_C0_0 xreg=x15 r=1 w=1 - rw_sys_reg sys_reg=s1_7_C15_C15_7 xreg=x27 r=1 w=1 - rw_sys_reg sys_reg=s2_4_C6_C8_0 xreg=x14 r=1 w=1 - rw_sys_reg sys_reg=s1_2_C14_C4_2 xreg=x4 r=1 w=1 - rw_sys_reg sys_reg=s0_1_C13_C1_3 xreg=x7 r=1 w=1 diff --git a/gas/testsuite/gas/aarch64/sysreg-2.d b/gas/testsuite/gas/aarch64/sysreg-2.d deleted file mode 100644 index ac0a862..0000000 --- a/gas/testsuite/gas/aarch64/sysreg-2.d +++ /dev/null @@ -1,60 +0,0 @@ -#objdump: -dr -#as: -march=armv8.2-a+profile - -.*: file .* - - -Disassembly of section .text: - -0+ <.*>: -.*: d5380725 mrs x5, id_aa64mmfr1_el1 -.*: d5380747 mrs x7, id_aa64mmfr2_el1 -.*: d5380769 mrs x9, id_aa64mmfr3_el1 -.*: d538078b mrs x11, id_aa64mmfr4_el1 - [0-9a-f]+: d5385305 mrs x5, erridr_el1 - [0-9a-f]+: d5185327 msr errselr_el1, x7 - [0-9a-f]+: d5385327 mrs x7, errselr_el1 - [0-9a-f]+: d5385405 mrs x5, erxfr_el1 - [0-9a-f]+: d5185425 msr erxctlr_el1, x5 - [0-9a-f]+: d5385425 mrs x5, erxctlr_el1 - [0-9a-f]+: d5185445 msr erxstatus_el1, x5 - [0-9a-f]+: d5385445 mrs x5, erxstatus_el1 - [0-9a-f]+: d5185465 msr erxaddr_el1, x5 - [0-9a-f]+: d5385465 mrs x5, erxaddr_el1 - [0-9a-f]+: d5185505 msr erxmisc0_el1, x5 - [0-9a-f]+: d5385505 mrs x5, erxmisc0_el1 - [0-9a-f]+: d5185525 msr erxmisc1_el1, x5 - [0-9a-f]+: d5385525 mrs x5, erxmisc1_el1 - [0-9a-f]+: d53c5265 mrs x5, vsesr_el2 - [0-9a-f]+: d518c125 msr disr_el1, x5 - [0-9a-f]+: d538c125 mrs x5, disr_el1 - [0-9a-f]+: d53cc125 mrs x5, vdisr_el2 - [0-9a-f]+: d50b7a20 dc cvac, x0 - [0-9a-f]+: d50b7b21 dc cvau, x1 - [0-9a-f]+: d50b7c22 dc cvap, x2 - [0-9a-f]+: d5087900 at s1e1rp, x0 - [0-9a-f]+: d5087921 at s1e1wp, x1 - [0-9a-f]+: d5189a07 msr pmblimitr_el1, x7 - [0-9a-f]+: d5389a07 mrs x7, pmblimitr_el1 - [0-9a-f]+: d5189a27 msr pmbptr_el1, x7 - [0-9a-f]+: d5389a27 mrs x7, pmbptr_el1 - [0-9a-f]+: d5189a67 msr pmbsr_el1, x7 - [0-9a-f]+: d5389a67 mrs x7, pmbsr_el1 - [0-9a-f]+: d5189907 msr pmscr_el1, x7 - [0-9a-f]+: d5389907 mrs x7, pmscr_el1 - [0-9a-f]+: d5189947 msr pmsicr_el1, x7 - [0-9a-f]+: d5389947 mrs x7, pmsicr_el1 - [0-9a-f]+: d5189967 msr pmsirr_el1, x7 - [0-9a-f]+: d5389967 mrs x7, pmsirr_el1 - [0-9a-f]+: d5189987 msr pmsfcr_el1, x7 - [0-9a-f]+: d5389987 mrs x7, pmsfcr_el1 - [0-9a-f]+: d51899a7 msr pmsevfr_el1, x7 - [0-9a-f]+: d53899a7 mrs x7, pmsevfr_el1 - [0-9a-f]+: d51899c7 msr pmslatfr_el1, x7 - [0-9a-f]+: d53899c7 mrs x7, pmslatfr_el1 - [0-9a-f]+: d51c9907 msr pmscr_el2, x7 - [0-9a-f]+: d53c9907 mrs x7, pmscr_el2 - [0-9a-f]+: d51d9907 msr pmscr_el12, x7 - [0-9a-f]+: d53d9907 mrs x7, pmscr_el12 - [0-9a-f]+: d5389ae7 mrs x7, pmbidr_el1 - [0-9a-f]+: d53899e7 mrs x7, pmsidr_el1 diff --git a/gas/testsuite/gas/aarch64/sysreg-2.s b/gas/testsuite/gas/aarch64/sysreg-2.s deleted file mode 100644 index ae2bb14..0000000 --- a/gas/testsuite/gas/aarch64/sysreg-2.s +++ /dev/null @@ -1,63 +0,0 @@ -/* sysreg-2.s Test file for ARMv8.2 system registers. */ - - .macro rw_sys_reg sys_reg xreg r w - .ifc \w, 1 - msr \sys_reg, \xreg - .endif - .ifc \r, 1 - mrs \xreg, \sys_reg - .endif - .endm - - .text - - rw_sys_reg sys_reg=id_aa64mmfr1_el1 xreg=x5 r=1 w=0 - rw_sys_reg sys_reg=id_aa64mmfr2_el1 xreg=x7 r=1 w=0 - rw_sys_reg sys_reg=id_aa64mmfr3_el1 xreg=x9 r=1 w=0 - rw_sys_reg sys_reg=id_aa64mmfr4_el1 xreg=x11 r=1 w=0 - - /* RAS extension. */ - - rw_sys_reg sys_reg=erridr_el1 xreg=x5 r=1 w=0 - rw_sys_reg sys_reg=errselr_el1 xreg=x7 r=1 w=1 - - rw_sys_reg sys_reg=erxfr_el1 xreg=x5 r=1 w=0 - rw_sys_reg sys_reg=erxctlr_el1 xreg=x5 r=1 w=1 - rw_sys_reg sys_reg=erxstatus_el1 xreg=x5 r=1 w=1 - rw_sys_reg sys_reg=erxaddr_el1 xreg=x5 r=1 w=1 - - rw_sys_reg sys_reg=erxmisc0_el1 xreg=x5 r=1 w=1 - rw_sys_reg sys_reg=erxmisc1_el1 xreg=x5 r=1 w=1 - - rw_sys_reg sys_reg=vsesr_el2 xreg=x5 r=1 w=0 - rw_sys_reg sys_reg=disr_el1 xreg=x5 r=1 w=1 - rw_sys_reg sys_reg=vdisr_el2 xreg=x5 r=1 w=0 - - /* DC CVAP. */ - - dc cvac, x0 - dc cvau, x1 - dc cvap, x2 - - /* AT. */ - - at s1e1rp, x0 - at s1e1wp, x1 - - /* Statistical profiling. */ - - .irp reg, pmblimitr_el1, pmbptr_el1, pmbsr_el1 - rw_sys_reg sys_reg=\reg xreg=x7 r=1 w=1 - .endr - - .irp reg, pmscr_el1, pmsicr_el1, pmsirr_el1, pmsfcr_el1 - rw_sys_reg sys_reg=\reg xreg=x7 r=1 w=1 - .endr - - .irp reg, pmsevfr_el1, pmslatfr_el1, pmscr_el2, pmscr_el12 - rw_sys_reg sys_reg=\reg xreg=x7 r=1 w=1 - .endr - - .irp reg, pmbidr_el1, pmsidr_el1 - rw_sys_reg sys_reg=\reg xreg=x7 r=1 w=0 - .endr diff --git a/gas/testsuite/gas/aarch64/sysreg-3.d b/gas/testsuite/gas/aarch64/sysreg-3.d deleted file mode 100644 index e1c1ead..0000000 --- a/gas/testsuite/gas/aarch64/sysreg-3.d +++ /dev/null @@ -1,28 +0,0 @@ -#objdump: -dr -#as: -march=armv8.3-a - -.*: file .* - -Disassembly of section \.text: - -0+ <.*>: - 0: d5182100 msr apiakeylo_el1, x0 - 4: d5382100 mrs x0, apiakeylo_el1 - 8: d5182121 msr apiakeyhi_el1, x1 - c: d5382121 mrs x1, apiakeyhi_el1 - 10: d5182142 msr apibkeylo_el1, x2 - 14: d5382142 mrs x2, apibkeylo_el1 - 18: d5182163 msr apibkeyhi_el1, x3 - 1c: d5382163 mrs x3, apibkeyhi_el1 - 20: d5182204 msr apdakeylo_el1, x4 - 24: d5382204 mrs x4, apdakeylo_el1 - 28: d5182225 msr apdakeyhi_el1, x5 - 2c: d5382225 mrs x5, apdakeyhi_el1 - 30: d5182246 msr apdbkeylo_el1, x6 - 34: d5382246 mrs x6, apdbkeylo_el1 - 38: d5182267 msr apdbkeyhi_el1, x7 - 3c: d5382267 mrs x7, apdbkeyhi_el1 - 40: d5182308 msr apgakeylo_el1, x8 - 44: d5382308 mrs x8, apgakeylo_el1 - 48: d5182329 msr apgakeyhi_el1, x9 - 4c: d5382329 mrs x9, apgakeyhi_el1 diff --git a/gas/testsuite/gas/aarch64/sysreg-3.s b/gas/testsuite/gas/aarch64/sysreg-3.s deleted file mode 100644 index e2ffc81..0000000 --- a/gas/testsuite/gas/aarch64/sysreg-3.s +++ /dev/null @@ -1,21 +0,0 @@ -/* sysreg-3.s Test file for ARMv8.3 system registers. */ - - .macro test sys_reg xreg - msr \sys_reg, \xreg - mrs \xreg, \sys_reg - .endm - - .text - - test sys_reg=apiakeylo_el1 xreg=x0 - test sys_reg=apiakeyhi_el1 xreg=x1 - test sys_reg=apibkeylo_el1 xreg=x2 - test sys_reg=apibkeyhi_el1 xreg=x3 - - test sys_reg=apdakeylo_el1 xreg=x4 - test sys_reg=apdakeyhi_el1 xreg=x5 - test sys_reg=apdbkeylo_el1 xreg=x6 - test sys_reg=apdbkeyhi_el1 xreg=x7 - - test sys_reg=apgakeylo_el1 xreg=x8 - test sys_reg=apgakeyhi_el1 xreg=x9 diff --git a/gas/testsuite/gas/aarch64/sysreg-4.d b/gas/testsuite/gas/aarch64/sysreg-4.d deleted file mode 100644 index f0fffbe..0000000 --- a/gas/testsuite/gas/aarch64/sysreg-4.d +++ /dev/null @@ -1,59 +0,0 @@ -#source: sysreg-4.s -#as: -march=armv8.5-a+rng+memtag -#objdump: -dr - -.*: file format .* - -Disassembly of section \.text: - -0+ <.*>: -.*: d50b7381 cfp rctx, x1 -.*: d50b73a2 dvp rctx, x2 -.*: d50b73e3 cpp rctx, x3 -.*: d50b7d24 dc cvadp, x4 -.*: d53b2405 mrs x5, rndr -.*: d53b2426 mrs x6, rndrrs -.*: d53bd0e7 mrs x7, scxtnum_el0 -.*: d538d0e7 mrs x7, scxtnum_el1 -.*: d53cd0e7 mrs x7, scxtnum_el2 -.*: d53ed0e7 mrs x7, scxtnum_el3 -.*: d53dd0e7 mrs x7, scxtnum_el12 -.*: d5380388 mrs x8, id_pfr2_el1 -.*: d53b42e1 mrs x1, tco -.*: d53b42e2 mrs x2, tco -.*: d5385621 mrs x1, tfsre0_el1 -.*: d5385601 mrs x1, tfsr_el1 -.*: d53c5602 mrs x2, tfsr_el2 -.*: d53e5603 mrs x3, tfsr_el3 -.*: d53d560c mrs x12, tfsr_el12 -.*: d53810a1 mrs x1, rgsr_el1 -.*: d53810c3 mrs x3, gcr_el1 -.*: d5390084 mrs x4, gmid_el1 -.*: d51b42e1 msr tco, x1 -.*: d51b42e2 msr tco, x2 -.*: d5185621 msr tfsre0_el1, x1 -.*: d5185601 msr tfsr_el1, x1 -.*: d51c5602 msr tfsr_el2, x2 -.*: d51e5603 msr tfsr_el3, x3 -.*: d51d560c msr tfsr_el12, x12 -.*: d51810a1 msr rgsr_el1, x1 -.*: d51810c3 msr gcr_el1, x3 -.*: d503419f msr tco, #0x1 -.*: d5087661 dc igvac, x1 -.*: d5087682 dc igsw, x2 -.*: d5087a83 dc cgsw, x3 -.*: d5087e84 dc cigsw, x4 -.*: d50b7a65 dc cgvac, x5 -.*: d50b7c66 dc cgvap, x6 -.*: d50b7d67 dc cgvadp, x7 -.*: d50b7e68 dc cigvac, x8 -.*: d50b7469 dc gva, x9 -.*: d50876aa dc igdvac, x10 -.*: d50876cb dc igdsw, x11 -.*: d5087acc dc cgdsw, x12 -.*: d5087ecd dc cigdsw, x13 -.*: d50b7aae dc cgdvac, x14 -.*: d50b7caf dc cgdvap, x15 -.*: d50b7db0 dc cgdvadp, x16 -.*: d50b7eb1 dc cigdvac, x17 -.*: d50b7492 dc gzva, x18 diff --git a/gas/testsuite/gas/aarch64/sysreg-4.s b/gas/testsuite/gas/aarch64/sysreg-4.s deleted file mode 100644 index 769f0a6..0000000 --- a/gas/testsuite/gas/aarch64/sysreg-4.s +++ /dev/null @@ -1,64 +0,0 @@ -/* sysreg-4.s Test file for ARMv8.5 system registers. */ -func: - cfp rctx, x1 - dvp rctx, x2 - cpp rctx, x3 - dc cvadp, x4 - mrs x5, rndr - mrs x6, rndrrs - mrs x7, scxtnum_el0 - mrs x7, scxtnum_el1 - mrs x7, scxtnum_el2 - mrs x7, scxtnum_el3 - mrs x7, scxtnum_el12 - mrs x8, id_pfr2_el1 - - # ARMv8.5-a+memtag - # MRS (register) - mrs x1, tco - mrs x2, TCO - mrs x1, tfsre0_el1 - mrs x1, TFSR_EL1 - mrs x2, TFSR_EL2 - mrs x3, TFSR_EL3 - mrs x12, TFSR_EL12 - mrs x1, rgsr_el1 - mrs x3, gcr_el1 - mrs x4, gmid_el1 - - # MSR (register) - msr tco, x1 - msr TCO, x2 - msr tfsre0_el1, x1 - msr TFSR_EL1, x1 - msr TFSR_EL2, x2 - msr TFSR_EL3, x3 - msr TFSR_EL12, x12 - msr rgsr_el1, x1 - msr gcr_el1, x3 - - # MSR (immediate) - msr TCO, #1 - - # Data cache - dc igvac, x1 - dc igsw, x2 - dc cgsw, x3 - dc cigsw, x4 - dc cgvac, x5 - dc cgvap, x6 - dc cgvadp, x7 - dc cigvac, x8 - - dc gva, x9 - - dc igdvac, x10 - dc igdsw, x11 - dc cgdsw, x12 - dc cigdsw, x13 - dc cgdvac, x14 - dc cgdvap, x15 - dc cgdvadp, x16 - dc cigdvac, x17 - - dc gzva, x18 diff --git a/gas/testsuite/gas/aarch64/sysreg-5.s b/gas/testsuite/gas/aarch64/sysreg-5.s deleted file mode 100644 index c695b1b..0000000 --- a/gas/testsuite/gas/aarch64/sysreg-5.s +++ /dev/null @@ -1 +0,0 @@ -tlbi rvae1is, x0 diff --git a/gas/testsuite/gas/aarch64/sysreg-6.d b/gas/testsuite/gas/aarch64/sysreg-6.d deleted file mode 100644 index ac928ce..0000000 --- a/gas/testsuite/gas/aarch64/sysreg-6.d +++ /dev/null @@ -1,9 +0,0 @@ -#objdump: -dr - -.*: file format .* - -Disassembly of section \.text: - -0+ <.*>: -[^:]+: d51c1100 msr hcr_el2, x0 -[^:]+: d53c1100 mrs x0, hcr_el2 diff --git a/gas/testsuite/gas/aarch64/sysreg-6.s b/gas/testsuite/gas/aarch64/sysreg-6.s deleted file mode 100644 index c6772ae..0000000 --- a/gas/testsuite/gas/aarch64/sysreg-6.s +++ /dev/null @@ -1,2 +0,0 @@ -msr hcr_el2, x0 -mrs x0,hcr_el2 diff --git a/gas/testsuite/gas/aarch64/sysreg-7.d b/gas/testsuite/gas/aarch64/sysreg-7.d deleted file mode 100644 index 1564f53..0000000 --- a/gas/testsuite/gas/aarch64/sysreg-7.d +++ /dev/null @@ -1,25 +0,0 @@ -#objdump: -dr - -.*: file format .* - -Disassembly of section \.text: - -0+ <.*>: - -.*: d538a460 mrs x0, lorc_el1 -.*: d538a420 mrs x0, lorea_el1 -.*: d538a440 mrs x0, lorn_el1 -.*: d538a400 mrs x0, lorsa_el1 -.*: d53ecc80 mrs x0, icc_ctlr_el3 -.*: d538cca0 mrs x0, icc_sre_el1 -.*: d53cc9a0 mrs x0, icc_sre_el2 -.*: d53ecca0 mrs x0, icc_sre_el3 -.*: d53ccb20 mrs x0, ich_vtr_el2 -.*: d518a460 msr lorc_el1, x0 -.*: d518a420 msr lorea_el1, x0 -.*: d518a440 msr lorn_el1, x0 -.*: d518a400 msr lorsa_el1, x0 -.*: d51ecc80 msr icc_ctlr_el3, x0 -.*: d518cca0 msr icc_sre_el1, x0 -.*: d51cc9a0 msr icc_sre_el2, x0 -.*: d51ecca0 msr icc_sre_el3, x0 diff --git a/gas/testsuite/gas/aarch64/sysreg-7.s b/gas/testsuite/gas/aarch64/sysreg-7.s deleted file mode 100644 index 94dd85b..0000000 --- a/gas/testsuite/gas/aarch64/sysreg-7.s +++ /dev/null @@ -1,22 +0,0 @@ -.arch armv8-a+lor - -/* Read from system registers. */ -mrs x0, lorc_el1 -mrs x0, lorea_el1 -mrs x0, lorn_el1 -mrs x0, lorsa_el1 -mrs x0, icc_ctlr_el3 -mrs x0, icc_sre_el1 -mrs x0, icc_sre_el2 -mrs x0, icc_sre_el3 -mrs x0, ich_vtr_el2 - -/* Write to system registers. */ -msr lorc_el1, x0 -msr lorea_el1, x0 -msr lorn_el1, x0 -msr lorsa_el1, x0 -msr icc_ctlr_el3, x0 -msr icc_sre_el1, x0 -msr icc_sre_el2, x0 -msr icc_sre_el3, x0 diff --git a/gas/testsuite/gas/aarch64/sysreg-8.d b/gas/testsuite/gas/aarch64/sysreg-8.d deleted file mode 100644 index 09b6724..0000000 --- a/gas/testsuite/gas/aarch64/sysreg-8.d +++ /dev/null @@ -1,295 +0,0 @@ -#objdump: -dr - -.* - - -Disassembly of section \.text: - -0+ <\.text>: -[^:]*: d53803a0 mrs x0, id_dfr1_el1 -[^:]*: d53803c0 mrs x0, id_mmfr5_el1 -[^:]*: d53802e0 mrs x0, id_isar6_el1 -[^:]*: d5384602 mrs x2, icc_pmr_el1 -[^:]*: d5184603 msr icc_pmr_el1, x3 -[^:]*: d538c800 mrs x0, icc_iar0_el1 -[^:]*: d518c821 msr icc_eoir0_el1, x1 -[^:]*: d538c840 mrs x0, icc_hppir0_el1 -[^:]*: d538c862 mrs x2, icc_bpr0_el1 -[^:]*: d518c863 msr icc_bpr0_el1, x3 -[^:]*: d538c882 mrs x2, icc_ap0r0_el1 -[^:]*: d518c883 msr icc_ap0r0_el1, x3 -[^:]*: d538c8a2 mrs x2, icc_ap0r1_el1 -[^:]*: d518c8a3 msr icc_ap0r1_el1, x3 -[^:]*: d538c8c2 mrs x2, icc_ap0r2_el1 -[^:]*: d518c8c3 msr icc_ap0r2_el1, x3 -[^:]*: d538c8e2 mrs x2, icc_ap0r3_el1 -[^:]*: d518c8e3 msr icc_ap0r3_el1, x3 -[^:]*: d538c902 mrs x2, icc_ap1r0_el1 -[^:]*: d518c903 msr icc_ap1r0_el1, x3 -[^:]*: d538c922 mrs x2, icc_ap1r1_el1 -[^:]*: d518c923 msr icc_ap1r1_el1, x3 -[^:]*: d538c942 mrs x2, icc_ap1r2_el1 -[^:]*: d518c943 msr icc_ap1r2_el1, x3 -[^:]*: d538c962 mrs x2, icc_ap1r3_el1 -[^:]*: d518c963 msr icc_ap1r3_el1, x3 -[^:]*: d518cb21 msr icc_dir_el1, x1 -[^:]*: d538cb60 mrs x0, icc_rpr_el1 -[^:]*: d518cba1 msr icc_sgi1r_el1, x1 -[^:]*: d518cbc1 msr icc_asgi1r_el1, x1 -[^:]*: d518cbe1 msr icc_sgi0r_el1, x1 -[^:]*: d538cc00 mrs x0, icc_iar1_el1 -[^:]*: d518cc21 msr icc_eoir1_el1, x1 -[^:]*: d538cc40 mrs x0, icc_hppir1_el1 -[^:]*: d538cc62 mrs x2, icc_bpr1_el1 -[^:]*: d518cc63 msr icc_bpr1_el1, x3 -[^:]*: d538cc82 mrs x2, icc_ctlr_el1 -[^:]*: d518cc83 msr icc_ctlr_el1, x3 -[^:]*: d538ccc2 mrs x2, icc_igrpen0_el1 -[^:]*: d518ccc3 msr icc_igrpen0_el1, x3 -[^:]*: d538cce2 mrs x2, icc_igrpen1_el1 -[^:]*: d518cce3 msr icc_igrpen1_el1, x3 -[^:]*: d53cc802 mrs x2, ich_ap0r0_el2 -[^:]*: d51cc803 msr ich_ap0r0_el2, x3 -[^:]*: d53cc822 mrs x2, ich_ap0r1_el2 -[^:]*: d51cc823 msr ich_ap0r1_el2, x3 -[^:]*: d53cc842 mrs x2, ich_ap0r2_el2 -[^:]*: d51cc843 msr ich_ap0r2_el2, x3 -[^:]*: d53cc862 mrs x2, ich_ap0r3_el2 -[^:]*: d51cc863 msr ich_ap0r3_el2, x3 -[^:]*: d53cc902 mrs x2, ich_ap1r0_el2 -[^:]*: d51cc903 msr ich_ap1r0_el2, x3 -[^:]*: d53cc922 mrs x2, ich_ap1r1_el2 -[^:]*: d51cc923 msr ich_ap1r1_el2, x3 -[^:]*: d53cc942 mrs x2, ich_ap1r2_el2 -[^:]*: d51cc943 msr ich_ap1r2_el2, x3 -[^:]*: d53cc962 mrs x2, ich_ap1r3_el2 -[^:]*: d51cc963 msr ich_ap1r3_el2, x3 -[^:]*: d53ccb02 mrs x2, ich_hcr_el2 -[^:]*: d51ccb03 msr ich_hcr_el2, x3 -[^:]*: d53ccb40 mrs x0, ich_misr_el2 -[^:]*: d53ccb60 mrs x0, ich_eisr_el2 -[^:]*: d53ccba0 mrs x0, ich_elrsr_el2 -[^:]*: d53ccbe2 mrs x2, ich_vmcr_el2 -[^:]*: d51ccbe3 msr ich_vmcr_el2, x3 -[^:]*: d53ccc02 mrs x2, ich_lr0_el2 -[^:]*: d51ccc03 msr ich_lr0_el2, x3 -[^:]*: d53ccc22 mrs x2, ich_lr1_el2 -[^:]*: d51ccc23 msr ich_lr1_el2, x3 -[^:]*: d53ccc42 mrs x2, ich_lr2_el2 -[^:]*: d51ccc43 msr ich_lr2_el2, x3 -[^:]*: d53ccc62 mrs x2, ich_lr3_el2 -[^:]*: d51ccc63 msr ich_lr3_el2, x3 -[^:]*: d53ccc82 mrs x2, ich_lr4_el2 -[^:]*: d51ccc83 msr ich_lr4_el2, x3 -[^:]*: d53ccca2 mrs x2, ich_lr5_el2 -[^:]*: d51ccca3 msr ich_lr5_el2, x3 -[^:]*: d53cccc2 mrs x2, ich_lr6_el2 -[^:]*: d51cccc3 msr ich_lr6_el2, x3 -[^:]*: d53ccce2 mrs x2, ich_lr7_el2 -[^:]*: d51ccce3 msr ich_lr7_el2, x3 -[^:]*: d53ccd02 mrs x2, ich_lr8_el2 -[^:]*: d51ccd03 msr ich_lr8_el2, x3 -[^:]*: d53ccd22 mrs x2, ich_lr9_el2 -[^:]*: d51ccd23 msr ich_lr9_el2, x3 -[^:]*: d53ccd42 mrs x2, ich_lr10_el2 -[^:]*: d51ccd43 msr ich_lr10_el2, x3 -[^:]*: d53ccd62 mrs x2, ich_lr11_el2 -[^:]*: d51ccd63 msr ich_lr11_el2, x3 -[^:]*: d53ccd82 mrs x2, ich_lr12_el2 -[^:]*: d51ccd83 msr ich_lr12_el2, x3 -[^:]*: d53ccda2 mrs x2, ich_lr13_el2 -[^:]*: d51ccda3 msr ich_lr13_el2, x3 -[^:]*: d53ccdc2 mrs x2, ich_lr14_el2 -[^:]*: d51ccdc3 msr ich_lr14_el2, x3 -[^:]*: d53ccde2 mrs x2, ich_lr15_el2 -[^:]*: d51ccde3 msr ich_lr15_el2, x3 -[^:]*: d53ecce2 mrs x2, icc_igrpen1_el3 -[^:]*: d51ecce3 msr icc_igrpen1_el3, x3 -[^:]*: d538a4e0 mrs x0, lorid_el1 -[^:]*: d5390040 mrs x0, ccsidr2_el1 -[^:]*: d5381222 mrs x2, trfcr_el1 -[^:]*: d5181223 msr trfcr_el1, x3 -[^:]*: d5389ec0 mrs x0, pmmir_el1 -[^:]*: d53c1222 mrs x2, trfcr_el2 -[^:]*: d51c1223 msr trfcr_el2, x3 -[^:]*: d53d1222 mrs x2, trfcr_el12 -[^:]*: d51d1223 msr trfcr_el12, x3 -[^:]*: d53bd202 mrs x2, amcr_el0 -[^:]*: d51bd203 msr amcr_el0, x3 -[^:]*: d53bd220 mrs x0, amcfgr_el0 -[^:]*: d53bd240 mrs x0, amcgcr_el0 -[^:]*: d53bd262 mrs x2, amuserenr_el0 -[^:]*: d51bd263 msr amuserenr_el0, x3 -[^:]*: d53bd282 mrs x2, amcntenclr0_el0 -[^:]*: d51bd283 msr amcntenclr0_el0, x3 -[^:]*: d53bd2a2 mrs x2, amcntenset0_el0 -[^:]*: d51bd2a3 msr amcntenset0_el0, x3 -[^:]*: d53bd302 mrs x2, amcntenclr1_el0 -[^:]*: d51bd303 msr amcntenclr1_el0, x3 -[^:]*: d53bd322 mrs x2, amcntenset1_el0 -[^:]*: d51bd323 msr amcntenset1_el0, x3 -[^:]*: d53bd402 mrs x2, amevcntr00_el0 -[^:]*: d51bd403 msr amevcntr00_el0, x3 -[^:]*: d53bd422 mrs x2, amevcntr01_el0 -[^:]*: d51bd423 msr amevcntr01_el0, x3 -[^:]*: d53bd442 mrs x2, amevcntr02_el0 -[^:]*: d51bd443 msr amevcntr02_el0, x3 -[^:]*: d53bd462 mrs x2, amevcntr03_el0 -[^:]*: d51bd463 msr amevcntr03_el0, x3 -[^:]*: d53bd600 mrs x0, amevtyper00_el0 -[^:]*: d53bd620 mrs x0, amevtyper01_el0 -[^:]*: d53bd640 mrs x0, amevtyper02_el0 -[^:]*: d53bd660 mrs x0, amevtyper03_el0 -[^:]*: d53bdc02 mrs x2, amevcntr10_el0 -[^:]*: d51bdc03 msr amevcntr10_el0, x3 -[^:]*: d53bdc22 mrs x2, amevcntr11_el0 -[^:]*: d51bdc23 msr amevcntr11_el0, x3 -[^:]*: d53bdc42 mrs x2, amevcntr12_el0 -[^:]*: d51bdc43 msr amevcntr12_el0, x3 -[^:]*: d53bdc62 mrs x2, amevcntr13_el0 -[^:]*: d51bdc63 msr amevcntr13_el0, x3 -[^:]*: d53bdc82 mrs x2, amevcntr14_el0 -[^:]*: d51bdc83 msr amevcntr14_el0, x3 -[^:]*: d53bdca2 mrs x2, amevcntr15_el0 -[^:]*: d51bdca3 msr amevcntr15_el0, x3 -[^:]*: d53bdcc2 mrs x2, amevcntr16_el0 -[^:]*: d51bdcc3 msr amevcntr16_el0, x3 -[^:]*: d53bdce2 mrs x2, amevcntr17_el0 -[^:]*: d51bdce3 msr amevcntr17_el0, x3 -[^:]*: d53bdd02 mrs x2, amevcntr18_el0 -[^:]*: d51bdd03 msr amevcntr18_el0, x3 -[^:]*: d53bdd22 mrs x2, amevcntr19_el0 -[^:]*: d51bdd23 msr amevcntr19_el0, x3 -[^:]*: d53bdd42 mrs x2, amevcntr110_el0 -[^:]*: d51bdd43 msr amevcntr110_el0, x3 -[^:]*: d53bdd62 mrs x2, amevcntr111_el0 -[^:]*: d51bdd63 msr amevcntr111_el0, x3 -[^:]*: d53bdd82 mrs x2, amevcntr112_el0 -[^:]*: d51bdd83 msr amevcntr112_el0, x3 -[^:]*: d53bdda2 mrs x2, amevcntr113_el0 -[^:]*: d51bdda3 msr amevcntr113_el0, x3 -[^:]*: d53bddc2 mrs x2, amevcntr114_el0 -[^:]*: d51bddc3 msr amevcntr114_el0, x3 -[^:]*: d53bdde2 mrs x2, amevcntr115_el0 -[^:]*: d51bdde3 msr amevcntr115_el0, x3 -[^:]*: d53bde02 mrs x2, amevtyper10_el0 -[^:]*: d51bde03 msr amevtyper10_el0, x3 -[^:]*: d53bde22 mrs x2, amevtyper11_el0 -[^:]*: d51bde23 msr amevtyper11_el0, x3 -[^:]*: d53bde42 mrs x2, amevtyper12_el0 -[^:]*: d51bde43 msr amevtyper12_el0, x3 -[^:]*: d53bde62 mrs x2, amevtyper13_el0 -[^:]*: d51bde63 msr amevtyper13_el0, x3 -[^:]*: d53bde82 mrs x2, amevtyper14_el0 -[^:]*: d51bde83 msr amevtyper14_el0, x3 -[^:]*: d53bdea2 mrs x2, amevtyper15_el0 -[^:]*: d51bdea3 msr amevtyper15_el0, x3 -[^:]*: d53bdec2 mrs x2, amevtyper16_el0 -[^:]*: d51bdec3 msr amevtyper16_el0, x3 -[^:]*: d53bdee2 mrs x2, amevtyper17_el0 -[^:]*: d51bdee3 msr amevtyper17_el0, x3 -[^:]*: d53bdf02 mrs x2, amevtyper18_el0 -[^:]*: d51bdf03 msr amevtyper18_el0, x3 -[^:]*: d53bdf22 mrs x2, amevtyper19_el0 -[^:]*: d51bdf23 msr amevtyper19_el0, x3 -[^:]*: d53bdf42 mrs x2, amevtyper110_el0 -[^:]*: d51bdf43 msr amevtyper110_el0, x3 -[^:]*: d53bdf62 mrs x2, amevtyper111_el0 -[^:]*: d51bdf63 msr amevtyper111_el0, x3 -[^:]*: d53bdf82 mrs x2, amevtyper112_el0 -[^:]*: d51bdf83 msr amevtyper112_el0, x3 -[^:]*: d53bdfa2 mrs x2, amevtyper113_el0 -[^:]*: d51bdfa3 msr amevtyper113_el0, x3 -[^:]*: d53bdfc2 mrs x2, amevtyper114_el0 -[^:]*: d51bdfc3 msr amevtyper114_el0, x3 -[^:]*: d53bdfe2 mrs x2, amevtyper115_el0 -[^:]*: d51bdfe3 msr amevtyper115_el0, x3 -[^:]*: d53bd2c0 mrs x0, amcg1idr_el0 -[^:]*: d53be0a0 mrs x0, cntpctss_el0 -[^:]*: d53be0c0 mrs x0, cntvctss_el0 -[^:]*: d53c1182 mrs x2, hfgrtr_el2 -[^:]*: d51c1183 msr hfgrtr_el2, x3 -[^:]*: d53c11a2 mrs x2, hfgwtr_el2 -[^:]*: d51c11a3 msr hfgwtr_el2, x3 -[^:]*: d53c11c2 mrs x2, hfgitr_el2 -[^:]*: d51c11c3 msr hfgitr_el2, x3 -[^:]*: d53c3182 mrs x2, hdfgrtr_el2 -[^:]*: d51c3183 msr hdfgrtr_el2, x3 -[^:]*: d53c31a2 mrs x2, hdfgwtr_el2 -[^:]*: d51c31a3 msr hdfgwtr_el2, x3 -[^:]*: d53c31c2 mrs x2, hafgrtr_el2 -[^:]*: d51c31c3 msr hafgrtr_el2, x3 -[^:]*: d53cd802 mrs x2, amevcntvoff00_el2 -[^:]*: d51cd803 msr amevcntvoff00_el2, x3 -[^:]*: d53cd822 mrs x2, amevcntvoff01_el2 -[^:]*: d51cd823 msr amevcntvoff01_el2, x3 -[^:]*: d53cd842 mrs x2, amevcntvoff02_el2 -[^:]*: d51cd843 msr amevcntvoff02_el2, x3 -[^:]*: d53cd862 mrs x2, amevcntvoff03_el2 -[^:]*: d51cd863 msr amevcntvoff03_el2, x3 -[^:]*: d53cd882 mrs x2, amevcntvoff04_el2 -[^:]*: d51cd883 msr amevcntvoff04_el2, x3 -[^:]*: d53cd8a2 mrs x2, amevcntvoff05_el2 -[^:]*: d51cd8a3 msr amevcntvoff05_el2, x3 -[^:]*: d53cd8c2 mrs x2, amevcntvoff06_el2 -[^:]*: d51cd8c3 msr amevcntvoff06_el2, x3 -[^:]*: d53cd8e2 mrs x2, amevcntvoff07_el2 -[^:]*: d51cd8e3 msr amevcntvoff07_el2, x3 -[^:]*: d53cd902 mrs x2, amevcntvoff08_el2 -[^:]*: d51cd903 msr amevcntvoff08_el2, x3 -[^:]*: d53cd922 mrs x2, amevcntvoff09_el2 -[^:]*: d51cd923 msr amevcntvoff09_el2, x3 -[^:]*: d53cd942 mrs x2, amevcntvoff010_el2 -[^:]*: d51cd943 msr amevcntvoff010_el2, x3 -[^:]*: d53cd962 mrs x2, amevcntvoff011_el2 -[^:]*: d51cd963 msr amevcntvoff011_el2, x3 -[^:]*: d53cd982 mrs x2, amevcntvoff012_el2 -[^:]*: d51cd983 msr amevcntvoff012_el2, x3 -[^:]*: d53cd9a2 mrs x2, amevcntvoff013_el2 -[^:]*: d51cd9a3 msr amevcntvoff013_el2, x3 -[^:]*: d53cd9c2 mrs x2, amevcntvoff014_el2 -[^:]*: d51cd9c3 msr amevcntvoff014_el2, x3 -[^:]*: d53cd9e2 mrs x2, amevcntvoff015_el2 -[^:]*: d51cd9e3 msr amevcntvoff015_el2, x3 -[^:]*: d53cda02 mrs x2, amevcntvoff10_el2 -[^:]*: d51cda03 msr amevcntvoff10_el2, x3 -[^:]*: d53cda22 mrs x2, amevcntvoff11_el2 -[^:]*: d51cda23 msr amevcntvoff11_el2, x3 -[^:]*: d53cda42 mrs x2, amevcntvoff12_el2 -[^:]*: d51cda43 msr amevcntvoff12_el2, x3 -[^:]*: d53cda62 mrs x2, amevcntvoff13_el2 -[^:]*: d51cda63 msr amevcntvoff13_el2, x3 -[^:]*: d53cda82 mrs x2, amevcntvoff14_el2 -[^:]*: d51cda83 msr amevcntvoff14_el2, x3 -[^:]*: d53cdaa2 mrs x2, amevcntvoff15_el2 -[^:]*: d51cdaa3 msr amevcntvoff15_el2, x3 -[^:]*: d53cdac2 mrs x2, amevcntvoff16_el2 -[^:]*: d51cdac3 msr amevcntvoff16_el2, x3 -[^:]*: d53cdae2 mrs x2, amevcntvoff17_el2 -[^:]*: d51cdae3 msr amevcntvoff17_el2, x3 -[^:]*: d53cdb02 mrs x2, amevcntvoff18_el2 -[^:]*: d51cdb03 msr amevcntvoff18_el2, x3 -[^:]*: d53cdb22 mrs x2, amevcntvoff19_el2 -[^:]*: d51cdb23 msr amevcntvoff19_el2, x3 -[^:]*: d53cdb42 mrs x2, amevcntvoff110_el2 -[^:]*: d51cdb43 msr amevcntvoff110_el2, x3 -[^:]*: d53cdb62 mrs x2, amevcntvoff111_el2 -[^:]*: d51cdb63 msr amevcntvoff111_el2, x3 -[^:]*: d53cdb82 mrs x2, amevcntvoff112_el2 -[^:]*: d51cdb83 msr amevcntvoff112_el2, x3 -[^:]*: d53cdba2 mrs x2, amevcntvoff113_el2 -[^:]*: d51cdba3 msr amevcntvoff113_el2, x3 -[^:]*: d53cdbc2 mrs x2, amevcntvoff114_el2 -[^:]*: d51cdbc3 msr amevcntvoff114_el2, x3 -[^:]*: d53cdbe2 mrs x2, amevcntvoff115_el2 -[^:]*: d51cdbe3 msr amevcntvoff115_el2, x3 -[^:]*: d53ce0c2 mrs x2, cntpoff_el2 -[^:]*: d51ce0c3 msr cntpoff_el2, x3 -[^:]*: d5389922 mrs x2, pmsnevfr_el1 -[^:]*: d5189923 msr pmsnevfr_el1, x3 -[^:]*: d53c1242 mrs x2, hcrx_el2 -[^:]*: d51c1243 msr hcrx_el2, x3 -[^:]*: d538d0c2 mrs x2, rcwmask_el1 -[^:]*: d518d0c3 msr rcwmask_el1, x3 -[^:]*: d538d062 mrs x2, rcwsmask_el1 -[^:]*: d518d063 msr rcwsmask_el1, x3 diff --git a/gas/testsuite/gas/aarch64/sysreg-8.s b/gas/testsuite/gas/aarch64/sysreg-8.s deleted file mode 100644 index 21daa8c..0000000 --- a/gas/testsuite/gas/aarch64/sysreg-8.s +++ /dev/null @@ -1,192 +0,0 @@ - .macro roreg, name - mrs x0, \name - .endm - - .macro woreg, name - msr \name, x1 - .endm - - .macro rwreg, name - mrs x2, \name - msr \name, x3 - .endm - - roreg id_dfr1_el1 - roreg id_mmfr5_el1 - roreg id_isar6_el1 - - rwreg icc_pmr_el1 - roreg icc_iar0_el1 - woreg icc_eoir0_el1 - roreg icc_hppir0_el1 - rwreg icc_bpr0_el1 - rwreg icc_ap0r0_el1 - rwreg icc_ap0r1_el1 - rwreg icc_ap0r2_el1 - rwreg icc_ap0r3_el1 - rwreg icc_ap1r0_el1 - rwreg icc_ap1r1_el1 - rwreg icc_ap1r2_el1 - rwreg icc_ap1r3_el1 - woreg icc_dir_el1 - roreg icc_rpr_el1 - woreg icc_sgi1r_el1 - woreg icc_asgi1r_el1 - woreg icc_sgi0r_el1 - roreg icc_iar1_el1 - woreg icc_eoir1_el1 - roreg icc_hppir1_el1 - rwreg icc_bpr1_el1 - rwreg icc_ctlr_el1 - rwreg icc_igrpen0_el1 - rwreg icc_igrpen1_el1 - rwreg ich_ap0r0_el2 - rwreg ich_ap0r1_el2 - rwreg ich_ap0r2_el2 - rwreg ich_ap0r3_el2 - rwreg ich_ap1r0_el2 - rwreg ich_ap1r1_el2 - rwreg ich_ap1r2_el2 - rwreg ich_ap1r3_el2 - rwreg ich_hcr_el2 - roreg ich_misr_el2 - roreg ich_eisr_el2 - roreg ich_elrsr_el2 - rwreg ich_vmcr_el2 - rwreg ich_lr0_el2 - rwreg ich_lr1_el2 - rwreg ich_lr2_el2 - rwreg ich_lr3_el2 - rwreg ich_lr4_el2 - rwreg ich_lr5_el2 - rwreg ich_lr6_el2 - rwreg ich_lr7_el2 - rwreg ich_lr8_el2 - rwreg ich_lr9_el2 - rwreg ich_lr10_el2 - rwreg ich_lr11_el2 - rwreg ich_lr12_el2 - rwreg ich_lr13_el2 - rwreg ich_lr14_el2 - rwreg ich_lr15_el2 - rwreg icc_igrpen1_el3 - - .arch armv8.1-a - - roreg lorid_el1 - - .arch armv8.3-a - - roreg ccsidr2_el1 - - .arch armv8.4-a - - rwreg trfcr_el1 - roreg pmmir_el1 - rwreg trfcr_el2 - - rwreg trfcr_el12 - - rwreg amcr_el0 - roreg amcfgr_el0 - roreg amcgcr_el0 - rwreg amuserenr_el0 - rwreg amcntenclr0_el0 - rwreg amcntenset0_el0 - rwreg amcntenclr1_el0 - rwreg amcntenset1_el0 - rwreg amevcntr00_el0 - rwreg amevcntr01_el0 - rwreg amevcntr02_el0 - rwreg amevcntr03_el0 - roreg amevtyper00_el0 - roreg amevtyper01_el0 - roreg amevtyper02_el0 - roreg amevtyper03_el0 - rwreg amevcntr10_el0 - rwreg amevcntr11_el0 - rwreg amevcntr12_el0 - rwreg amevcntr13_el0 - rwreg amevcntr14_el0 - rwreg amevcntr15_el0 - rwreg amevcntr16_el0 - rwreg amevcntr17_el0 - rwreg amevcntr18_el0 - rwreg amevcntr19_el0 - rwreg amevcntr110_el0 - rwreg amevcntr111_el0 - rwreg amevcntr112_el0 - rwreg amevcntr113_el0 - rwreg amevcntr114_el0 - rwreg amevcntr115_el0 - rwreg amevtyper10_el0 - rwreg amevtyper11_el0 - rwreg amevtyper12_el0 - rwreg amevtyper13_el0 - rwreg amevtyper14_el0 - rwreg amevtyper15_el0 - rwreg amevtyper16_el0 - rwreg amevtyper17_el0 - rwreg amevtyper18_el0 - rwreg amevtyper19_el0 - rwreg amevtyper110_el0 - rwreg amevtyper111_el0 - rwreg amevtyper112_el0 - rwreg amevtyper113_el0 - rwreg amevtyper114_el0 - rwreg amevtyper115_el0 - - .arch armv8.6-a - - roreg amcg1idr_el0 - roreg cntpctss_el0 - roreg cntvctss_el0 - rwreg hfgrtr_el2 - rwreg hfgwtr_el2 - rwreg hfgitr_el2 - rwreg hdfgrtr_el2 - rwreg hdfgwtr_el2 - rwreg hafgrtr_el2 - rwreg amevcntvoff00_el2 - rwreg amevcntvoff01_el2 - rwreg amevcntvoff02_el2 - rwreg amevcntvoff03_el2 - rwreg amevcntvoff04_el2 - rwreg amevcntvoff05_el2 - rwreg amevcntvoff06_el2 - rwreg amevcntvoff07_el2 - rwreg amevcntvoff08_el2 - rwreg amevcntvoff09_el2 - rwreg amevcntvoff010_el2 - rwreg amevcntvoff011_el2 - rwreg amevcntvoff012_el2 - rwreg amevcntvoff013_el2 - rwreg amevcntvoff014_el2 - rwreg amevcntvoff015_el2 - rwreg amevcntvoff10_el2 - rwreg amevcntvoff11_el2 - rwreg amevcntvoff12_el2 - rwreg amevcntvoff13_el2 - rwreg amevcntvoff14_el2 - rwreg amevcntvoff15_el2 - rwreg amevcntvoff16_el2 - rwreg amevcntvoff17_el2 - rwreg amevcntvoff18_el2 - rwreg amevcntvoff19_el2 - rwreg amevcntvoff110_el2 - rwreg amevcntvoff111_el2 - rwreg amevcntvoff112_el2 - rwreg amevcntvoff113_el2 - rwreg amevcntvoff114_el2 - rwreg amevcntvoff115_el2 - rwreg cntpoff_el2 - - .arch armv8.7-a - - rwreg pmsnevfr_el1 - rwreg hcrx_el2 - - .arch armv8-a+the - - rwreg rcwmask_el1 - rwreg rcwsmask_el1 diff --git a/gas/testsuite/gas/aarch64/sysreg-diagnostic.d b/gas/testsuite/gas/aarch64/sysreg-diagnostic.d deleted file mode 100644 index 55cdf09..0000000 --- a/gas/testsuite/gas/aarch64/sysreg-diagnostic.d +++ /dev/null @@ -1,16 +0,0 @@ -#objdump: -dr -M notes -#as: -march=armv8-a -#warning_output: sysreg-diagnostic.l - -.*: file format .* - -Disassembly of section \.text: - -.* <.*>: -.*: d5130503 msr dbgdtrtx_el0, x3 -.*: d5130503 msr dbgdtrtx_el0, x3 -.*: d5330503 mrs x3, dbgdtrrx_el0 -.*: d5330503 mrs x3, dbgdtrrx_el0 -.*: d5180003 msr midr_el1, x3 // note: writing to a read-only register -.*: d5180640 msr id_aa64isar2_el1, x0 // note: writing to a read-only register -.*: d5180660 msr id_aa64isar3_el1, x0 // note: writing to a read-only register diff --git a/gas/testsuite/gas/aarch64/sysreg-diagnostic.l b/gas/testsuite/gas/aarch64/sysreg-diagnostic.l deleted file mode 100644 index df3d3e5..0000000 --- a/gas/testsuite/gas/aarch64/sysreg-diagnostic.l +++ /dev/null @@ -1,6 +0,0 @@ -.*: Assembler messages: -.*:3: Warning: specified register cannot be written to at operand 1 -- `msr dbgdtrrx_el0,x3' -.*:5: Warning: specified register cannot be read from at operand 2 -- `mrs x3,dbgdtrtx_el0' -.*:6: Warning: specified register cannot be written to at operand 1 -- `msr midr_el1,x3' -.*:7: Warning: specified register cannot be written to at operand 1 -- `msr id_aa64isar2_el1,x0' -.*:8: Warning: specified register cannot be written to at operand 1 -- `msr id_aa64isar3_el1,x0' diff --git a/gas/testsuite/gas/aarch64/sysreg-diagnostic.s b/gas/testsuite/gas/aarch64/sysreg-diagnostic.s deleted file mode 100644 index d8e48c6..0000000 --- a/gas/testsuite/gas/aarch64/sysreg-diagnostic.s +++ /dev/null @@ -1,8 +0,0 @@ -.text - msr dbgdtrtx_el0, x3 - msr dbgdtrrx_el0, x3 - mrs x3, dbgdtrrx_el0 - mrs x3, dbgdtrtx_el0 - msr midr_el1, x3 - msr id_aa64isar2_el1, x0 - msr id_aa64isar3_el1, x0 diff --git a/gas/testsuite/gas/aarch64/sysreg.d b/gas/testsuite/gas/aarch64/sysreg.d deleted file mode 100644 index d101758..0000000 --- a/gas/testsuite/gas/aarch64/sysreg.d +++ /dev/null @@ -1,35 +0,0 @@ -#objdump: -dr - -.*: file format .* - -Disassembly of section \.text: - -0+ <.*>: - 0: d51b9c67 msr pmovsclr_el0, x7 - 4: d53b9c60 mrs x0, pmovsclr_el0 - 8: d51b9e67 msr pmovsset_el0, x7 - c: d53b9e60 mrs x0, pmovsset_el0 - 10: d5380140 mrs x0, id_dfr0_el1 - 14: d5380100 mrs x0, id_pfr0_el1 - 18: d5380120 mrs x0, id_pfr1_el1 - 1c: d5380160 mrs x0, id_afr0_el1 - 20: d5380180 mrs x0, id_mmfr0_el1 - 24: d53801a0 mrs x0, id_mmfr1_el1 - 28: d53801c0 mrs x0, id_mmfr2_el1 - 2c: d53801e0 mrs x0, id_mmfr3_el1 - 30: d53802c0 mrs x0, id_mmfr4_el1 - 34: d5380200 mrs x0, id_isar0_el1 - 38: d5380220 mrs x0, id_isar1_el1 - 3c: d5380240 mrs x0, id_isar2_el1 - 40: d5380260 mrs x0, id_isar3_el1 - 44: d5380280 mrs x0, id_isar4_el1 - 48: d53802a0 mrs x0, id_isar5_el1 - 4c: d538cf00 mrs x0, s3_0_c12_c15_0 - 50: d5384b00 mrs x0, s3_0_c4_c11_0 - 54: d5184b00 msr s3_0_c4_c11_0, x0 - 58: d5310300 mrs x0, trcstatr - 5c: d5110300 msr trcstatr, x0 - 60: d5380640 mrs x0, id_aa64isar2_el1 - 64: d538065e mrs x30, id_aa64isar2_el1 - 68: d5380660 mrs x0, id_aa64isar3_el1 - 6c: d538067e mrs x30, id_aa64isar3_el1 diff --git a/gas/testsuite/gas/aarch64/sysreg.s b/gas/testsuite/gas/aarch64/sysreg.s deleted file mode 100644 index a3f5b79..0000000 --- a/gas/testsuite/gas/aarch64/sysreg.s +++ /dev/null @@ -1,38 +0,0 @@ - - # Test case for system registers - .text - - msr pmovsclr_el0, x7 - mrs x0, pmovsclr_el0 - - msr pmovsset_el0, x7 - mrs x0, pmovsset_el0 - - mrs x0, id_dfr0_el1 - mrs x0, id_pfr0_el1 - mrs x0, id_pfr1_el1 - mrs x0, id_afr0_el1 - mrs x0, id_mmfr0_el1 - mrs x0, id_mmfr1_el1 - mrs x0, id_mmfr2_el1 - mrs x0, id_mmfr3_el1 - mrs x0, id_mmfr4_el1 - mrs x0, id_isar0_el1 - mrs x0, id_isar1_el1 - mrs x0, id_isar2_el1 - mrs x0, id_isar3_el1 - mrs x0, id_isar4_el1 - mrs x0, id_isar5_el1 - - mrs x0, s3_0_c12_c15_0 - mrs x0, s3_0_c4_c11_0 - msr s3_0_c4_c11_0, x0 - - mrs x0, s2_1_c0_c3_0 - msr s2_1_c0_c3_0, x0 - - mrs x0, id_aa64isar2_el1 - mrs x30, id_aa64isar2_el1 - - mrs x0, id_aa64isar3_el1 - mrs x30, id_aa64isar3_el1 diff --git a/gas/testsuite/gas/aarch64/sysreg/aarch64-sysreg.exp b/gas/testsuite/gas/aarch64/sysreg/aarch64-sysreg.exp new file mode 100644 index 0000000..a60ddda --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/aarch64-sysreg.exp @@ -0,0 +1,23 @@ +# Copyright (C) 2024 Free Software Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. + +# +# Some AArch64 tests for system registers +# + +if {[istarget aarch64*-*-*]} { + run_dump_tests [lsort [glob -nocomplain $srcdir/$subdir/*.d]] +} diff --git a/gas/testsuite/gas/aarch64/sysreg/armv8_8-a-sysregs-invalid.d b/gas/testsuite/gas/aarch64/sysreg/armv8_8-a-sysregs-invalid.d new file mode 100644 index 0000000..5bab9fc --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/armv8_8-a-sysregs-invalid.d @@ -0,0 +1 @@ +#error_output: armv8_8-a-sysregs-invalid.l diff --git a/gas/testsuite/gas/aarch64/sysreg/armv8_8-a-sysregs-invalid.l b/gas/testsuite/gas/aarch64/sysreg/armv8_8-a-sysregs-invalid.l new file mode 100644 index 0000000..c3cf033 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/armv8_8-a-sysregs-invalid.l @@ -0,0 +1,6 @@ +[^:]*: Assembler messages: +[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr allint,#-1' +[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr allint,#2' +[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr allint,#15' +[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr allint,#0x100000000' +[^:]*:[0-9]+: Warning: specified register cannot be written to at operand 1 -- `msr icc_nmiar1_el1,x0' diff --git a/gas/testsuite/gas/aarch64/sysreg/armv8_8-a-sysregs-invalid.s b/gas/testsuite/gas/aarch64/sysreg/armv8_8-a-sysregs-invalid.s new file mode 100644 index 0000000..7534f14 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/armv8_8-a-sysregs-invalid.s @@ -0,0 +1,8 @@ + .arch armv8.8-a + + msr allint, #-1 + msr allint, #2 + msr allint, #15 + msr allint, #0x100000000 + + msr icc_nmiar1_el1, x0 diff --git a/gas/testsuite/gas/aarch64/sysreg/armv8_8-a-sysregs.d b/gas/testsuite/gas/aarch64/sysreg/armv8_8-a-sysregs.d new file mode 100644 index 0000000..294fed2 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/armv8_8-a-sysregs.d @@ -0,0 +1,19 @@ +#as: -march=armv8.8-a +#objdump: -dr + +.*: file format .* + +Disassembly of section \.text: + +0+ <.*>: +[^:]+:\s+d5184300 msr allint, x0 +[^:]+:\s+d518430f msr allint, x15 +[^:]+:\s+d518431e msr allint, x30 +[^:]+:\s+d518431f msr allint, xzr +[^:]+:\s+d5384300 mrs x0, allint +[^:]+:\s+d5384310 mrs x16, allint +[^:]+:\s+d538431e mrs x30, allint +[^:]+:\s+d501401f msr allint, #0x0 +[^:]+:\s+d501411f msr allint, #0x1 +[^:]+:\s+d501421f msr s0_1_c4_c2_0, xzr +[^:]+:\s+d538c9a0 mrs x0, icc_nmiar1_el1 diff --git a/gas/testsuite/gas/aarch64/sysreg/armv8_8-a-sysregs.s b/gas/testsuite/gas/aarch64/sysreg/armv8_8-a-sysregs.s new file mode 100644 index 0000000..dd43ad8 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/armv8_8-a-sysregs.s @@ -0,0 +1,12 @@ + msr allint, x0 + MSR ALLINT, X15 + msr allint, x30 + msr allint, xzr + mrs x0, allint + mrs X16, ALLINT + mrs x30, allint + msr allint, #0 + msr allint, #1 + .inst 0xd501421f + + mrs x0, icc_nmiar1_el1 diff --git a/gas/testsuite/gas/aarch64/sysreg/armv8_9-a-sysregs-bad.d b/gas/testsuite/gas/aarch64/sysreg/armv8_9-a-sysregs-bad.d new file mode 100644 index 0000000..2471b6b --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/armv8_9-a-sysregs-bad.d @@ -0,0 +1,3 @@ +#as: -march=armv8.8-a +#source: armv8_9-a-sysregs.s +#error_output: armv8_9-a-sysregs-bad.l diff --git a/gas/testsuite/gas/aarch64/sysreg/armv8_9-a-sysregs-bad.l b/gas/testsuite/gas/aarch64/sysreg/armv8_9-a-sysregs-bad.l new file mode 100644 index 0000000..02d9cac --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/armv8_9-a-sysregs-bad.l @@ -0,0 +1,126 @@ +.*: Assembler messages: +.*: Error: selected processor does not support system register name 'pmsdsfr_el1' +.*: Error: selected processor does not support system register name 'pmsdsfr_el1' +.*: Error: selected processor does not support system register name 'erxgsr_el1' +.*: Error: selected processor does not support system register name 'sctlr2_el1' +.*: Error: selected processor does not support system register name 'sctlr2_el12' +.*: Error: selected processor does not support system register name 'sctlr2_el2' +.*: Error: selected processor does not support system register name 'sctlr2_el3' +.*: Error: selected processor does not support system register name 'sctlr2_el1' +.*: Error: selected processor does not support system register name 'sctlr2_el12' +.*: Error: selected processor does not support system register name 'sctlr2_el2' +.*: Error: selected processor does not support system register name 'sctlr2_el3' +.*: Error: selected processor does not support system register name 'hdfgrtr2_el2' +.*: Error: selected processor does not support system register name 'hdfgwtr2_el2' +.*: Error: selected processor does not support system register name 'hfgrtr2_el2' +.*: Error: selected processor does not support system register name 'hfgwtr2_el2' +.*: Error: selected processor does not support system register name 'hdfgrtr2_el2' +.*: Error: selected processor does not support system register name 'hdfgwtr2_el2' +.*: Error: selected processor does not support system register name 'hfgrtr2_el2' +.*: Error: selected processor does not support system register name 'hfgwtr2_el2' +.*: Error: selected processor does not support system register name 'pfar_el1' +.*: Error: selected processor does not support system register name 'pfar_el2' +.*: Error: selected processor does not support system register name 'pfar_el12' +.*: Error: selected processor does not support system register name 'pfar_el1' +.*: Error: selected processor does not support system register name 'pfar_el2' +.*: Error: selected processor does not support system register name 'pfar_el12' +.*: Error: selected processor does not support system register name 's1e1a' +.*: Error: selected processor does not support system register name 's1e2a' +.*: Error: selected processor does not support system register name 's1e3a' +.*: Error: selected processor does not support system register name 'amair2_el1' +.*: Error: selected processor does not support system register name 'amair2_el12' +.*: Error: selected processor does not support system register name 'amair2_el2' +.*: Error: selected processor does not support system register name 'amair2_el3' +.*: Error: selected processor does not support system register name 'mair2_el1' +.*: Error: selected processor does not support system register name 'mair2_el12' +.*: Error: selected processor does not support system register name 'mair2_el2' +.*: Error: selected processor does not support system register name 'mair2_el3' +.*: Error: selected processor does not support system register name 'amair2_el1' +.*: Error: selected processor does not support system register name 'amair2_el12' +.*: Error: selected processor does not support system register name 'amair2_el2' +.*: Error: selected processor does not support system register name 'amair2_el3' +.*: Error: selected processor does not support system register name 'mair2_el1' +.*: Error: selected processor does not support system register name 'mair2_el12' +.*: Error: selected processor does not support system register name 'mair2_el2' +.*: Error: selected processor does not support system register name 'mair2_el3' +.*: Error: selected processor does not support system register name 'pir_el1' +.*: Error: selected processor does not support system register name 'pir_el12' +.*: Error: selected processor does not support system register name 'pir_el2' +.*: Error: selected processor does not support system register name 'pir_el3' +.*: Error: selected processor does not support system register name 'pire0_el1' +.*: Error: selected processor does not support system register name 'pire0_el12' +.*: Error: selected processor does not support system register name 'pire0_el2' +.*: Error: selected processor does not support system register name 'pir_el1' +.*: Error: selected processor does not support system register name 'pir_el12' +.*: Error: selected processor does not support system register name 'pir_el2' +.*: Error: selected processor does not support system register name 'pir_el3' +.*: Error: selected processor does not support system register name 'pire0_el1' +.*: Error: selected processor does not support system register name 'pire0_el12' +.*: Error: selected processor does not support system register name 'pire0_el2' +.*: Error: selected processor does not support system register name 's2pir_el2' +.*: Error: selected processor does not support system register name 's2pir_el2' +.*: Error: selected processor does not support system register name 'por_el0' +.*: Error: selected processor does not support system register name 'por_el1' +.*: Error: selected processor does not support system register name 'por_el12' +.*: Error: selected processor does not support system register name 'por_el2' +.*: Error: selected processor does not support system register name 'por_el3' +.*: Error: selected processor does not support system register name 'por_el0' +.*: Error: selected processor does not support system register name 'por_el1' +.*: Error: selected processor does not support system register name 'por_el12' +.*: Error: selected processor does not support system register name 'por_el2' +.*: Error: selected processor does not support system register name 'por_el3' +.*: Error: selected processor does not support system register name 's2por_el1' +.*: Error: selected processor does not support system register name 's2por_el1' +.*: Error: selected processor does not support system register name 'tcr2_el1' +.*: Error: selected processor does not support system register name 'tcr2_el12' +.*: Error: selected processor does not support system register name 'tcr2_el2' +.*: Error: selected processor does not support system register name 'tcr2_el1' +.*: Error: selected processor does not support system register name 'tcr2_el12' +.*: Error: selected processor does not support system register name 'tcr2_el2' +.*: Error: selected processor does not support system register name 'mdselr_el1' +.*: Error: selected processor does not support system register name 'mdselr_el1' +.*: Error: selected processor does not support system register name 'pmuacr_el1' +.*: Error: selected processor does not support system register name 'pmuacr_el1' +.*: Error: selected processor does not support system register name 'pmccntsvr_el1' +.*: Error: selected processor does not support system register name 'pmicntsvr_el1' +.*: Error: selected processor does not support system register name 'pmsscr_el1' +.*: Error: selected processor does not support system register name 'pmsscr_el1' +.*: Error: selected processor does not support system register name 'pmevcntsvr0_el1' +.*: Error: selected processor does not support system register name 'pmevcntsvr10_el1' +.*: Error: selected processor does not support system register name 'pmevcntsvr11_el1' +.*: Error: selected processor does not support system register name 'pmevcntsvr12_el1' +.*: Error: selected processor does not support system register name 'pmevcntsvr13_el1' +.*: Error: selected processor does not support system register name 'pmevcntsvr14_el1' +.*: Error: selected processor does not support system register name 'pmevcntsvr15_el1' +.*: Error: selected processor does not support system register name 'pmevcntsvr16_el1' +.*: Error: selected processor does not support system register name 'pmevcntsvr17_el1' +.*: Error: selected processor does not support system register name 'pmevcntsvr18_el1' +.*: Error: selected processor does not support system register name 'pmevcntsvr19_el1' +.*: Error: selected processor does not support system register name 'pmevcntsvr1_el1' +.*: Error: selected processor does not support system register name 'pmevcntsvr20_el1' +.*: Error: selected processor does not support system register name 'pmevcntsvr21_el1' +.*: Error: selected processor does not support system register name 'pmevcntsvr22_el1' +.*: Error: selected processor does not support system register name 'pmevcntsvr23_el1' +.*: Error: selected processor does not support system register name 'pmevcntsvr24_el1' +.*: Error: selected processor does not support system register name 'pmevcntsvr25_el1' +.*: Error: selected processor does not support system register name 'pmevcntsvr26_el1' +.*: Error: selected processor does not support system register name 'pmevcntsvr27_el1' +.*: Error: selected processor does not support system register name 'pmevcntsvr28_el1' +.*: Error: selected processor does not support system register name 'pmevcntsvr29_el1' +.*: Error: selected processor does not support system register name 'pmevcntsvr30_el1' +.*: Error: selected processor does not support system register name 'pmevcntsvr3_el1' +.*: Error: selected processor does not support system register name 'pmevcntsvr4_el1' +.*: Error: selected processor does not support system register name 'pmevcntsvr5_el1' +.*: Error: selected processor does not support system register name 'pmevcntsvr6_el1' +.*: Error: selected processor does not support system register name 'pmevcntsvr7_el1' +.*: Error: selected processor does not support system register name 'pmevcntsvr8_el1' +.*: Error: selected processor does not support system register name 'pmevcntsvr9_el1' +.*: Error: selected processor does not support system register name 'pmicntr_el0' +.*: Error: selected processor does not support system register name 'pmicntr_el0' +.*: Error: selected processor does not support system register name 'pmicfiltr_el0' +.*: Error: selected processor does not support system register name 'pmicfiltr_el0' +.*: Error: selected processor does not support system register name 'pmzr_el0' +.*: Error: selected processor does not support system register name 'pmecr_el1' +.*: Error: selected processor does not support system register name 'pmecr_el1' +.*: Error: selected processor does not support system register name 'pmiar_el1' +.*: Error: selected processor does not support system register name 'pmiar_el1' diff --git a/gas/testsuite/gas/aarch64/sysreg/armv8_9-a-sysregs.d b/gas/testsuite/gas/aarch64/sysreg/armv8_9-a-sysregs.d new file mode 100644 index 0000000..dc1e8bc --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/armv8_9-a-sysregs.d @@ -0,0 +1,133 @@ +#as: -march=armv8.9-a +#objdump: -dr + +.*: file format .* + +Disassembly of section \.text: + +0+ <.*>: +.*: d53c9a83 mrs x3, pmsdsfr_el1 +.*: d51c9a83 msr pmsdsfr_el1, x3 +.*: d5385340 mrs x0, erxgsr_el1 +.*: d5181063 msr sctlr2_el1, x3 +.*: d51d1063 msr sctlr2_el12, x3 +.*: d51c1063 msr sctlr2_el2, x3 +.*: d51e1063 msr sctlr2_el3, x3 +.*: d5381063 mrs x3, sctlr2_el1 +.*: d53d1063 mrs x3, sctlr2_el12 +.*: d53c1063 mrs x3, sctlr2_el2 +.*: d53e1063 mrs x3, sctlr2_el3 +.*: d53c3103 mrs x3, hdfgrtr2_el2 +.*: d53c3123 mrs x3, hdfgwtr2_el2 +.*: d53c3143 mrs x3, hfgrtr2_el2 +.*: d53c3163 mrs x3, hfgwtr2_el2 +.*: d51c3103 msr hdfgrtr2_el2, x3 +.*: d51c3123 msr hdfgwtr2_el2, x3 +.*: d51c3143 msr hfgrtr2_el2, x3 +.*: d51c3163 msr hfgwtr2_el2, x3 +.*: d53860a0 mrs x0, pfar_el1 +.*: d53c60a0 mrs x0, pfar_el2 +.*: d53d60a0 mrs x0, pfar_el12 +.*: d51860a0 msr pfar_el1, x0 +.*: d51c60a0 msr pfar_el2, x0 +.*: d51d60a0 msr pfar_el12, x0 +.*: d5087941 at s1e1a, x1 +.*: d50c7943 at s1e2a, x3 +.*: d50e7945 at s1e3a, x5 +.*: d538a320 mrs x0, amair2_el1 +.*: d53da320 mrs x0, amair2_el12 +.*: d53ca320 mrs x0, amair2_el2 +.*: d53ea320 mrs x0, amair2_el3 +.*: d538a220 mrs x0, mair2_el1 +.*: d53da220 mrs x0, mair2_el12 +.*: d53ca120 mrs x0, mair2_el2 +.*: d53ea120 mrs x0, mair2_el3 +.*: d518a320 msr amair2_el1, x0 +.*: d51da320 msr amair2_el12, x0 +.*: d51ca320 msr amair2_el2, x0 +.*: d51ea320 msr amair2_el3, x0 +.*: d518a220 msr mair2_el1, x0 +.*: d51da220 msr mair2_el12, x0 +.*: d51ca120 msr mair2_el2, x0 +.*: d51ea120 msr mair2_el3, x0 +.*: d538a260 mrs x0, pir_el1 +.*: d53da260 mrs x0, pir_el12 +.*: d53ca260 mrs x0, pir_el2 +.*: d53ea260 mrs x0, pir_el3 +.*: d538a240 mrs x0, pire0_el1 +.*: d53da240 mrs x0, pire0_el12 +.*: d53ca240 mrs x0, pire0_el2 +.*: d518a260 msr pir_el1, x0 +.*: d51da260 msr pir_el12, x0 +.*: d51ca260 msr pir_el2, x0 +.*: d51ea260 msr pir_el3, x0 +.*: d518a240 msr pire0_el1, x0 +.*: d51da240 msr pire0_el12, x0 +.*: d51ca240 msr pire0_el2, x0 +.*: d53ca2a0 mrs x0, s2pir_el2 +.*: d51ca2a0 msr s2pir_el2, x0 +.*: d53ba280 mrs x0, por_el0 +.*: d538a280 mrs x0, por_el1 +.*: d53da280 mrs x0, por_el12 +.*: d53ca280 mrs x0, por_el2 +.*: d53ea280 mrs x0, por_el3 +.*: d51ba280 msr por_el0, x0 +.*: d518a280 msr por_el1, x0 +.*: d51da280 msr por_el12, x0 +.*: d51ca280 msr por_el2, x0 +.*: d51ea280 msr por_el3, x0 +.*: d538a2a0 mrs x0, s2por_el1 +.*: d518a2a0 msr s2por_el1, x0 +.*: d5382060 mrs x0, tcr2_el1 +.*: d53d2060 mrs x0, tcr2_el12 +.*: d53c2060 mrs x0, tcr2_el2 +.*: d5182060 msr tcr2_el1, x0 +.*: d51d2060 msr tcr2_el12, x0 +.*: d51c2060 msr tcr2_el2, x0 +.*: d5300440 mrs x0, mdselr_el1 +.*: d5100440 msr mdselr_el1, x0 +.*: d5389e80 mrs x0, pmuacr_el1 +.*: d5189e80 msr pmuacr_el1, x0 +.*: d530ebe0 mrs x0, pmccntsvr_el1 +.*: d530ec00 mrs x0, pmicntsvr_el1 +.*: d5389d60 mrs x0, pmsscr_el1 +.*: d5189d60 msr pmsscr_el1, x0 +.*: d530e800 mrs x0, pmevcntsvr0_el1 +.*: d530e940 mrs x0, pmevcntsvr10_el1 +.*: d530e960 mrs x0, pmevcntsvr11_el1 +.*: d530e980 mrs x0, pmevcntsvr12_el1 +.*: d530e9a0 mrs x0, pmevcntsvr13_el1 +.*: d530e9c0 mrs x0, pmevcntsvr14_el1 +.*: d530e9e0 mrs x0, pmevcntsvr15_el1 +.*: d530ea00 mrs x0, pmevcntsvr16_el1 +.*: d530ea20 mrs x0, pmevcntsvr17_el1 +.*: d530ea40 mrs x0, pmevcntsvr18_el1 +.*: d530ea60 mrs x0, pmevcntsvr19_el1 +.*: d530e820 mrs x0, pmevcntsvr1_el1 +.*: d530ea80 mrs x0, pmevcntsvr20_el1 +.*: d530eaa0 mrs x0, pmevcntsvr21_el1 +.*: d530eac0 mrs x0, pmevcntsvr22_el1 +.*: d530eae0 mrs x0, pmevcntsvr23_el1 +.*: d530eb00 mrs x0, pmevcntsvr24_el1 +.*: d530eb20 mrs x0, pmevcntsvr25_el1 +.*: d530eb40 mrs x0, pmevcntsvr26_el1 +.*: d530eb60 mrs x0, pmevcntsvr27_el1 +.*: d530eb80 mrs x0, pmevcntsvr28_el1 +.*: d530eba0 mrs x0, pmevcntsvr29_el1 +.*: d530ebc0 mrs x0, pmevcntsvr30_el1 +.*: d530e860 mrs x0, pmevcntsvr3_el1 +.*: d530e880 mrs x0, pmevcntsvr4_el1 +.*: d530e8a0 mrs x0, pmevcntsvr5_el1 +.*: d530e8c0 mrs x0, pmevcntsvr6_el1 +.*: d530e8e0 mrs x0, pmevcntsvr7_el1 +.*: d530e900 mrs x0, pmevcntsvr8_el1 +.*: d530e920 mrs x0, pmevcntsvr9_el1 +.*: d53b9400 mrs x0, pmicntr_el0 +.*: d51b9400 msr pmicntr_el0, x0 +.*: d53b9600 mrs x0, pmicfiltr_el0 +.*: d51b9600 msr pmicfiltr_el0, x0 +.*: d51b9d80 msr pmzr_el0, x0 +.*: d5389ea0 mrs x0, pmecr_el1 +.*: d5189ea0 msr pmecr_el1, x0 +.*: d5389ee0 mrs x0, pmiar_el1 +.*: d5189ee0 msr pmiar_el1, x0 \ No newline at end of file diff --git a/gas/testsuite/gas/aarch64/sysreg/armv8_9-a-sysregs.s b/gas/testsuite/gas/aarch64/sysreg/armv8_9-a-sysregs.s new file mode 100644 index 0000000..5366318 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/armv8_9-a-sysregs.s @@ -0,0 +1,157 @@ + mrs x3, PMSDSFR_EL1 + msr PMSDSFR_EL1, x3 + + mrs x0, ERXGSR_EL1 + + msr SCTLR2_EL1, x3 + msr SCTLR2_EL12, x3 + msr SCTLR2_EL2, x3 + msr SCTLR2_EL3, x3 + mrs x3, SCTLR2_EL1 + mrs x3, SCTLR2_EL12 + mrs x3, SCTLR2_EL2 + mrs x3, SCTLR2_EL3 + + mrs x3, HDFGRTR2_EL2 + mrs x3, HDFGWTR2_EL2 + mrs x3, HFGRTR2_EL2 + mrs x3, HFGWTR2_EL2 + msr HDFGRTR2_EL2, x3 + msr HDFGWTR2_EL2, x3 + msr HFGRTR2_EL2, x3 + msr HFGWTR2_EL2, x3 + + mrs x0, PFAR_EL1 + mrs x0, PFAR_EL2 + mrs x0, PFAR_EL12 + msr PFAR_EL1, x0 + msr PFAR_EL2, x0 + msr PFAR_EL12, x0 + + /* AT. */ + at s1e1a, x1 + at s1e2a, x3 + at s1e3a, x5 + + /* FEAT_AIE. */ + mrs x0, amair2_el1 + mrs x0, amair2_el12 + mrs x0, amair2_el2 + mrs x0, amair2_el3 + mrs x0, mair2_el1 + mrs x0, mair2_el12 + mrs x0, mair2_el2 + mrs x0, mair2_el3 + + msr amair2_el1, x0 + msr amair2_el12, x0 + msr amair2_el2, x0 + msr amair2_el3, x0 + msr mair2_el1, x0 + msr mair2_el12, x0 + msr mair2_el2, x0 + msr mair2_el3, x0 + + /* FEAT_S1PIE. */ + mrs x0, pir_el1 + mrs x0, pir_el12 + mrs x0, pir_el2 + mrs x0, pir_el3 + mrs x0, pire0_el1 + mrs x0, pire0_el12 + mrs x0, pire0_el2 + + msr pir_el1, x0 + msr pir_el12, x0 + msr pir_el2, x0 + msr pir_el3, x0 + msr pire0_el1, x0 + msr pire0_el12, x0 + msr pire0_el2, x0 + + /* FEAT_S2PIE. */ + mrs x0, s2pir_el2 + msr s2pir_el2, x0 + + /* FEAT_S1POE. */ + mrs x0, por_el0 + mrs x0, por_el1 + mrs x0, por_el12 + mrs x0, por_el2 + mrs x0, por_el3 + + msr por_el0, x0 + msr por_el1, x0 + msr por_el12, x0 + msr por_el2, x0 + msr por_el3, x0 + + /* FEAT_S21POE. */ + mrs x0, s2por_el1 + msr s2por_el1, x0 + + /* FEAT_TCR2. */ + mrs x0, tcr2_el1 + mrs x0, tcr2_el12 + mrs x0, tcr2_el2 + + msr tcr2_el1, x0 + msr tcr2_el12, x0 + msr tcr2_el2, x0 + + /* FEAT_DEBUGv8p9 Extension. */ + mrs x0, mdselr_el1 + msr mdselr_el1, x0 + + /* FEAT_PMUv3p9 Extension. */ + mrs x0, pmuacr_el1 + msr pmuacr_el1, x0 + + /* FEAT_PMUv3_SS Extension. */ + mrs x0, pmccntsvr_el1 + mrs x0, pmicntsvr_el1 + mrs x0, pmsscr_el1 + msr pmsscr_el1, x0 + mrs x0, pmevcntsvr0_el1 + mrs x0, pmevcntsvr10_el1 + mrs x0, pmevcntsvr11_el1 + mrs x0, pmevcntsvr12_el1 + mrs x0, pmevcntsvr13_el1 + mrs x0, pmevcntsvr14_el1 + mrs x0, pmevcntsvr15_el1 + mrs x0, pmevcntsvr16_el1 + mrs x0, pmevcntsvr17_el1 + mrs x0, pmevcntsvr18_el1 + mrs x0, pmevcntsvr19_el1 + mrs x0, pmevcntsvr1_el1 + mrs x0, pmevcntsvr20_el1 + mrs x0, pmevcntsvr21_el1 + mrs x0, pmevcntsvr22_el1 + mrs x0, pmevcntsvr23_el1 + mrs x0, pmevcntsvr24_el1 + mrs x0, pmevcntsvr25_el1 + mrs x0, pmevcntsvr26_el1 + mrs x0, pmevcntsvr27_el1 + mrs x0, pmevcntsvr28_el1 + mrs x0, pmevcntsvr29_el1 + mrs x0, pmevcntsvr30_el1 + mrs x0, pmevcntsvr3_el1 + mrs x0, pmevcntsvr4_el1 + mrs x0, pmevcntsvr5_el1 + mrs x0, pmevcntsvr6_el1 + mrs x0, pmevcntsvr7_el1 + mrs x0, pmevcntsvr8_el1 + mrs x0, pmevcntsvr9_el1 + + /* FEAT_PMUv3_ICNTR Extension. */ + mrs x0, pmicntr_el0 + msr pmicntr_el0, x0 + mrs x0, pmicfiltr_el0 + msr pmicfiltr_el0, x0 + msr pmzr_el0, x0 + + /* FEAT_SEBEP Extension. */ + mrs x0, pmecr_el1 + msr pmecr_el1, x0 + mrs x0, pmiar_el1 + msr pmiar_el1, x0 diff --git a/gas/testsuite/gas/aarch64/sysreg/gcs-sysregs-bad.d b/gas/testsuite/gas/aarch64/sysreg/gcs-sysregs-bad.d new file mode 100644 index 0000000..439c1bd --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/gcs-sysregs-bad.d @@ -0,0 +1,3 @@ +#as: -march=armv8-a +#source: gcs-sysregs.s +#error_output: gcs-sysregs-bad.l diff --git a/gas/testsuite/gas/aarch64/sysreg/gcs-sysregs-bad.l b/gas/testsuite/gas/aarch64/sysreg/gcs-sysregs-bad.l new file mode 100644 index 0000000..9ebfd8c --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/gcs-sysregs-bad.l @@ -0,0 +1,21 @@ +[^:]*: Assembler messages: +.*: Error: selected processor does not support system register name 'gcscr_el1' +.*: Error: selected processor does not support system register name 'gcscr_el1' +.*: Error: selected processor does not support system register name 'gcspr_el1' +.*: Error: selected processor does not support system register name 'gcspr_el1' +.*: Error: selected processor does not support system register name 'gcscr_el2' +.*: Error: selected processor does not support system register name 'gcscr_el2' +.*: Error: selected processor does not support system register name 'gcspr_el2' +.*: Error: selected processor does not support system register name 'gcspr_el2' +.*: Error: selected processor does not support system register name 'gcscr_el3' +.*: Error: selected processor does not support system register name 'gcscr_el3' +.*: Error: selected processor does not support system register name 'gcspr_el3' +.*: Error: selected processor does not support system register name 'gcspr_el3' +.*: Error: selected processor does not support system register name 'gcspr_el0' +.*: Error: selected processor does not support system register name 'gcspr_el0' +.*: Error: selected processor does not support system register name 'gcspr_el12' +.*: Error: selected processor does not support system register name 'gcspr_el12' +.*: Error: selected processor does not support system register name 'gcscr_el12' +.*: Error: selected processor does not support system register name 'gcscr_el12' +.*: Error: selected processor does not support system register name 'gcscre0_el1' +.*: Error: selected processor does not support system register name 'gcscre0_el1' diff --git a/gas/testsuite/gas/aarch64/sysreg/gcs-sysregs.d b/gas/testsuite/gas/aarch64/sysreg/gcs-sysregs.d new file mode 100644 index 0000000..f75c270 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/gcs-sysregs.d @@ -0,0 +1,29 @@ +#name: Test of Guarded Control Stack system registers +#as: -march=armv8.8-a+gcs +#objdump: -dr + +.*: file format .* + +Disassembly of section \.text: + +0+ <.*>: +.*: d5182500 msr gcscr_el1, x0 +.*: d538251e mrs x30, gcscr_el1 +.*: d5182520 msr gcspr_el1, x0 +.*: d538253e mrs x30, gcspr_el1 +.*: d51c2500 msr gcscr_el2, x0 +.*: d53c251e mrs x30, gcscr_el2 +.*: d51c2520 msr gcspr_el2, x0 +.*: d53c253e mrs x30, gcspr_el2 +.*: d51e2500 msr gcscr_el3, x0 +.*: d53e251e mrs x30, gcscr_el3 +.*: d51e2520 msr gcspr_el3, x0 +.*: d53e253e mrs x30, gcspr_el3 +.*: d51b2520 msr gcspr_el0, x0 +.*: d53b253e mrs x30, gcspr_el0 +.*: d51d2520 msr gcspr_el12, x0 +.*: d53d253e mrs x30, gcspr_el12 +.*: d51d2500 msr gcscr_el12, x0 +.*: d53d251e mrs x30, gcscr_el12 +.*: d5182540 msr gcscre0_el1, x0 +.*: d538255e mrs x30, gcscre0_el1 diff --git a/gas/testsuite/gas/aarch64/sysreg/gcs-sysregs.s b/gas/testsuite/gas/aarch64/sysreg/gcs-sysregs.s new file mode 100644 index 0000000..0f5de015 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/gcs-sysregs.s @@ -0,0 +1,20 @@ + msr gcscr_el1, x0 + mrs x30, gcscr_el1 + msr gcspr_el1, x0 + mrs x30, gcspr_el1 + msr gcscr_el2, x0 + mrs x30, gcscr_el2 + msr gcspr_el2, x0 + mrs x30, gcspr_el2 + msr gcscr_el3, x0 + mrs x30, gcscr_el3 + msr gcspr_el3, x0 + mrs x30, gcspr_el3 + msr gcspr_el0, x0 + mrs x30, gcspr_el0 + msr gcspr_el12, x0 + mrs x30, gcspr_el12 + msr gcscr_el12, x0 + mrs x30, gcscr_el12 + msr gcscre0_el1, x0 + mrs x30, gcscre0_el1 diff --git a/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-2.d b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-2.d new file mode 100644 index 0000000..bff7ea7 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-2.d @@ -0,0 +1,2 @@ +#source: illegal-sysreg-2.s +#warning_output: illegal-sysreg-2.l diff --git a/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-2.l b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-2.l new file mode 100644 index 0000000..60aa5c2 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-2.l @@ -0,0 +1,2 @@ +.*: Assembler messages: +.*: Warning: specified register cannot be written to at operand 1 -- `msr pmsidr_el1,x0' diff --git a/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-2.s b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-2.s new file mode 100644 index 0000000..f95584c --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-2.s @@ -0,0 +1,3 @@ +/* Write to R/O system registers. */ +.arch armv8.2-a+profile +msr pmsidr_el1, x0 diff --git a/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-3.d b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-3.d new file mode 100644 index 0000000..932eb54 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-3.d @@ -0,0 +1,3 @@ +#as: -march=armv8-a +#source: sysreg-3.s +#error_output: illegal-sysreg-3.l diff --git a/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-3.l b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-3.l new file mode 100644 index 0000000..513fdb7 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-3.l @@ -0,0 +1,41 @@ +[^:]*: Assembler messages: +[^:]*:[0-9]+: Error: selected processor does not support system register name 'apiakeylo_el1' +[^:]*:[0-9]+: *Info: macro .* +[^:]*:[0-9]+: Error: selected processor does not support system register name 'apiakeylo_el1' +[^:]*:[0-9]+: *Info: macro .* +[^:]*:[0-9]+: Error: selected processor does not support system register name 'apiakeyhi_el1' +[^:]*:[0-9]+: *Info: macro .* +[^:]*:[0-9]+: Error: selected processor does not support system register name 'apiakeyhi_el1' +[^:]*:[0-9]+: *Info: macro .* +[^:]*:[0-9]+: Error: selected processor does not support system register name 'apibkeylo_el1' +[^:]*:[0-9]+: *Info: macro .* +[^:]*:[0-9]+: Error: selected processor does not support system register name 'apibkeylo_el1' +[^:]*:[0-9]+: *Info: macro .* +[^:]*:[0-9]+: Error: selected processor does not support system register name 'apibkeyhi_el1' +[^:]*:[0-9]+: *Info: macro .* +[^:]*:[0-9]+: Error: selected processor does not support system register name 'apibkeyhi_el1' +[^:]*:[0-9]+: *Info: macro .* +[^:]*:[0-9]+: Error: selected processor does not support system register name 'apdakeylo_el1' +[^:]*:[0-9]+: *Info: macro .* +[^:]*:[0-9]+: Error: selected processor does not support system register name 'apdakeylo_el1' +[^:]*:[0-9]+: *Info: macro .* +[^:]*:[0-9]+: Error: selected processor does not support system register name 'apdakeyhi_el1' +[^:]*:[0-9]+: *Info: macro .* +[^:]*:[0-9]+: Error: selected processor does not support system register name 'apdakeyhi_el1' +[^:]*:[0-9]+: *Info: macro .* +[^:]*:[0-9]+: Error: selected processor does not support system register name 'apdbkeylo_el1' +[^:]*:[0-9]+: *Info: macro .* +[^:]*:[0-9]+: Error: selected processor does not support system register name 'apdbkeylo_el1' +[^:]*:[0-9]+: *Info: macro .* +[^:]*:[0-9]+: Error: selected processor does not support system register name 'apdbkeyhi_el1' +[^:]*:[0-9]+: *Info: macro .* +[^:]*:[0-9]+: Error: selected processor does not support system register name 'apdbkeyhi_el1' +[^:]*:[0-9]+: *Info: macro .* +[^:]*:[0-9]+: Error: selected processor does not support system register name 'apgakeylo_el1' +[^:]*:[0-9]+: *Info: macro .* +[^:]*:[0-9]+: Error: selected processor does not support system register name 'apgakeylo_el1' +[^:]*:[0-9]+: *Info: macro .* +[^:]*:[0-9]+: Error: selected processor does not support system register name 'apgakeyhi_el1' +[^:]*:[0-9]+: *Info: macro .* +[^:]*:[0-9]+: Error: selected processor does not support system register name 'apgakeyhi_el1' +[^:]*:[0-9]+: *Info: macro .* diff --git a/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-4.d b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-4.d new file mode 100644 index 0000000..e181566 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-4.d @@ -0,0 +1,3 @@ +#as: -march=armv8-a +#source: sysreg-4.s +#error_output: illegal-sysreg-4.l diff --git a/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-4.l b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-4.l new file mode 100644 index 0000000..590f20e --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-4.l @@ -0,0 +1,56 @@ +[^:]*: Assembler messages: +[^:]*:[0-9]+: Error: selected processor does not support system register name 'rctx' +[^:]*:[0-9]+: Error: selected processor does not support `cfp rctx,x1' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'rctx' +[^:]*:[0-9]+: Error: selected processor does not support `dvp rctx,x2' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'rctx' +[^:]*:[0-9]+: Error: selected processor does not support `cpp rctx,x3' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'cvadp' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'rndr' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'rndrrs' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'scxtnum_el0' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'scxtnum_el1' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'scxtnum_el2' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'scxtnum_el3' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'scxtnum_el12' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'id_pfr2_el1' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'tco' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'tco' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'tfsre0_el1' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'tfsr_el1' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'tfsr_el2' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'tfsr_el3' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'tfsr_el12' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'rgsr_el1' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'gcr_el1' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'gmid_el1' +[^:]*:[0-9]+: Error: selected processor does not support PSTATE field name 'tco' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'tco' +[^:]*:[0-9]+: Error: selected processor does not support PSTATE field name 'tco' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'tco' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'tfsre0_el1' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'tfsr_el1' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'tfsr_el2' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'tfsr_el3' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'tfsr_el12' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'rgsr_el1' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'gcr_el1' +[^:]*:[0-9]+: Error: selected processor does not support PSTATE field name 'tco' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'igvac' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'igsw' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'cgsw' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'cigsw' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'cgvac' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'cgvap' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'cgvadp' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'cigvac' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'gva' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'igdvac' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'igdsw' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'cgdsw' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'cigdsw' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'cgdvac' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'cgdvap' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'cgdvadp' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'cigdvac' +[^:]*:[0-9]+: Error: selected processor does not support system register name 'gzva' diff --git a/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-4b.d b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-4b.d new file mode 100644 index 0000000..1504f5f --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-4b.d @@ -0,0 +1,2 @@ +#as: -march=armv8-a +#error_output: illegal-sysreg-4b.l diff --git a/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-4b.l b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-4b.l new file mode 100644 index 0000000..69987b4 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-4b.l @@ -0,0 +1,11 @@ +[^:]*: Assembler messages: +[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr TCO,#-1' +[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr TCO,#2' +[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr TCO,#15' +[^:]*:[0-9]+: Error: immediate value out of range 0 to 1 at operand 2 -- `msr TCO,#0x100000000' +[^:]*:[0-9]+: Error: immediate value out of range 0 to 15 at operand 2 -- `msr daifclr,#-1' +[^:]*:[0-9]+: Error: immediate value out of range 0 to 15 at operand 2 -- `msr daifclr,#16' +[^:]*:[0-9]+: Error: immediate value out of range 0 to 15 at operand 2 -- `msr daifclr,#0x200000000' +[^:]*:[0-9]+: Error: immediate value out of range 0 to 15 at operand 2 -- `msr daifset,#-1' +[^:]*:[0-9]+: Error: immediate value out of range 0 to 15 at operand 2 -- `msr daifset,#16' +[^:]*:[0-9]+: Error: immediate value out of range 0 to 15 at operand 2 -- `msr daifset,#0x200000000' diff --git a/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-4b.s b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-4b.s new file mode 100644 index 0000000..d7e8476 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-4b.s @@ -0,0 +1,14 @@ + .arch armv8.5-a+memtag + + msr TCO, #-1 + msr TCO, #2 + msr TCO, #15 + msr TCO, #0x100000000 + + msr daifclr, #-1 + msr daifclr, #16 + msr daifclr, #0x200000000 + + msr daifset, #-1 + msr daifset, #16 + msr daifset, #0x200000000 diff --git a/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-5.d b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-5.d new file mode 100644 index 0000000..d108d0f --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-5.d @@ -0,0 +1,3 @@ +#as: -march=armv8.3-a +#source: sysreg-5.s +#error_output: illegal-sysreg-5.l diff --git a/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-5.l b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-5.l new file mode 100644 index 0000000..cd3eff8 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-5.l @@ -0,0 +1,2 @@ +[^:]*: Assembler messages: +[^:]*:[0-9]+: Error: selected processor does not support system register name 'rvae1is' diff --git a/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-7.d b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-7.d new file mode 100644 index 0000000..98bc9a0 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-7.d @@ -0,0 +1,2 @@ +#source: illegal-sysreg-7.s +#error_output: illegal-sysreg-7.l diff --git a/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-7.l b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-7.l new file mode 100644 index 0000000..697b706 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-7.l @@ -0,0 +1,6 @@ +.*: Assembler messages: +.*: Error: selected processor does not support system register name 'lorc_el1' +.*: Error: selected processor does not support system register name 'lorea_el1' +.*: Error: selected processor does not support system register name 'lorn_el1' +.*: Error: selected processor does not support system register name 'lorsa_el1' +.*: Warning: specified register cannot be written to at operand 1 -- `msr ich_vtr_el2,x0' diff --git a/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-7.s b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-7.s new file mode 100644 index 0000000..3109453 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-7.s @@ -0,0 +1,8 @@ +/* Missing +lor. */ +mrs x0, lorc_el1 +mrs x0, lorea_el1 +mrs x0, lorn_el1 +mrs x0, lorsa_el1 + +/* Write to R/O system registers. */ +msr ich_vtr_el2, x0 diff --git a/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-8.d b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-8.d new file mode 100644 index 0000000..f0c0d60 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-8.d @@ -0,0 +1 @@ +#error_output: illegal-sysreg-8.l diff --git a/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-8.l b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-8.l new file mode 100644 index 0000000..773e8d8 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-8.l @@ -0,0 +1,377 @@ +.*: Assembler messages: +.*: Error: selected processor does not support system register name 'lorid_el1' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'ccsidr2_el1' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'rcwmask_el1' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'rcwmask_el1' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'rcwsmask_el1' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'rcwsmask_el1' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'trfcr_el1' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'trfcr_el1' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'pmmir_el1' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'trfcr_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'trfcr_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'trfcr_el12' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'trfcr_el12' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amcr_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amcr_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amcfgr_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amcgcr_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amuserenr_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amuserenr_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amcntenclr0_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amcntenclr0_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amcntenset0_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amcntenset0_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amcntenclr1_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amcntenclr1_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amcntenset1_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amcntenset1_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr00_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr00_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr01_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr01_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr02_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr02_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr03_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr03_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevtyper00_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevtyper01_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevtyper02_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevtyper03_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr10_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr10_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr11_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr11_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr12_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr12_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr13_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr13_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr14_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr14_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr15_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr15_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr16_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr16_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr17_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr17_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr18_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr18_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr19_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr19_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr110_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr110_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr111_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr111_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr112_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr112_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr113_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr113_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr114_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr114_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr115_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntr115_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevtyper10_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevtyper10_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevtyper11_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevtyper11_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevtyper12_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevtyper12_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevtyper13_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevtyper13_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevtyper14_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevtyper14_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevtyper15_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevtyper15_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevtyper16_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevtyper16_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevtyper17_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevtyper17_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevtyper18_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevtyper18_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevtyper19_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevtyper19_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevtyper110_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevtyper110_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevtyper111_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevtyper111_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevtyper112_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevtyper112_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevtyper113_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevtyper113_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevtyper114_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevtyper114_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevtyper115_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevtyper115_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amcg1idr_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'cntpctss_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'cntvctss_el0' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'hfgrtr_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'hfgrtr_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'hfgwtr_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'hfgwtr_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'hfgitr_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'hfgitr_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'hdfgrtr_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'hdfgrtr_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'hdfgwtr_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'hdfgwtr_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'hafgrtr_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'hafgrtr_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff00_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff00_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff01_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff01_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff02_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff02_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff03_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff03_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff04_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff04_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff05_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff05_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff06_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff06_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff07_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff07_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff08_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff08_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff09_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff09_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff010_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff010_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff011_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff011_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff012_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff012_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff013_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff013_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff014_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff014_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff015_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff015_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff10_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff10_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff11_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff11_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff12_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff12_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff13_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff13_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff14_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff14_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff15_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff15_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff16_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff16_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff17_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff17_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff18_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff18_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff19_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff19_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff110_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff110_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff111_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff111_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff112_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff112_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff113_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff113_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff114_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff114_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff115_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'amevcntvoff115_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'cntpoff_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'cntpoff_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'pmsnevfr_el1' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'pmsnevfr_el1' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'hcrx_el2' +.*: *Info: macro .* +.*: Error: selected processor does not support system register name 'hcrx_el2' +.*: *Info: macro .* diff --git a/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-8.s b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-8.s new file mode 100644 index 0000000..0ce61dd --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-8.s @@ -0,0 +1,127 @@ + .macro roreg, name + mrs x0, \name + .endm + + .macro woreg, name + msr \name, x1 + .endm + + .macro rwreg, name + mrs x2, \name + msr \name, x3 + .endm + + roreg lorid_el1 + + .arch armv8.2-a + + roreg ccsidr2_el1 + rwreg rcwmask_el1 + rwreg rcwsmask_el1 + + .arch armv8.3-a + + rwreg trfcr_el1 + roreg pmmir_el1 + rwreg trfcr_el2 + + rwreg trfcr_el12 + + rwreg amcr_el0 + roreg amcfgr_el0 + roreg amcgcr_el0 + rwreg amuserenr_el0 + rwreg amcntenclr0_el0 + rwreg amcntenset0_el0 + rwreg amcntenclr1_el0 + rwreg amcntenset1_el0 + rwreg amevcntr00_el0 + rwreg amevcntr01_el0 + rwreg amevcntr02_el0 + rwreg amevcntr03_el0 + roreg amevtyper00_el0 + roreg amevtyper01_el0 + roreg amevtyper02_el0 + roreg amevtyper03_el0 + rwreg amevcntr10_el0 + rwreg amevcntr11_el0 + rwreg amevcntr12_el0 + rwreg amevcntr13_el0 + rwreg amevcntr14_el0 + rwreg amevcntr15_el0 + rwreg amevcntr16_el0 + rwreg amevcntr17_el0 + rwreg amevcntr18_el0 + rwreg amevcntr19_el0 + rwreg amevcntr110_el0 + rwreg amevcntr111_el0 + rwreg amevcntr112_el0 + rwreg amevcntr113_el0 + rwreg amevcntr114_el0 + rwreg amevcntr115_el0 + rwreg amevtyper10_el0 + rwreg amevtyper11_el0 + rwreg amevtyper12_el0 + rwreg amevtyper13_el0 + rwreg amevtyper14_el0 + rwreg amevtyper15_el0 + rwreg amevtyper16_el0 + rwreg amevtyper17_el0 + rwreg amevtyper18_el0 + rwreg amevtyper19_el0 + rwreg amevtyper110_el0 + rwreg amevtyper111_el0 + rwreg amevtyper112_el0 + rwreg amevtyper113_el0 + rwreg amevtyper114_el0 + rwreg amevtyper115_el0 + + .arch armv8.5-a + + roreg amcg1idr_el0 + roreg cntpctss_el0 + roreg cntvctss_el0 + rwreg hfgrtr_el2 + rwreg hfgwtr_el2 + rwreg hfgitr_el2 + rwreg hdfgrtr_el2 + rwreg hdfgwtr_el2 + rwreg hafgrtr_el2 + rwreg amevcntvoff00_el2 + rwreg amevcntvoff01_el2 + rwreg amevcntvoff02_el2 + rwreg amevcntvoff03_el2 + rwreg amevcntvoff04_el2 + rwreg amevcntvoff05_el2 + rwreg amevcntvoff06_el2 + rwreg amevcntvoff07_el2 + rwreg amevcntvoff08_el2 + rwreg amevcntvoff09_el2 + rwreg amevcntvoff010_el2 + rwreg amevcntvoff011_el2 + rwreg amevcntvoff012_el2 + rwreg amevcntvoff013_el2 + rwreg amevcntvoff014_el2 + rwreg amevcntvoff015_el2 + rwreg amevcntvoff10_el2 + rwreg amevcntvoff11_el2 + rwreg amevcntvoff12_el2 + rwreg amevcntvoff13_el2 + rwreg amevcntvoff14_el2 + rwreg amevcntvoff15_el2 + rwreg amevcntvoff16_el2 + rwreg amevcntvoff17_el2 + rwreg amevcntvoff18_el2 + rwreg amevcntvoff19_el2 + rwreg amevcntvoff110_el2 + rwreg amevcntvoff111_el2 + rwreg amevcntvoff112_el2 + rwreg amevcntvoff113_el2 + rwreg amevcntvoff114_el2 + rwreg amevcntvoff115_el2 + rwreg cntpoff_el2 + + .arch armv8.6-a + + rwreg pmsnevfr_el1 + rwreg hcrx_el2 diff --git a/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-8b.d b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-8b.d new file mode 100644 index 0000000..4962283 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-8b.d @@ -0,0 +1 @@ +#warning_output: illegal-sysreg-8b.l diff --git a/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-8b.l b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-8b.l new file mode 100644 index 0000000..67966da --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-8b.l @@ -0,0 +1,59 @@ +.*: Assembler messages: +.*: Warning: specified register cannot be written to at operand 1 -- `msr id_dfr1_el1,x1' +.*: *Info: macro .* +.*: Warning: specified register cannot be written to at operand 1 -- `msr id_mmfr5_el1,x1' +.*: *Info: macro .* +.*: Warning: specified register cannot be written to at operand 1 -- `msr id_isar6_el1,x1' +.*: *Info: macro .* +.*: Warning: specified register cannot be written to at operand 1 -- `msr icc_iar0_el1,x1' +.*: *Info: macro .* +.*: Warning: specified register cannot be read from at operand 2 -- `mrs x0,icc_eoir0_el1' +.*: *Info: macro .* +.*: Warning: specified register cannot be written to at operand 1 -- `msr icc_hppir0_el1,x1' +.*: *Info: macro .* +.*: Warning: specified register cannot be read from at operand 2 -- `mrs x0,icc_dir_el1' +.*: *Info: macro .* +.*: Warning: specified register cannot be written to at operand 1 -- `msr icc_rpr_el1,x1' +.*: *Info: macro .* +.*: Warning: specified register cannot be read from at operand 2 -- `mrs x0,icc_sgi1r_el1' +.*: *Info: macro .* +.*: Warning: specified register cannot be read from at operand 2 -- `mrs x0,icc_asgi1r_el1' +.*: *Info: macro .* +.*: Warning: specified register cannot be read from at operand 2 -- `mrs x0,icc_sgi0r_el1' +.*: *Info: macro .* +.*: Warning: specified register cannot be written to at operand 1 -- `msr icc_iar1_el1,x1' +.*: *Info: macro .* +.*: Warning: specified register cannot be read from at operand 2 -- `mrs x0,icc_eoir1_el1' +.*: *Info: macro .* +.*: Warning: specified register cannot be written to at operand 1 -- `msr icc_hppir1_el1,x1' +.*: *Info: macro .* +.*: Warning: specified register cannot be written to at operand 1 -- `msr ich_misr_el2,x1' +.*: *Info: macro .* +.*: Warning: specified register cannot be written to at operand 1 -- `msr ich_eisr_el2,x1' +.*: *Info: macro .* +.*: Warning: specified register cannot be written to at operand 1 -- `msr ich_elrsr_el2,x1' +.*: *Info: macro .* +.*: Warning: specified register cannot be written to at operand 1 -- `msr lorid_el1,x1' +.*: *Info: macro .* +.*: Warning: specified register cannot be written to at operand 1 -- `msr ccsidr2_el1,x1' +.*: *Info: macro .* +.*: Warning: specified register cannot be written to at operand 1 -- `msr pmmir_el1,x1' +.*: *Info: macro .* +.*: Warning: specified register cannot be written to at operand 1 -- `msr amcfgr_el0,x1' +.*: *Info: macro .* +.*: Warning: specified register cannot be written to at operand 1 -- `msr amcgcr_el0,x1' +.*: *Info: macro .* +.*: Warning: specified register cannot be written to at operand 1 -- `msr amevtyper00_el0,x1' +.*: *Info: macro .* +.*: Warning: specified register cannot be written to at operand 1 -- `msr amevtyper01_el0,x1' +.*: *Info: macro .* +.*: Warning: specified register cannot be written to at operand 1 -- `msr amevtyper02_el0,x1' +.*: *Info: macro .* +.*: Warning: specified register cannot be written to at operand 1 -- `msr amevtyper03_el0,x1' +.*: *Info: macro .* +.*: Warning: specified register cannot be written to at operand 1 -- `msr amcg1idr_el0,x1' +.*: *Info: macro .* +.*: Warning: specified register cannot be written to at operand 1 -- `msr cntpctss_el0,x1' +.*: *Info: macro .* +.*: Warning: specified register cannot be written to at operand 1 -- `msr cntvctss_el0,x1' +.*: *Info: macro .* diff --git a/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-8b.s b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-8b.s new file mode 100644 index 0000000..727c94f --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg-8b.s @@ -0,0 +1,51 @@ + .macro roreg, name + msr \name, x1 + .endm + + .macro woreg, name + mrs x0, \name + .endm + + roreg id_dfr1_el1 + roreg id_mmfr5_el1 + roreg id_isar6_el1 + + roreg icc_iar0_el1 + woreg icc_eoir0_el1 + roreg icc_hppir0_el1 + woreg icc_dir_el1 + roreg icc_rpr_el1 + woreg icc_sgi1r_el1 + woreg icc_asgi1r_el1 + woreg icc_sgi0r_el1 + roreg icc_iar1_el1 + woreg icc_eoir1_el1 + roreg icc_hppir1_el1 + roreg ich_misr_el2 + roreg ich_eisr_el2 + roreg ich_elrsr_el2 + + .arch armv8.1-a + + roreg lorid_el1 + + .arch armv8.3-a + + roreg ccsidr2_el1 + + .arch armv8.4-a + + roreg pmmir_el1 + + roreg amcfgr_el0 + roreg amcgcr_el0 + roreg amevtyper00_el0 + roreg amevtyper01_el0 + roreg amevtyper02_el0 + roreg amevtyper03_el0 + + .arch armv8.6-a + + roreg amcg1idr_el0 + roreg cntpctss_el0 + roreg cntvctss_el0 diff --git a/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg128.d b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg128.d new file mode 100644 index 0000000..05bafec --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg128.d @@ -0,0 +1,2 @@ +#name: Instruction validation testing for mrrs and msrr. +#error_output: illegal-sysreg128.l diff --git a/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg128.l b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg128.l new file mode 100644 index 0000000..a7d06b7 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg128.l @@ -0,0 +1,11 @@ +.*: Assembler messages: +.*: Error: 128-bit-wide accsess not allowed on selected system register 'accdata_el1' +.*: Error: 128-bit-wide accsess not allowed on selected system register 'accdata_el1' +.*: Error: operand mismatch -- `mrrs w0,w1,ttbr0_el1' +.*: Info: did you mean this\? +.*: Info: mrrs x0, x1, ttbr0_el1 +.*: Error: operand mismatch -- `msrr ttbr0_el1,w0,w1' +.*: Info: did you mean this\? +.*: Info: msrr ttbr0_el1, x0, x1 +.*: Error: reg pair must be contiguous at operand 2 -- `mrrs x0,x2,ttbr0_el1' +.*: Error: reg pair must be contiguous at operand 3 -- `msrr ttbr0_el1,x0,x2' diff --git a/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg128.s b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg128.s new file mode 100644 index 0000000..90dcfef --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/illegal-sysreg128.s @@ -0,0 +1,8 @@ + .arch armv8.1-a+d128 + + mrrs x0, x1, accdata_el1 + msrr accdata_el1, x0, x1 + mrrs w0, w1, ttbr0_el1 + msrr ttbr0_el1, w0, w1 + mrrs x0, x2, ttbr0_el1 + msrr ttbr0_el1, x0, x2 diff --git a/gas/testsuite/gas/aarch64/sysreg/invalid-sysreg-assert.d b/gas/testsuite/gas/aarch64/sysreg/invalid-sysreg-assert.d new file mode 100644 index 0000000..a6279bb --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/invalid-sysreg-assert.d @@ -0,0 +1,3 @@ +#name: don't assert on long system register +#source: invalid-sysreg-assert.s +#error_output: invalid-sysreg-assert.l diff --git a/gas/testsuite/gas/aarch64/sysreg/invalid-sysreg-assert.l b/gas/testsuite/gas/aarch64/sysreg/invalid-sysreg-assert.l new file mode 100644 index 0000000..b604910 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/invalid-sysreg-assert.l @@ -0,0 +1,2 @@ +[^:]*: Assembler messages: +.*: Error: unknown or missing system register name at operand 1 -- `msr 00000000000000000000000000000000' diff --git a/gas/testsuite/gas/aarch64/sysreg/invalid-sysreg-assert.s b/gas/testsuite/gas/aarch64/sysreg/invalid-sysreg-assert.s new file mode 100644 index 0000000..8b3706f --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/invalid-sysreg-assert.s @@ -0,0 +1,2 @@ +// This input caused an assertion failure in parse_sys_reg. +msr 00000000000000000000000000000000 diff --git a/gas/testsuite/gas/aarch64/sysreg/sme-sysreg-illegal.d b/gas/testsuite/gas/aarch64/sysreg/sme-sysreg-illegal.d new file mode 100644 index 0000000..ff0e855 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/sme-sysreg-illegal.d @@ -0,0 +1,3 @@ +#as: -march=armv8-a+sme +#source: sme-sysreg-illegal.s +#warning_output: sme-sysreg-illegal.l diff --git a/gas/testsuite/gas/aarch64/sysreg/sme-sysreg-illegal.l b/gas/testsuite/gas/aarch64/sysreg/sme-sysreg-illegal.l new file mode 100644 index 0000000..6baad13 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/sme-sysreg-illegal.l @@ -0,0 +1,3 @@ +[^:]*: Assembler messages: +[^:]*:[0-9]+: Warning: specified register cannot be written to at operand 1 -- `msr id_aa64smfr0_el1,x0' +[^:]*:[0-9]+: Warning: specified register cannot be written to at operand 1 -- `msr smidr_el1,x0' diff --git a/gas/testsuite/gas/aarch64/sysreg/sme-sysreg-illegal.s b/gas/testsuite/gas/aarch64/sysreg/sme-sysreg-illegal.s new file mode 100644 index 0000000..057a6bf --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/sme-sysreg-illegal.s @@ -0,0 +1,3 @@ +/* Write to r/o SME system registers. */ +msr id_aa64smfr0_el1, x0 +msr smidr_el1, x0 diff --git a/gas/testsuite/gas/aarch64/sysreg/sme-sysreg.d b/gas/testsuite/gas/aarch64/sysreg/sme-sysreg.d new file mode 100644 index 0000000..8eaf73c --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/sme-sysreg.d @@ -0,0 +1,29 @@ +#name: SME extension (system registers) +#as: -march=armv8-a+sme +#objdump: -dr + +.*: file format .* + +Disassembly of section \.text: + +0+ <.*>: + 0: d53b4240 mrs x0, svcr + 4: d53804a0 mrs x0, id_aa64smfr0_el1 + 8: d53812c0 mrs x0, smcr_el1 + c: d53d12c0 mrs x0, smcr_el12 + 10: d53c12c0 mrs x0, smcr_el2 + 14: d53e12c0 mrs x0, smcr_el3 + 18: d5381280 mrs x0, smpri_el1 + 1c: d53c12a0 mrs x0, smprimap_el2 + 20: d53900c0 mrs x0, smidr_el1 + 24: d53bd0a0 mrs x0, tpidr2_el0 + 28: d538a560 mrs x0, mpamsm_el1 + 2c: d51b4240 msr svcr, x0 + 30: d51812c0 msr smcr_el1, x0 + 34: d51d12c0 msr smcr_el12, x0 + 38: d51c12c0 msr smcr_el2, x0 + 3c: d51e12c0 msr smcr_el3, x0 + 40: d5181280 msr smpri_el1, x0 + 44: d51c12a0 msr smprimap_el2, x0 + 48: d51bd0a0 msr tpidr2_el0, x0 + 4c: d518a560 msr mpamsm_el1, x0 diff --git a/gas/testsuite/gas/aarch64/sysreg/sme-sysreg.s b/gas/testsuite/gas/aarch64/sysreg/sme-sysreg.s new file mode 100644 index 0000000..ce8a294 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/sme-sysreg.s @@ -0,0 +1,23 @@ +/* Read SME system registers. */ +mrs x0, svcr +mrs x0, id_aa64smfr0_el1 +mrs x0, smcr_el1 +mrs x0, smcr_el12 +mrs x0, smcr_el2 +mrs x0, smcr_el3 +mrs x0, smpri_el1 +mrs x0, smprimap_el2 +mrs x0, smidr_el1 +mrs x0, tpidr2_el0 +mrs x0, mpamsm_el1 + +/* Write to SME system registers. */ +msr svcr, x0 +msr smcr_el1, x0 +msr smcr_el12, x0 +msr smcr_el2, x0 +msr smcr_el3, x0 +msr smpri_el1, x0 +msr smprimap_el2, x0 +msr tpidr2_el0, x0 +msr mpamsm_el1, x0 diff --git a/gas/testsuite/gas/aarch64/sysreg/sve-sysreg-invalid.d b/gas/testsuite/gas/aarch64/sysreg/sve-sysreg-invalid.d new file mode 100644 index 0000000..bfe2d27 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/sve-sysreg-invalid.d @@ -0,0 +1,3 @@ +#as: -march=armv8-a+nosve +#source: sve-sysreg.s +#error_output: sve-sysreg-invalid.l diff --git a/gas/testsuite/gas/aarch64/sysreg/sve-sysreg-invalid.l b/gas/testsuite/gas/aarch64/sysreg/sve-sysreg-invalid.l new file mode 100644 index 0000000..0eaefe1 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/sve-sysreg-invalid.l @@ -0,0 +1,19 @@ +.*: Assembler messages: +.*:1: Error: selected processor does not support system register name 'id_aa64zfr0_el1' +.*:2: Error: selected processor does not support system register name 'id_aa64zfr0_el1' +.*:4: Error: selected processor does not support system register name 'zcr_el1' +.*:5: Error: selected processor does not support system register name 'zcr_el1' +.*:6: Error: selected processor does not support system register name 'zcr_el1' +.*:7: Error: selected processor does not support system register name 'zcr_el1' +.*:9: Error: selected processor does not support system register name 'zcr_el12' +.*:10: Error: selected processor does not support system register name 'zcr_el12' +.*:11: Error: selected processor does not support system register name 'zcr_el12' +.*:12: Error: selected processor does not support system register name 'zcr_el12' +.*:14: Error: selected processor does not support system register name 'zcr_el2' +.*:15: Error: selected processor does not support system register name 'zcr_el2' +.*:16: Error: selected processor does not support system register name 'zcr_el2' +.*:17: Error: selected processor does not support system register name 'zcr_el2' +.*:19: Error: selected processor does not support system register name 'zcr_el3' +.*:20: Error: selected processor does not support system register name 'zcr_el3' +.*:21: Error: selected processor does not support system register name 'zcr_el3' +.*:22: Error: selected processor does not support system register name 'zcr_el3' diff --git a/gas/testsuite/gas/aarch64/sysreg/sve-sysreg.d b/gas/testsuite/gas/aarch64/sysreg/sve-sysreg.d new file mode 100644 index 0000000..22d9e5ac --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/sve-sysreg.d @@ -0,0 +1,27 @@ +#as: -march=armv8-a+sve +#objdump: -dr + + +.* file format .* + +Disassembly of section .*: + +0+ <.*>: +.*: d5380480 mrs x0, id_aa64zfr0_el1 +.*: d538049b mrs x27, id_aa64zfr0_el1 +.*: d5381200 mrs x0, zcr_el1 +.*: d538121b mrs x27, zcr_el1 +.*: d5181200 msr zcr_el1, x0 +.*: d518121a msr zcr_el1, x26 +.*: d53d1200 mrs x0, zcr_el12 +.*: d53d121b mrs x27, zcr_el12 +.*: d51d1200 msr zcr_el12, x0 +.*: d51d121a msr zcr_el12, x26 +.*: d53c1200 mrs x0, zcr_el2 +.*: d53c121b mrs x27, zcr_el2 +.*: d51c1200 msr zcr_el2, x0 +.*: d51c121a msr zcr_el2, x26 +.*: d53e1200 mrs x0, zcr_el3 +.*: d53e121b mrs x27, zcr_el3 +.*: d51e1200 msr zcr_el3, x0 +.*: d51e121a msr zcr_el3, x26 diff --git a/gas/testsuite/gas/aarch64/sysreg/sve-sysreg.s b/gas/testsuite/gas/aarch64/sysreg/sve-sysreg.s new file mode 100644 index 0000000..90e0951 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/sve-sysreg.s @@ -0,0 +1,22 @@ + mrs x0, ID_AA64ZFR0_EL1 + mrs X27, id_aa64zfr0_el1 + + mrs x0, ZCR_EL1 + mrs X27, zcr_el1 + msr ZCR_EL1, X0 + msr zcr_el1, x26 + + mrs x0, ZCR_EL12 + mrs X27, zcr_el12 + msr ZCR_EL12, X0 + msr zcr_el12, x26 + + mrs x0, ZCR_EL2 + mrs X27, zcr_el2 + msr ZCR_EL2, X0 + msr zcr_el2, x26 + + mrs x0, ZCR_EL3 + mrs X27, zcr_el3 + msr ZCR_EL3, X0 + msr zcr_el3, x26 diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-1.d b/gas/testsuite/gas/aarch64/sysreg/sysreg-1.d new file mode 100644 index 0000000..fb9991d --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-1.d @@ -0,0 +1,4295 @@ +#objdump: -dr + +.*: file format .* + +Disassembly of section \.text: + +0+ <.*>: + 0: d5380587 mrs x7, id_aa64afr0_el1 + 4: d53805a7 mrs x7, id_aa64afr1_el1 + 8: d5380347 mrs x7, mvfr2_el1 + c: d51b4527 msr dlr_el0, x7 + 10: d53b4527 mrs x7, dlr_el0 + 14: d51b4507 msr dspsr_el0, x7 + 18: d53b4507 mrs x7, dspsr_el0 + 1c: d51e1127 msr sder32_el3, x7 + 20: d53e1127 mrs x7, sder32_el3 + 24: d51e1327 msr mdcr_el3, x7 + 28: d53e1327 mrs x7, mdcr_el3 + 2c: d5100207 msr mdccint_el1, x7 + 30: d5300207 mrs x7, mdccint_el1 + 34: d5140707 msr dbgvcr32_el2, x7 + 38: d5340707 mrs x7, dbgvcr32_el2 + 3c: d51c5307 msr fpexc32_el2, x7 + 40: d53c5307 mrs x7, fpexc32_el2 + 44: d5120007 msr teecr32_el1, x7 + 48: d5320007 mrs x7, teecr32_el1 + 4c: d5121007 msr teehbr32_el1, x7 + 50: d5321007 mrs x7, teehbr32_el1 + 54: d51be207 msr cntp_tval_el0, x7 + 58: d53be207 mrs x7, cntp_tval_el0 + 5c: d51be227 msr cntp_ctl_el0, x7 + 60: d53be227 mrs x7, cntp_ctl_el0 + 64: d51be247 msr cntp_cval_el0, x7 + 68: d53be247 mrs x7, cntp_cval_el0 + 6c: d51fe207 msr cntps_tval_el1, x7 + 70: d53fe207 mrs x7, cntps_tval_el1 + 74: d51fe227 msr cntps_ctl_el1, x7 + 78: d53fe227 mrs x7, cntps_ctl_el1 + 7c: d51fe247 msr cntps_cval_el1, x7 + 80: d53fe247 mrs x7, cntps_cval_el1 + 84: d51b9d07 msr pmccntr_el0, x7 + 88: d53b9d07 mrs x7, pmccntr_el0 + 8c: d51be807 msr pmevcntr0_el0, x7 + 90: d53be807 mrs x7, pmevcntr0_el0 + 94: d51be827 msr pmevcntr1_el0, x7 + 98: d53be827 mrs x7, pmevcntr1_el0 + 9c: d51be847 msr pmevcntr2_el0, x7 + a0: d53be847 mrs x7, pmevcntr2_el0 + a4: d51be867 msr pmevcntr3_el0, x7 + a8: d53be867 mrs x7, pmevcntr3_el0 + ac: d51be887 msr pmevcntr4_el0, x7 + b0: d53be887 mrs x7, pmevcntr4_el0 + b4: d51be8a7 msr pmevcntr5_el0, x7 + b8: d53be8a7 mrs x7, pmevcntr5_el0 + bc: d51be8c7 msr pmevcntr6_el0, x7 + c0: d53be8c7 mrs x7, pmevcntr6_el0 + c4: d51be8e7 msr pmevcntr7_el0, x7 + c8: d53be8e7 mrs x7, pmevcntr7_el0 + cc: d51be907 msr pmevcntr8_el0, x7 + d0: d53be907 mrs x7, pmevcntr8_el0 + d4: d51be927 msr pmevcntr9_el0, x7 + d8: d53be927 mrs x7, pmevcntr9_el0 + dc: d51be947 msr pmevcntr10_el0, x7 + e0: d53be947 mrs x7, pmevcntr10_el0 + e4: d51be967 msr pmevcntr11_el0, x7 + e8: d53be967 mrs x7, pmevcntr11_el0 + ec: d51be987 msr pmevcntr12_el0, x7 + f0: d53be987 mrs x7, pmevcntr12_el0 + f4: d51be9a7 msr pmevcntr13_el0, x7 + f8: d53be9a7 mrs x7, pmevcntr13_el0 + fc: d51be9c7 msr pmevcntr14_el0, x7 + 100: d53be9c7 mrs x7, pmevcntr14_el0 + 104: d51be9e7 msr pmevcntr15_el0, x7 + 108: d53be9e7 mrs x7, pmevcntr15_el0 + 10c: d51bea07 msr pmevcntr16_el0, x7 + 110: d53bea07 mrs x7, pmevcntr16_el0 + 114: d51bea27 msr pmevcntr17_el0, x7 + 118: d53bea27 mrs x7, pmevcntr17_el0 + 11c: d51bea47 msr pmevcntr18_el0, x7 + 120: d53bea47 mrs x7, pmevcntr18_el0 + 124: d51bea67 msr pmevcntr19_el0, x7 + 128: d53bea67 mrs x7, pmevcntr19_el0 + 12c: d51bea87 msr pmevcntr20_el0, x7 + 130: d53bea87 mrs x7, pmevcntr20_el0 + 134: d51beaa7 msr pmevcntr21_el0, x7 + 138: d53beaa7 mrs x7, pmevcntr21_el0 + 13c: d51beac7 msr pmevcntr22_el0, x7 + 140: d53beac7 mrs x7, pmevcntr22_el0 + 144: d51beae7 msr pmevcntr23_el0, x7 + 148: d53beae7 mrs x7, pmevcntr23_el0 + 14c: d51beb07 msr pmevcntr24_el0, x7 + 150: d53beb07 mrs x7, pmevcntr24_el0 + 154: d51beb27 msr pmevcntr25_el0, x7 + 158: d53beb27 mrs x7, pmevcntr25_el0 + 15c: d51beb47 msr pmevcntr26_el0, x7 + 160: d53beb47 mrs x7, pmevcntr26_el0 + 164: d51beb67 msr pmevcntr27_el0, x7 + 168: d53beb67 mrs x7, pmevcntr27_el0 + 16c: d51beb87 msr pmevcntr28_el0, x7 + 170: d53beb87 mrs x7, pmevcntr28_el0 + 174: d51beba7 msr pmevcntr29_el0, x7 + 178: d53beba7 mrs x7, pmevcntr29_el0 + 17c: d51bebc7 msr pmevcntr30_el0, x7 + 180: d53bebc7 mrs x7, pmevcntr30_el0 + 184: d51bec07 msr pmevtyper0_el0, x7 + 188: d53bec07 mrs x7, pmevtyper0_el0 + 18c: d51bec27 msr pmevtyper1_el0, x7 + 190: d53bec27 mrs x7, pmevtyper1_el0 + 194: d51bec47 msr pmevtyper2_el0, x7 + 198: d53bec47 mrs x7, pmevtyper2_el0 + 19c: d51bec67 msr pmevtyper3_el0, x7 + 1a0: d53bec67 mrs x7, pmevtyper3_el0 + 1a4: d51bec87 msr pmevtyper4_el0, x7 + 1a8: d53bec87 mrs x7, pmevtyper4_el0 + 1ac: d51beca7 msr pmevtyper5_el0, x7 + 1b0: d53beca7 mrs x7, pmevtyper5_el0 + 1b4: d51becc7 msr pmevtyper6_el0, x7 + 1b8: d53becc7 mrs x7, pmevtyper6_el0 + 1bc: d51bece7 msr pmevtyper7_el0, x7 + 1c0: d53bece7 mrs x7, pmevtyper7_el0 + 1c4: d51bed07 msr pmevtyper8_el0, x7 + 1c8: d53bed07 mrs x7, pmevtyper8_el0 + 1cc: d51bed27 msr pmevtyper9_el0, x7 + 1d0: d53bed27 mrs x7, pmevtyper9_el0 + 1d4: d51bed47 msr pmevtyper10_el0, x7 + 1d8: d53bed47 mrs x7, pmevtyper10_el0 + 1dc: d51bed67 msr pmevtyper11_el0, x7 + 1e0: d53bed67 mrs x7, pmevtyper11_el0 + 1e4: d51bed87 msr pmevtyper12_el0, x7 + 1e8: d53bed87 mrs x7, pmevtyper12_el0 + 1ec: d51beda7 msr pmevtyper13_el0, x7 + 1f0: d53beda7 mrs x7, pmevtyper13_el0 + 1f4: d51bedc7 msr pmevtyper14_el0, x7 + 1f8: d53bedc7 mrs x7, pmevtyper14_el0 + 1fc: d51bede7 msr pmevtyper15_el0, x7 + 200: d53bede7 mrs x7, pmevtyper15_el0 + 204: d51bee07 msr pmevtyper16_el0, x7 + 208: d53bee07 mrs x7, pmevtyper16_el0 + 20c: d51bee27 msr pmevtyper17_el0, x7 + 210: d53bee27 mrs x7, pmevtyper17_el0 + 214: d51bee47 msr pmevtyper18_el0, x7 + 218: d53bee47 mrs x7, pmevtyper18_el0 + 21c: d51bee67 msr pmevtyper19_el0, x7 + 220: d53bee67 mrs x7, pmevtyper19_el0 + 224: d51bee87 msr pmevtyper20_el0, x7 + 228: d53bee87 mrs x7, pmevtyper20_el0 + 22c: d51beea7 msr pmevtyper21_el0, x7 + 230: d53beea7 mrs x7, pmevtyper21_el0 + 234: d51beec7 msr pmevtyper22_el0, x7 + 238: d53beec7 mrs x7, pmevtyper22_el0 + 23c: d51beee7 msr pmevtyper23_el0, x7 + 240: d53beee7 mrs x7, pmevtyper23_el0 + 244: d51bef07 msr pmevtyper24_el0, x7 + 248: d53bef07 mrs x7, pmevtyper24_el0 + 24c: d51bef27 msr pmevtyper25_el0, x7 + 250: d53bef27 mrs x7, pmevtyper25_el0 + 254: d51bef47 msr pmevtyper26_el0, x7 + 258: d53bef47 mrs x7, pmevtyper26_el0 + 25c: d51bef67 msr pmevtyper27_el0, x7 + 260: d53bef67 mrs x7, pmevtyper27_el0 + 264: d51bef87 msr pmevtyper28_el0, x7 + 268: d53bef87 mrs x7, pmevtyper28_el0 + 26c: d51befa7 msr pmevtyper29_el0, x7 + 270: d53befa7 mrs x7, pmevtyper29_el0 + 274: d51befc7 msr pmevtyper30_el0, x7 + 278: d53befc7 mrs x7, pmevtyper30_el0 + 27c: d51befe7 msr pmccfiltr_el0, x7 + 280: d53befe7 mrs x7, pmccfiltr_el0 + 284: d51bd067 msr tpidrro_el0, x7 + 288: d53bd067 mrs x7, tpidrro_el0 + 28c: d51bd047 msr tpidr_el0, x7 + 290: d53bd047 mrs x7, tpidr_el0 + 294: d51be007 msr cntfrq_el0, x7 + 298: d53be007 mrs x7, cntfrq_el0 + 29c: d518b00f msr s3_0_c11_c0_0, x15 + 2a0: d538b00f mrs x15, s3_0_c11_c0_0 + 2a4: d518b02f msr s3_0_c11_c0_1, x15 + 2a8: d538b02f mrs x15, s3_0_c11_c0_1 + 2ac: d518b04f msr s3_0_c11_c0_2, x15 + 2b0: d538b04f mrs x15, s3_0_c11_c0_2 + 2b4: d518b06f msr s3_0_c11_c0_3, x15 + 2b8: d538b06f mrs x15, s3_0_c11_c0_3 + 2bc: d518b08f msr s3_0_c11_c0_4, x15 + 2c0: d538b08f mrs x15, s3_0_c11_c0_4 + 2c4: d518b0af msr s3_0_c11_c0_5, x15 + 2c8: d538b0af mrs x15, s3_0_c11_c0_5 + 2cc: d518b0cf msr s3_0_c11_c0_6, x15 + 2d0: d538b0cf mrs x15, s3_0_c11_c0_6 + 2d4: d518b0ef msr s3_0_c11_c0_7, x15 + 2d8: d538b0ef mrs x15, s3_0_c11_c0_7 + 2dc: d518b10f msr s3_0_c11_c1_0, x15 + 2e0: d538b10f mrs x15, s3_0_c11_c1_0 + 2e4: d518b12f msr s3_0_c11_c1_1, x15 + 2e8: d538b12f mrs x15, s3_0_c11_c1_1 + 2ec: d518b14f msr s3_0_c11_c1_2, x15 + 2f0: d538b14f mrs x15, s3_0_c11_c1_2 + 2f4: d518b16f msr s3_0_c11_c1_3, x15 + 2f8: d538b16f mrs x15, s3_0_c11_c1_3 + 2fc: d518b18f msr s3_0_c11_c1_4, x15 + 300: d538b18f mrs x15, s3_0_c11_c1_4 + 304: d518b1af msr s3_0_c11_c1_5, x15 + 308: d538b1af mrs x15, s3_0_c11_c1_5 + 30c: d518b1cf msr s3_0_c11_c1_6, x15 + 310: d538b1cf mrs x15, s3_0_c11_c1_6 + 314: d518b1ef msr s3_0_c11_c1_7, x15 + 318: d538b1ef mrs x15, s3_0_c11_c1_7 + 31c: d518b20f msr s3_0_c11_c2_0, x15 + 320: d538b20f mrs x15, s3_0_c11_c2_0 + 324: d518b22f msr s3_0_c11_c2_1, x15 + 328: d538b22f mrs x15, s3_0_c11_c2_1 + 32c: d518b24f msr s3_0_c11_c2_2, x15 + 330: d538b24f mrs x15, s3_0_c11_c2_2 + 334: d518b26f msr s3_0_c11_c2_3, x15 + 338: d538b26f mrs x15, s3_0_c11_c2_3 + 33c: d518b28f msr s3_0_c11_c2_4, x15 + 340: d538b28f mrs x15, s3_0_c11_c2_4 + 344: d518b2af msr s3_0_c11_c2_5, x15 + 348: d538b2af mrs x15, s3_0_c11_c2_5 + 34c: d518b2cf msr s3_0_c11_c2_6, x15 + 350: d538b2cf mrs x15, s3_0_c11_c2_6 + 354: d518b2ef msr s3_0_c11_c2_7, x15 + 358: d538b2ef mrs x15, s3_0_c11_c2_7 + 35c: d518b30f msr s3_0_c11_c3_0, x15 + 360: d538b30f mrs x15, s3_0_c11_c3_0 + 364: d518b32f msr s3_0_c11_c3_1, x15 + 368: d538b32f mrs x15, s3_0_c11_c3_1 + 36c: d518b34f msr s3_0_c11_c3_2, x15 + 370: d538b34f mrs x15, s3_0_c11_c3_2 + 374: d518b36f msr s3_0_c11_c3_3, x15 + 378: d538b36f mrs x15, s3_0_c11_c3_3 + 37c: d518b38f msr s3_0_c11_c3_4, x15 + 380: d538b38f mrs x15, s3_0_c11_c3_4 + 384: d518b3af msr s3_0_c11_c3_5, x15 + 388: d538b3af mrs x15, s3_0_c11_c3_5 + 38c: d518b3cf msr s3_0_c11_c3_6, x15 + 390: d538b3cf mrs x15, s3_0_c11_c3_6 + 394: d518b3ef msr s3_0_c11_c3_7, x15 + 398: d538b3ef mrs x15, s3_0_c11_c3_7 + 39c: d518b40f msr s3_0_c11_c4_0, x15 + 3a0: d538b40f mrs x15, s3_0_c11_c4_0 + 3a4: d518b42f msr s3_0_c11_c4_1, x15 + 3a8: d538b42f mrs x15, s3_0_c11_c4_1 + 3ac: d518b44f msr s3_0_c11_c4_2, x15 + 3b0: d538b44f mrs x15, s3_0_c11_c4_2 + 3b4: d518b46f msr s3_0_c11_c4_3, x15 + 3b8: d538b46f mrs x15, s3_0_c11_c4_3 + 3bc: d518b48f msr s3_0_c11_c4_4, x15 + 3c0: d538b48f mrs x15, s3_0_c11_c4_4 + 3c4: d518b4af msr s3_0_c11_c4_5, x15 + 3c8: d538b4af mrs x15, s3_0_c11_c4_5 + 3cc: d518b4cf msr s3_0_c11_c4_6, x15 + 3d0: d538b4cf mrs x15, s3_0_c11_c4_6 + 3d4: d518b4ef msr s3_0_c11_c4_7, x15 + 3d8: d538b4ef mrs x15, s3_0_c11_c4_7 + 3dc: d518b50f msr s3_0_c11_c5_0, x15 + 3e0: d538b50f mrs x15, s3_0_c11_c5_0 + 3e4: d518b52f msr s3_0_c11_c5_1, x15 + 3e8: d538b52f mrs x15, s3_0_c11_c5_1 + 3ec: d518b54f msr s3_0_c11_c5_2, x15 + 3f0: d538b54f mrs x15, s3_0_c11_c5_2 + 3f4: d518b56f msr s3_0_c11_c5_3, x15 + 3f8: d538b56f mrs x15, s3_0_c11_c5_3 + 3fc: d518b58f msr s3_0_c11_c5_4, x15 + 400: d538b58f mrs x15, s3_0_c11_c5_4 + 404: d518b5af msr s3_0_c11_c5_5, x15 + 408: d538b5af mrs x15, s3_0_c11_c5_5 + 40c: d518b5cf msr s3_0_c11_c5_6, x15 + 410: d538b5cf mrs x15, s3_0_c11_c5_6 + 414: d518b5ef msr s3_0_c11_c5_7, x15 + 418: d538b5ef mrs x15, s3_0_c11_c5_7 + 41c: d518b60f msr s3_0_c11_c6_0, x15 + 420: d538b60f mrs x15, s3_0_c11_c6_0 + 424: d518b62f msr s3_0_c11_c6_1, x15 + 428: d538b62f mrs x15, s3_0_c11_c6_1 + 42c: d518b64f msr s3_0_c11_c6_2, x15 + 430: d538b64f mrs x15, s3_0_c11_c6_2 + 434: d518b66f msr s3_0_c11_c6_3, x15 + 438: d538b66f mrs x15, s3_0_c11_c6_3 + 43c: d518b68f msr s3_0_c11_c6_4, x15 + 440: d538b68f mrs x15, s3_0_c11_c6_4 + 444: d518b6af msr s3_0_c11_c6_5, x15 + 448: d538b6af mrs x15, s3_0_c11_c6_5 + 44c: d518b6cf msr s3_0_c11_c6_6, x15 + 450: d538b6cf mrs x15, s3_0_c11_c6_6 + 454: d518b6ef msr s3_0_c11_c6_7, x15 + 458: d538b6ef mrs x15, s3_0_c11_c6_7 + 45c: d518b70f msr s3_0_c11_c7_0, x15 + 460: d538b70f mrs x15, s3_0_c11_c7_0 + 464: d518b72f msr s3_0_c11_c7_1, x15 + 468: d538b72f mrs x15, s3_0_c11_c7_1 + 46c: d518b74f msr s3_0_c11_c7_2, x15 + 470: d538b74f mrs x15, s3_0_c11_c7_2 + 474: d518b76f msr s3_0_c11_c7_3, x15 + 478: d538b76f mrs x15, s3_0_c11_c7_3 + 47c: d518b78f msr s3_0_c11_c7_4, x15 + 480: d538b78f mrs x15, s3_0_c11_c7_4 + 484: d518b7af msr s3_0_c11_c7_5, x15 + 488: d538b7af mrs x15, s3_0_c11_c7_5 + 48c: d518b7cf msr s3_0_c11_c7_6, x15 + 490: d538b7cf mrs x15, s3_0_c11_c7_6 + 494: d518b7ef msr s3_0_c11_c7_7, x15 + 498: d538b7ef mrs x15, s3_0_c11_c7_7 + 49c: d518b80f msr s3_0_c11_c8_0, x15 + 4a0: d538b80f mrs x15, s3_0_c11_c8_0 + 4a4: d518b82f msr s3_0_c11_c8_1, x15 + 4a8: d538b82f mrs x15, s3_0_c11_c8_1 + 4ac: d518b84f msr s3_0_c11_c8_2, x15 + 4b0: d538b84f mrs x15, s3_0_c11_c8_2 + 4b4: d518b86f msr s3_0_c11_c8_3, x15 + 4b8: d538b86f mrs x15, s3_0_c11_c8_3 + 4bc: d518b88f msr s3_0_c11_c8_4, x15 + 4c0: d538b88f mrs x15, s3_0_c11_c8_4 + 4c4: d518b8af msr s3_0_c11_c8_5, x15 + 4c8: d538b8af mrs x15, s3_0_c11_c8_5 + 4cc: d518b8cf msr s3_0_c11_c8_6, x15 + 4d0: d538b8cf mrs x15, s3_0_c11_c8_6 + 4d4: d518b8ef msr s3_0_c11_c8_7, x15 + 4d8: d538b8ef mrs x15, s3_0_c11_c8_7 + 4dc: d518b90f msr s3_0_c11_c9_0, x15 + 4e0: d538b90f mrs x15, s3_0_c11_c9_0 + 4e4: d518b92f msr s3_0_c11_c9_1, x15 + 4e8: d538b92f mrs x15, s3_0_c11_c9_1 + 4ec: d518b94f msr s3_0_c11_c9_2, x15 + 4f0: d538b94f mrs x15, s3_0_c11_c9_2 + 4f4: d518b96f msr s3_0_c11_c9_3, x15 + 4f8: d538b96f mrs x15, s3_0_c11_c9_3 + 4fc: d518b98f msr s3_0_c11_c9_4, x15 + 500: d538b98f mrs x15, s3_0_c11_c9_4 + 504: d518b9af msr s3_0_c11_c9_5, x15 + 508: d538b9af mrs x15, s3_0_c11_c9_5 + 50c: d518b9cf msr s3_0_c11_c9_6, x15 + 510: d538b9cf mrs x15, s3_0_c11_c9_6 + 514: d518b9ef msr s3_0_c11_c9_7, x15 + 518: d538b9ef mrs x15, s3_0_c11_c9_7 + 51c: d518ba0f msr s3_0_c11_c10_0, x15 + 520: d538ba0f mrs x15, s3_0_c11_c10_0 + 524: d518ba2f msr s3_0_c11_c10_1, x15 + 528: d538ba2f mrs x15, s3_0_c11_c10_1 + 52c: d518ba4f msr s3_0_c11_c10_2, x15 + 530: d538ba4f mrs x15, s3_0_c11_c10_2 + 534: d518ba6f msr s3_0_c11_c10_3, x15 + 538: d538ba6f mrs x15, s3_0_c11_c10_3 + 53c: d518ba8f msr s3_0_c11_c10_4, x15 + 540: d538ba8f mrs x15, s3_0_c11_c10_4 + 544: d518baaf msr s3_0_c11_c10_5, x15 + 548: d538baaf mrs x15, s3_0_c11_c10_5 + 54c: d518bacf msr s3_0_c11_c10_6, x15 + 550: d538bacf mrs x15, s3_0_c11_c10_6 + 554: d518baef msr s3_0_c11_c10_7, x15 + 558: d538baef mrs x15, s3_0_c11_c10_7 + 55c: d518bb0f msr s3_0_c11_c11_0, x15 + 560: d538bb0f mrs x15, s3_0_c11_c11_0 + 564: d518bb2f msr s3_0_c11_c11_1, x15 + 568: d538bb2f mrs x15, s3_0_c11_c11_1 + 56c: d518bb4f msr s3_0_c11_c11_2, x15 + 570: d538bb4f mrs x15, s3_0_c11_c11_2 + 574: d518bb6f msr s3_0_c11_c11_3, x15 + 578: d538bb6f mrs x15, s3_0_c11_c11_3 + 57c: d518bb8f msr s3_0_c11_c11_4, x15 + 580: d538bb8f mrs x15, s3_0_c11_c11_4 + 584: d518bbaf msr s3_0_c11_c11_5, x15 + 588: d538bbaf mrs x15, s3_0_c11_c11_5 + 58c: d518bbcf msr s3_0_c11_c11_6, x15 + 590: d538bbcf mrs x15, s3_0_c11_c11_6 + 594: d518bbef msr s3_0_c11_c11_7, x15 + 598: d538bbef mrs x15, s3_0_c11_c11_7 + 59c: d518bc0f msr s3_0_c11_c12_0, x15 + 5a0: d538bc0f mrs x15, s3_0_c11_c12_0 + 5a4: d518bc2f msr s3_0_c11_c12_1, x15 + 5a8: d538bc2f mrs x15, s3_0_c11_c12_1 + 5ac: d518bc4f msr s3_0_c11_c12_2, x15 + 5b0: d538bc4f mrs x15, s3_0_c11_c12_2 + 5b4: d518bc6f msr s3_0_c11_c12_3, x15 + 5b8: d538bc6f mrs x15, s3_0_c11_c12_3 + 5bc: d518bc8f msr s3_0_c11_c12_4, x15 + 5c0: d538bc8f mrs x15, s3_0_c11_c12_4 + 5c4: d518bcaf msr s3_0_c11_c12_5, x15 + 5c8: d538bcaf mrs x15, s3_0_c11_c12_5 + 5cc: d518bccf msr s3_0_c11_c12_6, x15 + 5d0: d538bccf mrs x15, s3_0_c11_c12_6 + 5d4: d518bcef msr s3_0_c11_c12_7, x15 + 5d8: d538bcef mrs x15, s3_0_c11_c12_7 + 5dc: d518bd0f msr s3_0_c11_c13_0, x15 + 5e0: d538bd0f mrs x15, s3_0_c11_c13_0 + 5e4: d518bd2f msr s3_0_c11_c13_1, x15 + 5e8: d538bd2f mrs x15, s3_0_c11_c13_1 + 5ec: d518bd4f msr s3_0_c11_c13_2, x15 + 5f0: d538bd4f mrs x15, s3_0_c11_c13_2 + 5f4: d518bd6f msr s3_0_c11_c13_3, x15 + 5f8: d538bd6f mrs x15, s3_0_c11_c13_3 + 5fc: d518bd8f msr s3_0_c11_c13_4, x15 + 600: d538bd8f mrs x15, s3_0_c11_c13_4 + 604: d518bdaf msr s3_0_c11_c13_5, x15 + 608: d538bdaf mrs x15, s3_0_c11_c13_5 + 60c: d518bdcf msr s3_0_c11_c13_6, x15 + 610: d538bdcf mrs x15, s3_0_c11_c13_6 + 614: d518bdef msr s3_0_c11_c13_7, x15 + 618: d538bdef mrs x15, s3_0_c11_c13_7 + 61c: d518be0f msr s3_0_c11_c14_0, x15 + 620: d538be0f mrs x15, s3_0_c11_c14_0 + 624: d518be2f msr s3_0_c11_c14_1, x15 + 628: d538be2f mrs x15, s3_0_c11_c14_1 + 62c: d518be4f msr s3_0_c11_c14_2, x15 + 630: d538be4f mrs x15, s3_0_c11_c14_2 + 634: d518be6f msr s3_0_c11_c14_3, x15 + 638: d538be6f mrs x15, s3_0_c11_c14_3 + 63c: d518be8f msr s3_0_c11_c14_4, x15 + 640: d538be8f mrs x15, s3_0_c11_c14_4 + 644: d518beaf msr s3_0_c11_c14_5, x15 + 648: d538beaf mrs x15, s3_0_c11_c14_5 + 64c: d518becf msr s3_0_c11_c14_6, x15 + 650: d538becf mrs x15, s3_0_c11_c14_6 + 654: d518beef msr s3_0_c11_c14_7, x15 + 658: d538beef mrs x15, s3_0_c11_c14_7 + 65c: d518bf0f msr s3_0_c11_c15_0, x15 + 660: d538bf0f mrs x15, s3_0_c11_c15_0 + 664: d518bf2f msr s3_0_c11_c15_1, x15 + 668: d538bf2f mrs x15, s3_0_c11_c15_1 + 66c: d518bf4f msr s3_0_c11_c15_2, x15 + 670: d538bf4f mrs x15, s3_0_c11_c15_2 + 674: d518bf6f msr s3_0_c11_c15_3, x15 + 678: d538bf6f mrs x15, s3_0_c11_c15_3 + 67c: d518bf8f msr s3_0_c11_c15_4, x15 + 680: d538bf8f mrs x15, s3_0_c11_c15_4 + 684: d518bfaf msr s3_0_c11_c15_5, x15 + 688: d538bfaf mrs x15, s3_0_c11_c15_5 + 68c: d518bfcf msr s3_0_c11_c15_6, x15 + 690: d538bfcf mrs x15, s3_0_c11_c15_6 + 694: d518bfef msr s3_0_c11_c15_7, x15 + 698: d538bfef mrs x15, s3_0_c11_c15_7 + 69c: d518f00f msr s3_0_c15_c0_0, x15 + 6a0: d538f00f mrs x15, s3_0_c15_c0_0 + 6a4: d518f02f msr s3_0_c15_c0_1, x15 + 6a8: d538f02f mrs x15, s3_0_c15_c0_1 + 6ac: d518f04f msr s3_0_c15_c0_2, x15 + 6b0: d538f04f mrs x15, s3_0_c15_c0_2 + 6b4: d518f06f msr s3_0_c15_c0_3, x15 + 6b8: d538f06f mrs x15, s3_0_c15_c0_3 + 6bc: d518f08f msr s3_0_c15_c0_4, x15 + 6c0: d538f08f mrs x15, s3_0_c15_c0_4 + 6c4: d518f0af msr s3_0_c15_c0_5, x15 + 6c8: d538f0af mrs x15, s3_0_c15_c0_5 + 6cc: d518f0cf msr s3_0_c15_c0_6, x15 + 6d0: d538f0cf mrs x15, s3_0_c15_c0_6 + 6d4: d518f0ef msr s3_0_c15_c0_7, x15 + 6d8: d538f0ef mrs x15, s3_0_c15_c0_7 + 6dc: d518f10f msr s3_0_c15_c1_0, x15 + 6e0: d538f10f mrs x15, s3_0_c15_c1_0 + 6e4: d518f12f msr s3_0_c15_c1_1, x15 + 6e8: d538f12f mrs x15, s3_0_c15_c1_1 + 6ec: d518f14f msr s3_0_c15_c1_2, x15 + 6f0: d538f14f mrs x15, s3_0_c15_c1_2 + 6f4: d518f16f msr s3_0_c15_c1_3, x15 + 6f8: d538f16f mrs x15, s3_0_c15_c1_3 + 6fc: d518f18f msr s3_0_c15_c1_4, x15 + 700: d538f18f mrs x15, s3_0_c15_c1_4 + 704: d518f1af msr s3_0_c15_c1_5, x15 + 708: d538f1af mrs x15, s3_0_c15_c1_5 + 70c: d518f1cf msr s3_0_c15_c1_6, x15 + 710: d538f1cf mrs x15, s3_0_c15_c1_6 + 714: d518f1ef msr s3_0_c15_c1_7, x15 + 718: d538f1ef mrs x15, s3_0_c15_c1_7 + 71c: d518f20f msr s3_0_c15_c2_0, x15 + 720: d538f20f mrs x15, s3_0_c15_c2_0 + 724: d518f22f msr s3_0_c15_c2_1, x15 + 728: d538f22f mrs x15, s3_0_c15_c2_1 + 72c: d518f24f msr s3_0_c15_c2_2, x15 + 730: d538f24f mrs x15, s3_0_c15_c2_2 + 734: d518f26f msr s3_0_c15_c2_3, x15 + 738: d538f26f mrs x15, s3_0_c15_c2_3 + 73c: d518f28f msr s3_0_c15_c2_4, x15 + 740: d538f28f mrs x15, s3_0_c15_c2_4 + 744: d518f2af msr s3_0_c15_c2_5, x15 + 748: d538f2af mrs x15, s3_0_c15_c2_5 + 74c: d518f2cf msr s3_0_c15_c2_6, x15 + 750: d538f2cf mrs x15, s3_0_c15_c2_6 + 754: d518f2ef msr s3_0_c15_c2_7, x15 + 758: d538f2ef mrs x15, s3_0_c15_c2_7 + 75c: d518f30f msr s3_0_c15_c3_0, x15 + 760: d538f30f mrs x15, s3_0_c15_c3_0 + 764: d518f32f msr s3_0_c15_c3_1, x15 + 768: d538f32f mrs x15, s3_0_c15_c3_1 + 76c: d518f34f msr s3_0_c15_c3_2, x15 + 770: d538f34f mrs x15, s3_0_c15_c3_2 + 774: d518f36f msr s3_0_c15_c3_3, x15 + 778: d538f36f mrs x15, s3_0_c15_c3_3 + 77c: d518f38f msr s3_0_c15_c3_4, x15 + 780: d538f38f mrs x15, s3_0_c15_c3_4 + 784: d518f3af msr s3_0_c15_c3_5, x15 + 788: d538f3af mrs x15, s3_0_c15_c3_5 + 78c: d518f3cf msr s3_0_c15_c3_6, x15 + 790: d538f3cf mrs x15, s3_0_c15_c3_6 + 794: d518f3ef msr s3_0_c15_c3_7, x15 + 798: d538f3ef mrs x15, s3_0_c15_c3_7 + 79c: d518f40f msr s3_0_c15_c4_0, x15 + 7a0: d538f40f mrs x15, s3_0_c15_c4_0 + 7a4: d518f42f msr s3_0_c15_c4_1, x15 + 7a8: d538f42f mrs x15, s3_0_c15_c4_1 + 7ac: d518f44f msr s3_0_c15_c4_2, x15 + 7b0: d538f44f mrs x15, s3_0_c15_c4_2 + 7b4: d518f46f msr s3_0_c15_c4_3, x15 + 7b8: d538f46f mrs x15, s3_0_c15_c4_3 + 7bc: d518f48f msr s3_0_c15_c4_4, x15 + 7c0: d538f48f mrs x15, s3_0_c15_c4_4 + 7c4: d518f4af msr s3_0_c15_c4_5, x15 + 7c8: d538f4af mrs x15, s3_0_c15_c4_5 + 7cc: d518f4cf msr s3_0_c15_c4_6, x15 + 7d0: d538f4cf mrs x15, s3_0_c15_c4_6 + 7d4: d518f4ef msr s3_0_c15_c4_7, x15 + 7d8: d538f4ef mrs x15, s3_0_c15_c4_7 + 7dc: d518f50f msr s3_0_c15_c5_0, x15 + 7e0: d538f50f mrs x15, s3_0_c15_c5_0 + 7e4: d518f52f msr s3_0_c15_c5_1, x15 + 7e8: d538f52f mrs x15, s3_0_c15_c5_1 + 7ec: d518f54f msr s3_0_c15_c5_2, x15 + 7f0: d538f54f mrs x15, s3_0_c15_c5_2 + 7f4: d518f56f msr s3_0_c15_c5_3, x15 + 7f8: d538f56f mrs x15, s3_0_c15_c5_3 + 7fc: d518f58f msr s3_0_c15_c5_4, x15 + 800: d538f58f mrs x15, s3_0_c15_c5_4 + 804: d518f5af msr s3_0_c15_c5_5, x15 + 808: d538f5af mrs x15, s3_0_c15_c5_5 + 80c: d518f5cf msr s3_0_c15_c5_6, x15 + 810: d538f5cf mrs x15, s3_0_c15_c5_6 + 814: d518f5ef msr s3_0_c15_c5_7, x15 + 818: d538f5ef mrs x15, s3_0_c15_c5_7 + 81c: d518f60f msr s3_0_c15_c6_0, x15 + 820: d538f60f mrs x15, s3_0_c15_c6_0 + 824: d518f62f msr s3_0_c15_c6_1, x15 + 828: d538f62f mrs x15, s3_0_c15_c6_1 + 82c: d518f64f msr s3_0_c15_c6_2, x15 + 830: d538f64f mrs x15, s3_0_c15_c6_2 + 834: d518f66f msr s3_0_c15_c6_3, x15 + 838: d538f66f mrs x15, s3_0_c15_c6_3 + 83c: d518f68f msr s3_0_c15_c6_4, x15 + 840: d538f68f mrs x15, s3_0_c15_c6_4 + 844: d518f6af msr s3_0_c15_c6_5, x15 + 848: d538f6af mrs x15, s3_0_c15_c6_5 + 84c: d518f6cf msr s3_0_c15_c6_6, x15 + 850: d538f6cf mrs x15, s3_0_c15_c6_6 + 854: d518f6ef msr s3_0_c15_c6_7, x15 + 858: d538f6ef mrs x15, s3_0_c15_c6_7 + 85c: d518f70f msr s3_0_c15_c7_0, x15 + 860: d538f70f mrs x15, s3_0_c15_c7_0 + 864: d518f72f msr s3_0_c15_c7_1, x15 + 868: d538f72f mrs x15, s3_0_c15_c7_1 + 86c: d518f74f msr s3_0_c15_c7_2, x15 + 870: d538f74f mrs x15, s3_0_c15_c7_2 + 874: d518f76f msr s3_0_c15_c7_3, x15 + 878: d538f76f mrs x15, s3_0_c15_c7_3 + 87c: d518f78f msr s3_0_c15_c7_4, x15 + 880: d538f78f mrs x15, s3_0_c15_c7_4 + 884: d518f7af msr s3_0_c15_c7_5, x15 + 888: d538f7af mrs x15, s3_0_c15_c7_5 + 88c: d518f7cf msr s3_0_c15_c7_6, x15 + 890: d538f7cf mrs x15, s3_0_c15_c7_6 + 894: d518f7ef msr s3_0_c15_c7_7, x15 + 898: d538f7ef mrs x15, s3_0_c15_c7_7 + 89c: d518f80f msr s3_0_c15_c8_0, x15 + 8a0: d538f80f mrs x15, s3_0_c15_c8_0 + 8a4: d518f82f msr s3_0_c15_c8_1, x15 + 8a8: d538f82f mrs x15, s3_0_c15_c8_1 + 8ac: d518f84f msr s3_0_c15_c8_2, x15 + 8b0: d538f84f mrs x15, s3_0_c15_c8_2 + 8b4: d518f86f msr s3_0_c15_c8_3, x15 + 8b8: d538f86f mrs x15, s3_0_c15_c8_3 + 8bc: d518f88f msr s3_0_c15_c8_4, x15 + 8c0: d538f88f mrs x15, s3_0_c15_c8_4 + 8c4: d518f8af msr s3_0_c15_c8_5, x15 + 8c8: d538f8af mrs x15, s3_0_c15_c8_5 + 8cc: d518f8cf msr s3_0_c15_c8_6, x15 + 8d0: d538f8cf mrs x15, s3_0_c15_c8_6 + 8d4: d518f8ef msr s3_0_c15_c8_7, x15 + 8d8: d538f8ef mrs x15, s3_0_c15_c8_7 + 8dc: d518f90f msr s3_0_c15_c9_0, x15 + 8e0: d538f90f mrs x15, s3_0_c15_c9_0 + 8e4: d518f92f msr s3_0_c15_c9_1, x15 + 8e8: d538f92f mrs x15, s3_0_c15_c9_1 + 8ec: d518f94f msr s3_0_c15_c9_2, x15 + 8f0: d538f94f mrs x15, s3_0_c15_c9_2 + 8f4: d518f96f msr s3_0_c15_c9_3, x15 + 8f8: d538f96f mrs x15, s3_0_c15_c9_3 + 8fc: d518f98f msr s3_0_c15_c9_4, x15 + 900: d538f98f mrs x15, s3_0_c15_c9_4 + 904: d518f9af msr s3_0_c15_c9_5, x15 + 908: d538f9af mrs x15, s3_0_c15_c9_5 + 90c: d518f9cf msr s3_0_c15_c9_6, x15 + 910: d538f9cf mrs x15, s3_0_c15_c9_6 + 914: d518f9ef msr s3_0_c15_c9_7, x15 + 918: d538f9ef mrs x15, s3_0_c15_c9_7 + 91c: d518fa0f msr s3_0_c15_c10_0, x15 + 920: d538fa0f mrs x15, s3_0_c15_c10_0 + 924: d518fa2f msr s3_0_c15_c10_1, x15 + 928: d538fa2f mrs x15, s3_0_c15_c10_1 + 92c: d518fa4f msr s3_0_c15_c10_2, x15 + 930: d538fa4f mrs x15, s3_0_c15_c10_2 + 934: d518fa6f msr s3_0_c15_c10_3, x15 + 938: d538fa6f mrs x15, s3_0_c15_c10_3 + 93c: d518fa8f msr s3_0_c15_c10_4, x15 + 940: d538fa8f mrs x15, s3_0_c15_c10_4 + 944: d518faaf msr s3_0_c15_c10_5, x15 + 948: d538faaf mrs x15, s3_0_c15_c10_5 + 94c: d518facf msr s3_0_c15_c10_6, x15 + 950: d538facf mrs x15, s3_0_c15_c10_6 + 954: d518faef msr s3_0_c15_c10_7, x15 + 958: d538faef mrs x15, s3_0_c15_c10_7 + 95c: d518fb0f msr s3_0_c15_c11_0, x15 + 960: d538fb0f mrs x15, s3_0_c15_c11_0 + 964: d518fb2f msr s3_0_c15_c11_1, x15 + 968: d538fb2f mrs x15, s3_0_c15_c11_1 + 96c: d518fb4f msr s3_0_c15_c11_2, x15 + 970: d538fb4f mrs x15, s3_0_c15_c11_2 + 974: d518fb6f msr s3_0_c15_c11_3, x15 + 978: d538fb6f mrs x15, s3_0_c15_c11_3 + 97c: d518fb8f msr s3_0_c15_c11_4, x15 + 980: d538fb8f mrs x15, s3_0_c15_c11_4 + 984: d518fbaf msr s3_0_c15_c11_5, x15 + 988: d538fbaf mrs x15, s3_0_c15_c11_5 + 98c: d518fbcf msr s3_0_c15_c11_6, x15 + 990: d538fbcf mrs x15, s3_0_c15_c11_6 + 994: d518fbef msr s3_0_c15_c11_7, x15 + 998: d538fbef mrs x15, s3_0_c15_c11_7 + 99c: d518fc0f msr s3_0_c15_c12_0, x15 + 9a0: d538fc0f mrs x15, s3_0_c15_c12_0 + 9a4: d518fc2f msr s3_0_c15_c12_1, x15 + 9a8: d538fc2f mrs x15, s3_0_c15_c12_1 + 9ac: d518fc4f msr s3_0_c15_c12_2, x15 + 9b0: d538fc4f mrs x15, s3_0_c15_c12_2 + 9b4: d518fc6f msr s3_0_c15_c12_3, x15 + 9b8: d538fc6f mrs x15, s3_0_c15_c12_3 + 9bc: d518fc8f msr s3_0_c15_c12_4, x15 + 9c0: d538fc8f mrs x15, s3_0_c15_c12_4 + 9c4: d518fcaf msr s3_0_c15_c12_5, x15 + 9c8: d538fcaf mrs x15, s3_0_c15_c12_5 + 9cc: d518fccf msr s3_0_c15_c12_6, x15 + 9d0: d538fccf mrs x15, s3_0_c15_c12_6 + 9d4: d518fcef msr s3_0_c15_c12_7, x15 + 9d8: d538fcef mrs x15, s3_0_c15_c12_7 + 9dc: d518fd0f msr s3_0_c15_c13_0, x15 + 9e0: d538fd0f mrs x15, s3_0_c15_c13_0 + 9e4: d518fd2f msr s3_0_c15_c13_1, x15 + 9e8: d538fd2f mrs x15, s3_0_c15_c13_1 + 9ec: d518fd4f msr s3_0_c15_c13_2, x15 + 9f0: d538fd4f mrs x15, s3_0_c15_c13_2 + 9f4: d518fd6f msr s3_0_c15_c13_3, x15 + 9f8: d538fd6f mrs x15, s3_0_c15_c13_3 + 9fc: d518fd8f msr s3_0_c15_c13_4, x15 + a00: d538fd8f mrs x15, s3_0_c15_c13_4 + a04: d518fdaf msr s3_0_c15_c13_5, x15 + a08: d538fdaf mrs x15, s3_0_c15_c13_5 + a0c: d518fdcf msr s3_0_c15_c13_6, x15 + a10: d538fdcf mrs x15, s3_0_c15_c13_6 + a14: d518fdef msr s3_0_c15_c13_7, x15 + a18: d538fdef mrs x15, s3_0_c15_c13_7 + a1c: d518fe0f msr s3_0_c15_c14_0, x15 + a20: d538fe0f mrs x15, s3_0_c15_c14_0 + a24: d518fe2f msr s3_0_c15_c14_1, x15 + a28: d538fe2f mrs x15, s3_0_c15_c14_1 + a2c: d518fe4f msr s3_0_c15_c14_2, x15 + a30: d538fe4f mrs x15, s3_0_c15_c14_2 + a34: d518fe6f msr s3_0_c15_c14_3, x15 + a38: d538fe6f mrs x15, s3_0_c15_c14_3 + a3c: d518fe8f msr s3_0_c15_c14_4, x15 + a40: d538fe8f mrs x15, s3_0_c15_c14_4 + a44: d518feaf msr s3_0_c15_c14_5, x15 + a48: d538feaf mrs x15, s3_0_c15_c14_5 + a4c: d518fecf msr s3_0_c15_c14_6, x15 + a50: d538fecf mrs x15, s3_0_c15_c14_6 + a54: d518feef msr s3_0_c15_c14_7, x15 + a58: d538feef mrs x15, s3_0_c15_c14_7 + a5c: d518ff0f msr s3_0_c15_c15_0, x15 + a60: d538ff0f mrs x15, s3_0_c15_c15_0 + a64: d518ff2f msr s3_0_c15_c15_1, x15 + a68: d538ff2f mrs x15, s3_0_c15_c15_1 + a6c: d518ff4f msr s3_0_c15_c15_2, x15 + a70: d538ff4f mrs x15, s3_0_c15_c15_2 + a74: d518ff6f msr s3_0_c15_c15_3, x15 + a78: d538ff6f mrs x15, s3_0_c15_c15_3 + a7c: d518ff8f msr s3_0_c15_c15_4, x15 + a80: d538ff8f mrs x15, s3_0_c15_c15_4 + a84: d518ffaf msr s3_0_c15_c15_5, x15 + a88: d538ffaf mrs x15, s3_0_c15_c15_5 + a8c: d518ffcf msr s3_0_c15_c15_6, x15 + a90: d538ffcf mrs x15, s3_0_c15_c15_6 + a94: d518ffef msr s3_0_c15_c15_7, x15 + a98: d538ffef mrs x15, s3_0_c15_c15_7 + a9c: d519b00f msr s3_1_c11_c0_0, x15 + aa0: d539b00f mrs x15, s3_1_c11_c0_0 + aa4: d519b02f msr s3_1_c11_c0_1, x15 + aa8: d539b02f mrs x15, s3_1_c11_c0_1 + aac: d519b04f msr s3_1_c11_c0_2, x15 + ab0: d539b04f mrs x15, s3_1_c11_c0_2 + ab4: d519b06f msr s3_1_c11_c0_3, x15 + ab8: d539b06f mrs x15, s3_1_c11_c0_3 + abc: d519b08f msr s3_1_c11_c0_4, x15 + ac0: d539b08f mrs x15, s3_1_c11_c0_4 + ac4: d519b0af msr s3_1_c11_c0_5, x15 + ac8: d539b0af mrs x15, s3_1_c11_c0_5 + acc: d519b0cf msr s3_1_c11_c0_6, x15 + ad0: d539b0cf mrs x15, s3_1_c11_c0_6 + ad4: d519b0ef msr s3_1_c11_c0_7, x15 + ad8: d539b0ef mrs x15, s3_1_c11_c0_7 + adc: d519b10f msr s3_1_c11_c1_0, x15 + ae0: d539b10f mrs x15, s3_1_c11_c1_0 + ae4: d519b12f msr s3_1_c11_c1_1, x15 + ae8: d539b12f mrs x15, s3_1_c11_c1_1 + aec: d519b14f msr s3_1_c11_c1_2, x15 + af0: d539b14f mrs x15, s3_1_c11_c1_2 + af4: d519b16f msr s3_1_c11_c1_3, x15 + af8: d539b16f mrs x15, s3_1_c11_c1_3 + afc: d519b18f msr s3_1_c11_c1_4, x15 + b00: d539b18f mrs x15, s3_1_c11_c1_4 + b04: d519b1af msr s3_1_c11_c1_5, x15 + b08: d539b1af mrs x15, s3_1_c11_c1_5 + b0c: d519b1cf msr s3_1_c11_c1_6, x15 + b10: d539b1cf mrs x15, s3_1_c11_c1_6 + b14: d519b1ef msr s3_1_c11_c1_7, x15 + b18: d539b1ef mrs x15, s3_1_c11_c1_7 + b1c: d519b20f msr s3_1_c11_c2_0, x15 + b20: d539b20f mrs x15, s3_1_c11_c2_0 + b24: d519b22f msr s3_1_c11_c2_1, x15 + b28: d539b22f mrs x15, s3_1_c11_c2_1 + b2c: d519b24f msr s3_1_c11_c2_2, x15 + b30: d539b24f mrs x15, s3_1_c11_c2_2 + b34: d519b26f msr s3_1_c11_c2_3, x15 + b38: d539b26f mrs x15, s3_1_c11_c2_3 + b3c: d519b28f msr s3_1_c11_c2_4, x15 + b40: d539b28f mrs x15, s3_1_c11_c2_4 + b44: d519b2af msr s3_1_c11_c2_5, x15 + b48: d539b2af mrs x15, s3_1_c11_c2_5 + b4c: d519b2cf msr s3_1_c11_c2_6, x15 + b50: d539b2cf mrs x15, s3_1_c11_c2_6 + b54: d519b2ef msr s3_1_c11_c2_7, x15 + b58: d539b2ef mrs x15, s3_1_c11_c2_7 + b5c: d519b30f msr s3_1_c11_c3_0, x15 + b60: d539b30f mrs x15, s3_1_c11_c3_0 + b64: d519b32f msr s3_1_c11_c3_1, x15 + b68: d539b32f mrs x15, s3_1_c11_c3_1 + b6c: d519b34f msr s3_1_c11_c3_2, x15 + b70: d539b34f mrs x15, s3_1_c11_c3_2 + b74: d519b36f msr s3_1_c11_c3_3, x15 + b78: d539b36f mrs x15, s3_1_c11_c3_3 + b7c: d519b38f msr s3_1_c11_c3_4, x15 + b80: d539b38f mrs x15, s3_1_c11_c3_4 + b84: d519b3af msr s3_1_c11_c3_5, x15 + b88: d539b3af mrs x15, s3_1_c11_c3_5 + b8c: d519b3cf msr s3_1_c11_c3_6, x15 + b90: d539b3cf mrs x15, s3_1_c11_c3_6 + b94: d519b3ef msr s3_1_c11_c3_7, x15 + b98: d539b3ef mrs x15, s3_1_c11_c3_7 + b9c: d519b40f msr s3_1_c11_c4_0, x15 + ba0: d539b40f mrs x15, s3_1_c11_c4_0 + ba4: d519b42f msr s3_1_c11_c4_1, x15 + ba8: d539b42f mrs x15, s3_1_c11_c4_1 + bac: d519b44f msr s3_1_c11_c4_2, x15 + bb0: d539b44f mrs x15, s3_1_c11_c4_2 + bb4: d519b46f msr s3_1_c11_c4_3, x15 + bb8: d539b46f mrs x15, s3_1_c11_c4_3 + bbc: d519b48f msr s3_1_c11_c4_4, x15 + bc0: d539b48f mrs x15, s3_1_c11_c4_4 + bc4: d519b4af msr s3_1_c11_c4_5, x15 + bc8: d539b4af mrs x15, s3_1_c11_c4_5 + bcc: d519b4cf msr s3_1_c11_c4_6, x15 + bd0: d539b4cf mrs x15, s3_1_c11_c4_6 + bd4: d519b4ef msr s3_1_c11_c4_7, x15 + bd8: d539b4ef mrs x15, s3_1_c11_c4_7 + bdc: d519b50f msr s3_1_c11_c5_0, x15 + be0: d539b50f mrs x15, s3_1_c11_c5_0 + be4: d519b52f msr s3_1_c11_c5_1, x15 + be8: d539b52f mrs x15, s3_1_c11_c5_1 + bec: d519b54f msr s3_1_c11_c5_2, x15 + bf0: d539b54f mrs x15, s3_1_c11_c5_2 + bf4: d519b56f msr s3_1_c11_c5_3, x15 + bf8: d539b56f mrs x15, s3_1_c11_c5_3 + bfc: d519b58f msr s3_1_c11_c5_4, x15 + c00: d539b58f mrs x15, s3_1_c11_c5_4 + c04: d519b5af msr s3_1_c11_c5_5, x15 + c08: d539b5af mrs x15, s3_1_c11_c5_5 + c0c: d519b5cf msr s3_1_c11_c5_6, x15 + c10: d539b5cf mrs x15, s3_1_c11_c5_6 + c14: d519b5ef msr s3_1_c11_c5_7, x15 + c18: d539b5ef mrs x15, s3_1_c11_c5_7 + c1c: d519b60f msr s3_1_c11_c6_0, x15 + c20: d539b60f mrs x15, s3_1_c11_c6_0 + c24: d519b62f msr s3_1_c11_c6_1, x15 + c28: d539b62f mrs x15, s3_1_c11_c6_1 + c2c: d519b64f msr s3_1_c11_c6_2, x15 + c30: d539b64f mrs x15, s3_1_c11_c6_2 + c34: d519b66f msr s3_1_c11_c6_3, x15 + c38: d539b66f mrs x15, s3_1_c11_c6_3 + c3c: d519b68f msr s3_1_c11_c6_4, x15 + c40: d539b68f mrs x15, s3_1_c11_c6_4 + c44: d519b6af msr s3_1_c11_c6_5, x15 + c48: d539b6af mrs x15, s3_1_c11_c6_5 + c4c: d519b6cf msr s3_1_c11_c6_6, x15 + c50: d539b6cf mrs x15, s3_1_c11_c6_6 + c54: d519b6ef msr s3_1_c11_c6_7, x15 + c58: d539b6ef mrs x15, s3_1_c11_c6_7 + c5c: d519b70f msr s3_1_c11_c7_0, x15 + c60: d539b70f mrs x15, s3_1_c11_c7_0 + c64: d519b72f msr s3_1_c11_c7_1, x15 + c68: d539b72f mrs x15, s3_1_c11_c7_1 + c6c: d519b74f msr s3_1_c11_c7_2, x15 + c70: d539b74f mrs x15, s3_1_c11_c7_2 + c74: d519b76f msr s3_1_c11_c7_3, x15 + c78: d539b76f mrs x15, s3_1_c11_c7_3 + c7c: d519b78f msr s3_1_c11_c7_4, x15 + c80: d539b78f mrs x15, s3_1_c11_c7_4 + c84: d519b7af msr s3_1_c11_c7_5, x15 + c88: d539b7af mrs x15, s3_1_c11_c7_5 + c8c: d519b7cf msr s3_1_c11_c7_6, x15 + c90: d539b7cf mrs x15, s3_1_c11_c7_6 + c94: d519b7ef msr s3_1_c11_c7_7, x15 + c98: d539b7ef mrs x15, s3_1_c11_c7_7 + c9c: d519b80f msr s3_1_c11_c8_0, x15 + ca0: d539b80f mrs x15, s3_1_c11_c8_0 + ca4: d519b82f msr s3_1_c11_c8_1, x15 + ca8: d539b82f mrs x15, s3_1_c11_c8_1 + cac: d519b84f msr s3_1_c11_c8_2, x15 + cb0: d539b84f mrs x15, s3_1_c11_c8_2 + cb4: d519b86f msr s3_1_c11_c8_3, x15 + cb8: d539b86f mrs x15, s3_1_c11_c8_3 + cbc: d519b88f msr s3_1_c11_c8_4, x15 + cc0: d539b88f mrs x15, s3_1_c11_c8_4 + cc4: d519b8af msr s3_1_c11_c8_5, x15 + cc8: d539b8af mrs x15, s3_1_c11_c8_5 + ccc: d519b8cf msr s3_1_c11_c8_6, x15 + cd0: d539b8cf mrs x15, s3_1_c11_c8_6 + cd4: d519b8ef msr s3_1_c11_c8_7, x15 + cd8: d539b8ef mrs x15, s3_1_c11_c8_7 + cdc: d519b90f msr s3_1_c11_c9_0, x15 + ce0: d539b90f mrs x15, s3_1_c11_c9_0 + ce4: d519b92f msr s3_1_c11_c9_1, x15 + ce8: d539b92f mrs x15, s3_1_c11_c9_1 + cec: d519b94f msr s3_1_c11_c9_2, x15 + cf0: d539b94f mrs x15, s3_1_c11_c9_2 + cf4: d519b96f msr s3_1_c11_c9_3, x15 + cf8: d539b96f mrs x15, s3_1_c11_c9_3 + cfc: d519b98f msr s3_1_c11_c9_4, x15 + d00: d539b98f mrs x15, s3_1_c11_c9_4 + d04: d519b9af msr s3_1_c11_c9_5, x15 + d08: d539b9af mrs x15, s3_1_c11_c9_5 + d0c: d519b9cf msr s3_1_c11_c9_6, x15 + d10: d539b9cf mrs x15, s3_1_c11_c9_6 + d14: d519b9ef msr s3_1_c11_c9_7, x15 + d18: d539b9ef mrs x15, s3_1_c11_c9_7 + d1c: d519ba0f msr s3_1_c11_c10_0, x15 + d20: d539ba0f mrs x15, s3_1_c11_c10_0 + d24: d519ba2f msr s3_1_c11_c10_1, x15 + d28: d539ba2f mrs x15, s3_1_c11_c10_1 + d2c: d519ba4f msr s3_1_c11_c10_2, x15 + d30: d539ba4f mrs x15, s3_1_c11_c10_2 + d34: d519ba6f msr s3_1_c11_c10_3, x15 + d38: d539ba6f mrs x15, s3_1_c11_c10_3 + d3c: d519ba8f msr s3_1_c11_c10_4, x15 + d40: d539ba8f mrs x15, s3_1_c11_c10_4 + d44: d519baaf msr s3_1_c11_c10_5, x15 + d48: d539baaf mrs x15, s3_1_c11_c10_5 + d4c: d519bacf msr s3_1_c11_c10_6, x15 + d50: d539bacf mrs x15, s3_1_c11_c10_6 + d54: d519baef msr s3_1_c11_c10_7, x15 + d58: d539baef mrs x15, s3_1_c11_c10_7 + d5c: d519bb0f msr s3_1_c11_c11_0, x15 + d60: d539bb0f mrs x15, s3_1_c11_c11_0 + d64: d519bb2f msr s3_1_c11_c11_1, x15 + d68: d539bb2f mrs x15, s3_1_c11_c11_1 + d6c: d519bb4f msr s3_1_c11_c11_2, x15 + d70: d539bb4f mrs x15, s3_1_c11_c11_2 + d74: d519bb6f msr s3_1_c11_c11_3, x15 + d78: d539bb6f mrs x15, s3_1_c11_c11_3 + d7c: d519bb8f msr s3_1_c11_c11_4, x15 + d80: d539bb8f mrs x15, s3_1_c11_c11_4 + d84: d519bbaf msr s3_1_c11_c11_5, x15 + d88: d539bbaf mrs x15, s3_1_c11_c11_5 + d8c: d519bbcf msr s3_1_c11_c11_6, x15 + d90: d539bbcf mrs x15, s3_1_c11_c11_6 + d94: d519bbef msr s3_1_c11_c11_7, x15 + d98: d539bbef mrs x15, s3_1_c11_c11_7 + d9c: d519bc0f msr s3_1_c11_c12_0, x15 + da0: d539bc0f mrs x15, s3_1_c11_c12_0 + da4: d519bc2f msr s3_1_c11_c12_1, x15 + da8: d539bc2f mrs x15, s3_1_c11_c12_1 + dac: d519bc4f msr s3_1_c11_c12_2, x15 + db0: d539bc4f mrs x15, s3_1_c11_c12_2 + db4: d519bc6f msr s3_1_c11_c12_3, x15 + db8: d539bc6f mrs x15, s3_1_c11_c12_3 + dbc: d519bc8f msr s3_1_c11_c12_4, x15 + dc0: d539bc8f mrs x15, s3_1_c11_c12_4 + dc4: d519bcaf msr s3_1_c11_c12_5, x15 + dc8: d539bcaf mrs x15, s3_1_c11_c12_5 + dcc: d519bccf msr s3_1_c11_c12_6, x15 + dd0: d539bccf mrs x15, s3_1_c11_c12_6 + dd4: d519bcef msr s3_1_c11_c12_7, x15 + dd8: d539bcef mrs x15, s3_1_c11_c12_7 + ddc: d519bd0f msr s3_1_c11_c13_0, x15 + de0: d539bd0f mrs x15, s3_1_c11_c13_0 + de4: d519bd2f msr s3_1_c11_c13_1, x15 + de8: d539bd2f mrs x15, s3_1_c11_c13_1 + dec: d519bd4f msr s3_1_c11_c13_2, x15 + df0: d539bd4f mrs x15, s3_1_c11_c13_2 + df4: d519bd6f msr s3_1_c11_c13_3, x15 + df8: d539bd6f mrs x15, s3_1_c11_c13_3 + dfc: d519bd8f msr s3_1_c11_c13_4, x15 + e00: d539bd8f mrs x15, s3_1_c11_c13_4 + e04: d519bdaf msr s3_1_c11_c13_5, x15 + e08: d539bdaf mrs x15, s3_1_c11_c13_5 + e0c: d519bdcf msr s3_1_c11_c13_6, x15 + e10: d539bdcf mrs x15, s3_1_c11_c13_6 + e14: d519bdef msr s3_1_c11_c13_7, x15 + e18: d539bdef mrs x15, s3_1_c11_c13_7 + e1c: d519be0f msr s3_1_c11_c14_0, x15 + e20: d539be0f mrs x15, s3_1_c11_c14_0 + e24: d519be2f msr s3_1_c11_c14_1, x15 + e28: d539be2f mrs x15, s3_1_c11_c14_1 + e2c: d519be4f msr s3_1_c11_c14_2, x15 + e30: d539be4f mrs x15, s3_1_c11_c14_2 + e34: d519be6f msr s3_1_c11_c14_3, x15 + e38: d539be6f mrs x15, s3_1_c11_c14_3 + e3c: d519be8f msr s3_1_c11_c14_4, x15 + e40: d539be8f mrs x15, s3_1_c11_c14_4 + e44: d519beaf msr s3_1_c11_c14_5, x15 + e48: d539beaf mrs x15, s3_1_c11_c14_5 + e4c: d519becf msr s3_1_c11_c14_6, x15 + e50: d539becf mrs x15, s3_1_c11_c14_6 + e54: d519beef msr s3_1_c11_c14_7, x15 + e58: d539beef mrs x15, s3_1_c11_c14_7 + e5c: d519bf0f msr s3_1_c11_c15_0, x15 + e60: d539bf0f mrs x15, s3_1_c11_c15_0 + e64: d519bf2f msr s3_1_c11_c15_1, x15 + e68: d539bf2f mrs x15, s3_1_c11_c15_1 + e6c: d519bf4f msr s3_1_c11_c15_2, x15 + e70: d539bf4f mrs x15, s3_1_c11_c15_2 + e74: d519bf6f msr s3_1_c11_c15_3, x15 + e78: d539bf6f mrs x15, s3_1_c11_c15_3 + e7c: d519bf8f msr s3_1_c11_c15_4, x15 + e80: d539bf8f mrs x15, s3_1_c11_c15_4 + e84: d519bfaf msr s3_1_c11_c15_5, x15 + e88: d539bfaf mrs x15, s3_1_c11_c15_5 + e8c: d519bfcf msr s3_1_c11_c15_6, x15 + e90: d539bfcf mrs x15, s3_1_c11_c15_6 + e94: d519bfef msr s3_1_c11_c15_7, x15 + e98: d539bfef mrs x15, s3_1_c11_c15_7 + e9c: d519f00f msr s3_1_c15_c0_0, x15 + ea0: d539f00f mrs x15, s3_1_c15_c0_0 + ea4: d519f02f msr s3_1_c15_c0_1, x15 + ea8: d539f02f mrs x15, s3_1_c15_c0_1 + eac: d519f04f msr s3_1_c15_c0_2, x15 + eb0: d539f04f mrs x15, s3_1_c15_c0_2 + eb4: d519f06f msr s3_1_c15_c0_3, x15 + eb8: d539f06f mrs x15, s3_1_c15_c0_3 + ebc: d519f08f msr s3_1_c15_c0_4, x15 + ec0: d539f08f mrs x15, s3_1_c15_c0_4 + ec4: d519f0af msr s3_1_c15_c0_5, x15 + ec8: d539f0af mrs x15, s3_1_c15_c0_5 + ecc: d519f0cf msr s3_1_c15_c0_6, x15 + ed0: d539f0cf mrs x15, s3_1_c15_c0_6 + ed4: d519f0ef msr s3_1_c15_c0_7, x15 + ed8: d539f0ef mrs x15, s3_1_c15_c0_7 + edc: d519f10f msr s3_1_c15_c1_0, x15 + ee0: d539f10f mrs x15, s3_1_c15_c1_0 + ee4: d519f12f msr s3_1_c15_c1_1, x15 + ee8: d539f12f mrs x15, s3_1_c15_c1_1 + eec: d519f14f msr s3_1_c15_c1_2, x15 + ef0: d539f14f mrs x15, s3_1_c15_c1_2 + ef4: d519f16f msr s3_1_c15_c1_3, x15 + ef8: d539f16f mrs x15, s3_1_c15_c1_3 + efc: d519f18f msr s3_1_c15_c1_4, x15 + f00: d539f18f mrs x15, s3_1_c15_c1_4 + f04: d519f1af msr s3_1_c15_c1_5, x15 + f08: d539f1af mrs x15, s3_1_c15_c1_5 + f0c: d519f1cf msr s3_1_c15_c1_6, x15 + f10: d539f1cf mrs x15, s3_1_c15_c1_6 + f14: d519f1ef msr s3_1_c15_c1_7, x15 + f18: d539f1ef mrs x15, s3_1_c15_c1_7 + f1c: d519f20f msr s3_1_c15_c2_0, x15 + f20: d539f20f mrs x15, s3_1_c15_c2_0 + f24: d519f22f msr s3_1_c15_c2_1, x15 + f28: d539f22f mrs x15, s3_1_c15_c2_1 + f2c: d519f24f msr s3_1_c15_c2_2, x15 + f30: d539f24f mrs x15, s3_1_c15_c2_2 + f34: d519f26f msr s3_1_c15_c2_3, x15 + f38: d539f26f mrs x15, s3_1_c15_c2_3 + f3c: d519f28f msr s3_1_c15_c2_4, x15 + f40: d539f28f mrs x15, s3_1_c15_c2_4 + f44: d519f2af msr s3_1_c15_c2_5, x15 + f48: d539f2af mrs x15, s3_1_c15_c2_5 + f4c: d519f2cf msr s3_1_c15_c2_6, x15 + f50: d539f2cf mrs x15, s3_1_c15_c2_6 + f54: d519f2ef msr s3_1_c15_c2_7, x15 + f58: d539f2ef mrs x15, s3_1_c15_c2_7 + f5c: d519f30f msr s3_1_c15_c3_0, x15 + f60: d539f30f mrs x15, s3_1_c15_c3_0 + f64: d519f32f msr s3_1_c15_c3_1, x15 + f68: d539f32f mrs x15, s3_1_c15_c3_1 + f6c: d519f34f msr s3_1_c15_c3_2, x15 + f70: d539f34f mrs x15, s3_1_c15_c3_2 + f74: d519f36f msr s3_1_c15_c3_3, x15 + f78: d539f36f mrs x15, s3_1_c15_c3_3 + f7c: d519f38f msr s3_1_c15_c3_4, x15 + f80: d539f38f mrs x15, s3_1_c15_c3_4 + f84: d519f3af msr s3_1_c15_c3_5, x15 + f88: d539f3af mrs x15, s3_1_c15_c3_5 + f8c: d519f3cf msr s3_1_c15_c3_6, x15 + f90: d539f3cf mrs x15, s3_1_c15_c3_6 + f94: d519f3ef msr s3_1_c15_c3_7, x15 + f98: d539f3ef mrs x15, s3_1_c15_c3_7 + f9c: d519f40f msr s3_1_c15_c4_0, x15 + fa0: d539f40f mrs x15, s3_1_c15_c4_0 + fa4: d519f42f msr s3_1_c15_c4_1, x15 + fa8: d539f42f mrs x15, s3_1_c15_c4_1 + fac: d519f44f msr s3_1_c15_c4_2, x15 + fb0: d539f44f mrs x15, s3_1_c15_c4_2 + fb4: d519f46f msr s3_1_c15_c4_3, x15 + fb8: d539f46f mrs x15, s3_1_c15_c4_3 + fbc: d519f48f msr s3_1_c15_c4_4, x15 + fc0: d539f48f mrs x15, s3_1_c15_c4_4 + fc4: d519f4af msr s3_1_c15_c4_5, x15 + fc8: d539f4af mrs x15, s3_1_c15_c4_5 + fcc: d519f4cf msr s3_1_c15_c4_6, x15 + fd0: d539f4cf mrs x15, s3_1_c15_c4_6 + fd4: d519f4ef msr s3_1_c15_c4_7, x15 + fd8: d539f4ef mrs x15, s3_1_c15_c4_7 + fdc: d519f50f msr s3_1_c15_c5_0, x15 + fe0: d539f50f mrs x15, s3_1_c15_c5_0 + fe4: d519f52f msr s3_1_c15_c5_1, x15 + fe8: d539f52f mrs x15, s3_1_c15_c5_1 + fec: d519f54f msr s3_1_c15_c5_2, x15 + ff0: d539f54f mrs x15, s3_1_c15_c5_2 + ff4: d519f56f msr s3_1_c15_c5_3, x15 + ff8: d539f56f mrs x15, s3_1_c15_c5_3 + ffc: d519f58f msr s3_1_c15_c5_4, x15 + 1000: d539f58f mrs x15, s3_1_c15_c5_4 + 1004: d519f5af msr s3_1_c15_c5_5, x15 + 1008: d539f5af mrs x15, s3_1_c15_c5_5 + 100c: d519f5cf msr s3_1_c15_c5_6, x15 + 1010: d539f5cf mrs x15, s3_1_c15_c5_6 + 1014: d519f5ef msr s3_1_c15_c5_7, x15 + 1018: d539f5ef mrs x15, s3_1_c15_c5_7 + 101c: d519f60f msr s3_1_c15_c6_0, x15 + 1020: d539f60f mrs x15, s3_1_c15_c6_0 + 1024: d519f62f msr s3_1_c15_c6_1, x15 + 1028: d539f62f mrs x15, s3_1_c15_c6_1 + 102c: d519f64f msr s3_1_c15_c6_2, x15 + 1030: d539f64f mrs x15, s3_1_c15_c6_2 + 1034: d519f66f msr s3_1_c15_c6_3, x15 + 1038: d539f66f mrs x15, s3_1_c15_c6_3 + 103c: d519f68f msr s3_1_c15_c6_4, x15 + 1040: d539f68f mrs x15, s3_1_c15_c6_4 + 1044: d519f6af msr s3_1_c15_c6_5, x15 + 1048: d539f6af mrs x15, s3_1_c15_c6_5 + 104c: d519f6cf msr s3_1_c15_c6_6, x15 + 1050: d539f6cf mrs x15, s3_1_c15_c6_6 + 1054: d519f6ef msr s3_1_c15_c6_7, x15 + 1058: d539f6ef mrs x15, s3_1_c15_c6_7 + 105c: d519f70f msr s3_1_c15_c7_0, x15 + 1060: d539f70f mrs x15, s3_1_c15_c7_0 + 1064: d519f72f msr s3_1_c15_c7_1, x15 + 1068: d539f72f mrs x15, s3_1_c15_c7_1 + 106c: d519f74f msr s3_1_c15_c7_2, x15 + 1070: d539f74f mrs x15, s3_1_c15_c7_2 + 1074: d519f76f msr s3_1_c15_c7_3, x15 + 1078: d539f76f mrs x15, s3_1_c15_c7_3 + 107c: d519f78f msr s3_1_c15_c7_4, x15 + 1080: d539f78f mrs x15, s3_1_c15_c7_4 + 1084: d519f7af msr s3_1_c15_c7_5, x15 + 1088: d539f7af mrs x15, s3_1_c15_c7_5 + 108c: d519f7cf msr s3_1_c15_c7_6, x15 + 1090: d539f7cf mrs x15, s3_1_c15_c7_6 + 1094: d519f7ef msr s3_1_c15_c7_7, x15 + 1098: d539f7ef mrs x15, s3_1_c15_c7_7 + 109c: d519f80f msr s3_1_c15_c8_0, x15 + 10a0: d539f80f mrs x15, s3_1_c15_c8_0 + 10a4: d519f82f msr s3_1_c15_c8_1, x15 + 10a8: d539f82f mrs x15, s3_1_c15_c8_1 + 10ac: d519f84f msr s3_1_c15_c8_2, x15 + 10b0: d539f84f mrs x15, s3_1_c15_c8_2 + 10b4: d519f86f msr s3_1_c15_c8_3, x15 + 10b8: d539f86f mrs x15, s3_1_c15_c8_3 + 10bc: d519f88f msr s3_1_c15_c8_4, x15 + 10c0: d539f88f mrs x15, s3_1_c15_c8_4 + 10c4: d519f8af msr s3_1_c15_c8_5, x15 + 10c8: d539f8af mrs x15, s3_1_c15_c8_5 + 10cc: d519f8cf msr s3_1_c15_c8_6, x15 + 10d0: d539f8cf mrs x15, s3_1_c15_c8_6 + 10d4: d519f8ef msr s3_1_c15_c8_7, x15 + 10d8: d539f8ef mrs x15, s3_1_c15_c8_7 + 10dc: d519f90f msr s3_1_c15_c9_0, x15 + 10e0: d539f90f mrs x15, s3_1_c15_c9_0 + 10e4: d519f92f msr s3_1_c15_c9_1, x15 + 10e8: d539f92f mrs x15, s3_1_c15_c9_1 + 10ec: d519f94f msr s3_1_c15_c9_2, x15 + 10f0: d539f94f mrs x15, s3_1_c15_c9_2 + 10f4: d519f96f msr s3_1_c15_c9_3, x15 + 10f8: d539f96f mrs x15, s3_1_c15_c9_3 + 10fc: d519f98f msr s3_1_c15_c9_4, x15 + 1100: d539f98f mrs x15, s3_1_c15_c9_4 + 1104: d519f9af msr s3_1_c15_c9_5, x15 + 1108: d539f9af mrs x15, s3_1_c15_c9_5 + 110c: d519f9cf msr s3_1_c15_c9_6, x15 + 1110: d539f9cf mrs x15, s3_1_c15_c9_6 + 1114: d519f9ef msr s3_1_c15_c9_7, x15 + 1118: d539f9ef mrs x15, s3_1_c15_c9_7 + 111c: d519fa0f msr s3_1_c15_c10_0, x15 + 1120: d539fa0f mrs x15, s3_1_c15_c10_0 + 1124: d519fa2f msr s3_1_c15_c10_1, x15 + 1128: d539fa2f mrs x15, s3_1_c15_c10_1 + 112c: d519fa4f msr s3_1_c15_c10_2, x15 + 1130: d539fa4f mrs x15, s3_1_c15_c10_2 + 1134: d519fa6f msr s3_1_c15_c10_3, x15 + 1138: d539fa6f mrs x15, s3_1_c15_c10_3 + 113c: d519fa8f msr s3_1_c15_c10_4, x15 + 1140: d539fa8f mrs x15, s3_1_c15_c10_4 + 1144: d519faaf msr s3_1_c15_c10_5, x15 + 1148: d539faaf mrs x15, s3_1_c15_c10_5 + 114c: d519facf msr s3_1_c15_c10_6, x15 + 1150: d539facf mrs x15, s3_1_c15_c10_6 + 1154: d519faef msr s3_1_c15_c10_7, x15 + 1158: d539faef mrs x15, s3_1_c15_c10_7 + 115c: d519fb0f msr s3_1_c15_c11_0, x15 + 1160: d539fb0f mrs x15, s3_1_c15_c11_0 + 1164: d519fb2f msr s3_1_c15_c11_1, x15 + 1168: d539fb2f mrs x15, s3_1_c15_c11_1 + 116c: d519fb4f msr s3_1_c15_c11_2, x15 + 1170: d539fb4f mrs x15, s3_1_c15_c11_2 + 1174: d519fb6f msr s3_1_c15_c11_3, x15 + 1178: d539fb6f mrs x15, s3_1_c15_c11_3 + 117c: d519fb8f msr s3_1_c15_c11_4, x15 + 1180: d539fb8f mrs x15, s3_1_c15_c11_4 + 1184: d519fbaf msr s3_1_c15_c11_5, x15 + 1188: d539fbaf mrs x15, s3_1_c15_c11_5 + 118c: d519fbcf msr s3_1_c15_c11_6, x15 + 1190: d539fbcf mrs x15, s3_1_c15_c11_6 + 1194: d519fbef msr s3_1_c15_c11_7, x15 + 1198: d539fbef mrs x15, s3_1_c15_c11_7 + 119c: d519fc0f msr s3_1_c15_c12_0, x15 + 11a0: d539fc0f mrs x15, s3_1_c15_c12_0 + 11a4: d519fc2f msr s3_1_c15_c12_1, x15 + 11a8: d539fc2f mrs x15, s3_1_c15_c12_1 + 11ac: d519fc4f msr s3_1_c15_c12_2, x15 + 11b0: d539fc4f mrs x15, s3_1_c15_c12_2 + 11b4: d519fc6f msr s3_1_c15_c12_3, x15 + 11b8: d539fc6f mrs x15, s3_1_c15_c12_3 + 11bc: d519fc8f msr s3_1_c15_c12_4, x15 + 11c0: d539fc8f mrs x15, s3_1_c15_c12_4 + 11c4: d519fcaf msr s3_1_c15_c12_5, x15 + 11c8: d539fcaf mrs x15, s3_1_c15_c12_5 + 11cc: d519fccf msr s3_1_c15_c12_6, x15 + 11d0: d539fccf mrs x15, s3_1_c15_c12_6 + 11d4: d519fcef msr s3_1_c15_c12_7, x15 + 11d8: d539fcef mrs x15, s3_1_c15_c12_7 + 11dc: d519fd0f msr s3_1_c15_c13_0, x15 + 11e0: d539fd0f mrs x15, s3_1_c15_c13_0 + 11e4: d519fd2f msr s3_1_c15_c13_1, x15 + 11e8: d539fd2f mrs x15, s3_1_c15_c13_1 + 11ec: d519fd4f msr s3_1_c15_c13_2, x15 + 11f0: d539fd4f mrs x15, s3_1_c15_c13_2 + 11f4: d519fd6f msr s3_1_c15_c13_3, x15 + 11f8: d539fd6f mrs x15, s3_1_c15_c13_3 + 11fc: d519fd8f msr s3_1_c15_c13_4, x15 + 1200: d539fd8f mrs x15, s3_1_c15_c13_4 + 1204: d519fdaf msr s3_1_c15_c13_5, x15 + 1208: d539fdaf mrs x15, s3_1_c15_c13_5 + 120c: d519fdcf msr s3_1_c15_c13_6, x15 + 1210: d539fdcf mrs x15, s3_1_c15_c13_6 + 1214: d519fdef msr s3_1_c15_c13_7, x15 + 1218: d539fdef mrs x15, s3_1_c15_c13_7 + 121c: d519fe0f msr s3_1_c15_c14_0, x15 + 1220: d539fe0f mrs x15, s3_1_c15_c14_0 + 1224: d519fe2f msr s3_1_c15_c14_1, x15 + 1228: d539fe2f mrs x15, s3_1_c15_c14_1 + 122c: d519fe4f msr s3_1_c15_c14_2, x15 + 1230: d539fe4f mrs x15, s3_1_c15_c14_2 + 1234: d519fe6f msr s3_1_c15_c14_3, x15 + 1238: d539fe6f mrs x15, s3_1_c15_c14_3 + 123c: d519fe8f msr s3_1_c15_c14_4, x15 + 1240: d539fe8f mrs x15, s3_1_c15_c14_4 + 1244: d519feaf msr s3_1_c15_c14_5, x15 + 1248: d539feaf mrs x15, s3_1_c15_c14_5 + 124c: d519fecf msr s3_1_c15_c14_6, x15 + 1250: d539fecf mrs x15, s3_1_c15_c14_6 + 1254: d519feef msr s3_1_c15_c14_7, x15 + 1258: d539feef mrs x15, s3_1_c15_c14_7 + 125c: d519ff0f msr s3_1_c15_c15_0, x15 + 1260: d539ff0f mrs x15, s3_1_c15_c15_0 + 1264: d519ff2f msr s3_1_c15_c15_1, x15 + 1268: d539ff2f mrs x15, s3_1_c15_c15_1 + 126c: d519ff4f msr s3_1_c15_c15_2, x15 + 1270: d539ff4f mrs x15, s3_1_c15_c15_2 + 1274: d519ff6f msr s3_1_c15_c15_3, x15 + 1278: d539ff6f mrs x15, s3_1_c15_c15_3 + 127c: d519ff8f msr s3_1_c15_c15_4, x15 + 1280: d539ff8f mrs x15, s3_1_c15_c15_4 + 1284: d519ffaf msr s3_1_c15_c15_5, x15 + 1288: d539ffaf mrs x15, s3_1_c15_c15_5 + 128c: d519ffcf msr s3_1_c15_c15_6, x15 + 1290: d539ffcf mrs x15, s3_1_c15_c15_6 + 1294: d519ffef msr s3_1_c15_c15_7, x15 + 1298: d539ffef mrs x15, s3_1_c15_c15_7 + 129c: d51ab00f msr s3_2_c11_c0_0, x15 + 12a0: d53ab00f mrs x15, s3_2_c11_c0_0 + 12a4: d51ab02f msr s3_2_c11_c0_1, x15 + 12a8: d53ab02f mrs x15, s3_2_c11_c0_1 + 12ac: d51ab04f msr s3_2_c11_c0_2, x15 + 12b0: d53ab04f mrs x15, s3_2_c11_c0_2 + 12b4: d51ab06f msr s3_2_c11_c0_3, x15 + 12b8: d53ab06f mrs x15, s3_2_c11_c0_3 + 12bc: d51ab08f msr s3_2_c11_c0_4, x15 + 12c0: d53ab08f mrs x15, s3_2_c11_c0_4 + 12c4: d51ab0af msr s3_2_c11_c0_5, x15 + 12c8: d53ab0af mrs x15, s3_2_c11_c0_5 + 12cc: d51ab0cf msr s3_2_c11_c0_6, x15 + 12d0: d53ab0cf mrs x15, s3_2_c11_c0_6 + 12d4: d51ab0ef msr s3_2_c11_c0_7, x15 + 12d8: d53ab0ef mrs x15, s3_2_c11_c0_7 + 12dc: d51ab10f msr s3_2_c11_c1_0, x15 + 12e0: d53ab10f mrs x15, s3_2_c11_c1_0 + 12e4: d51ab12f msr s3_2_c11_c1_1, x15 + 12e8: d53ab12f mrs x15, s3_2_c11_c1_1 + 12ec: d51ab14f msr s3_2_c11_c1_2, x15 + 12f0: d53ab14f mrs x15, s3_2_c11_c1_2 + 12f4: d51ab16f msr s3_2_c11_c1_3, x15 + 12f8: d53ab16f mrs x15, s3_2_c11_c1_3 + 12fc: d51ab18f msr s3_2_c11_c1_4, x15 + 1300: d53ab18f mrs x15, s3_2_c11_c1_4 + 1304: d51ab1af msr s3_2_c11_c1_5, x15 + 1308: d53ab1af mrs x15, s3_2_c11_c1_5 + 130c: d51ab1cf msr s3_2_c11_c1_6, x15 + 1310: d53ab1cf mrs x15, s3_2_c11_c1_6 + 1314: d51ab1ef msr s3_2_c11_c1_7, x15 + 1318: d53ab1ef mrs x15, s3_2_c11_c1_7 + 131c: d51ab20f msr s3_2_c11_c2_0, x15 + 1320: d53ab20f mrs x15, s3_2_c11_c2_0 + 1324: d51ab22f msr s3_2_c11_c2_1, x15 + 1328: d53ab22f mrs x15, s3_2_c11_c2_1 + 132c: d51ab24f msr s3_2_c11_c2_2, x15 + 1330: d53ab24f mrs x15, s3_2_c11_c2_2 + 1334: d51ab26f msr s3_2_c11_c2_3, x15 + 1338: d53ab26f mrs x15, s3_2_c11_c2_3 + 133c: d51ab28f msr s3_2_c11_c2_4, x15 + 1340: d53ab28f mrs x15, s3_2_c11_c2_4 + 1344: d51ab2af msr s3_2_c11_c2_5, x15 + 1348: d53ab2af mrs x15, s3_2_c11_c2_5 + 134c: d51ab2cf msr s3_2_c11_c2_6, x15 + 1350: d53ab2cf mrs x15, s3_2_c11_c2_6 + 1354: d51ab2ef msr s3_2_c11_c2_7, x15 + 1358: d53ab2ef mrs x15, s3_2_c11_c2_7 + 135c: d51ab30f msr s3_2_c11_c3_0, x15 + 1360: d53ab30f mrs x15, s3_2_c11_c3_0 + 1364: d51ab32f msr s3_2_c11_c3_1, x15 + 1368: d53ab32f mrs x15, s3_2_c11_c3_1 + 136c: d51ab34f msr s3_2_c11_c3_2, x15 + 1370: d53ab34f mrs x15, s3_2_c11_c3_2 + 1374: d51ab36f msr s3_2_c11_c3_3, x15 + 1378: d53ab36f mrs x15, s3_2_c11_c3_3 + 137c: d51ab38f msr s3_2_c11_c3_4, x15 + 1380: d53ab38f mrs x15, s3_2_c11_c3_4 + 1384: d51ab3af msr s3_2_c11_c3_5, x15 + 1388: d53ab3af mrs x15, s3_2_c11_c3_5 + 138c: d51ab3cf msr s3_2_c11_c3_6, x15 + 1390: d53ab3cf mrs x15, s3_2_c11_c3_6 + 1394: d51ab3ef msr s3_2_c11_c3_7, x15 + 1398: d53ab3ef mrs x15, s3_2_c11_c3_7 + 139c: d51ab40f msr s3_2_c11_c4_0, x15 + 13a0: d53ab40f mrs x15, s3_2_c11_c4_0 + 13a4: d51ab42f msr s3_2_c11_c4_1, x15 + 13a8: d53ab42f mrs x15, s3_2_c11_c4_1 + 13ac: d51ab44f msr s3_2_c11_c4_2, x15 + 13b0: d53ab44f mrs x15, s3_2_c11_c4_2 + 13b4: d51ab46f msr s3_2_c11_c4_3, x15 + 13b8: d53ab46f mrs x15, s3_2_c11_c4_3 + 13bc: d51ab48f msr s3_2_c11_c4_4, x15 + 13c0: d53ab48f mrs x15, s3_2_c11_c4_4 + 13c4: d51ab4af msr s3_2_c11_c4_5, x15 + 13c8: d53ab4af mrs x15, s3_2_c11_c4_5 + 13cc: d51ab4cf msr s3_2_c11_c4_6, x15 + 13d0: d53ab4cf mrs x15, s3_2_c11_c4_6 + 13d4: d51ab4ef msr s3_2_c11_c4_7, x15 + 13d8: d53ab4ef mrs x15, s3_2_c11_c4_7 + 13dc: d51ab50f msr s3_2_c11_c5_0, x15 + 13e0: d53ab50f mrs x15, s3_2_c11_c5_0 + 13e4: d51ab52f msr s3_2_c11_c5_1, x15 + 13e8: d53ab52f mrs x15, s3_2_c11_c5_1 + 13ec: d51ab54f msr s3_2_c11_c5_2, x15 + 13f0: d53ab54f mrs x15, s3_2_c11_c5_2 + 13f4: d51ab56f msr s3_2_c11_c5_3, x15 + 13f8: d53ab56f mrs x15, s3_2_c11_c5_3 + 13fc: d51ab58f msr s3_2_c11_c5_4, x15 + 1400: d53ab58f mrs x15, s3_2_c11_c5_4 + 1404: d51ab5af msr s3_2_c11_c5_5, x15 + 1408: d53ab5af mrs x15, s3_2_c11_c5_5 + 140c: d51ab5cf msr s3_2_c11_c5_6, x15 + 1410: d53ab5cf mrs x15, s3_2_c11_c5_6 + 1414: d51ab5ef msr s3_2_c11_c5_7, x15 + 1418: d53ab5ef mrs x15, s3_2_c11_c5_7 + 141c: d51ab60f msr s3_2_c11_c6_0, x15 + 1420: d53ab60f mrs x15, s3_2_c11_c6_0 + 1424: d51ab62f msr s3_2_c11_c6_1, x15 + 1428: d53ab62f mrs x15, s3_2_c11_c6_1 + 142c: d51ab64f msr s3_2_c11_c6_2, x15 + 1430: d53ab64f mrs x15, s3_2_c11_c6_2 + 1434: d51ab66f msr s3_2_c11_c6_3, x15 + 1438: d53ab66f mrs x15, s3_2_c11_c6_3 + 143c: d51ab68f msr s3_2_c11_c6_4, x15 + 1440: d53ab68f mrs x15, s3_2_c11_c6_4 + 1444: d51ab6af msr s3_2_c11_c6_5, x15 + 1448: d53ab6af mrs x15, s3_2_c11_c6_5 + 144c: d51ab6cf msr s3_2_c11_c6_6, x15 + 1450: d53ab6cf mrs x15, s3_2_c11_c6_6 + 1454: d51ab6ef msr s3_2_c11_c6_7, x15 + 1458: d53ab6ef mrs x15, s3_2_c11_c6_7 + 145c: d51ab70f msr s3_2_c11_c7_0, x15 + 1460: d53ab70f mrs x15, s3_2_c11_c7_0 + 1464: d51ab72f msr s3_2_c11_c7_1, x15 + 1468: d53ab72f mrs x15, s3_2_c11_c7_1 + 146c: d51ab74f msr s3_2_c11_c7_2, x15 + 1470: d53ab74f mrs x15, s3_2_c11_c7_2 + 1474: d51ab76f msr s3_2_c11_c7_3, x15 + 1478: d53ab76f mrs x15, s3_2_c11_c7_3 + 147c: d51ab78f msr s3_2_c11_c7_4, x15 + 1480: d53ab78f mrs x15, s3_2_c11_c7_4 + 1484: d51ab7af msr s3_2_c11_c7_5, x15 + 1488: d53ab7af mrs x15, s3_2_c11_c7_5 + 148c: d51ab7cf msr s3_2_c11_c7_6, x15 + 1490: d53ab7cf mrs x15, s3_2_c11_c7_6 + 1494: d51ab7ef msr s3_2_c11_c7_7, x15 + 1498: d53ab7ef mrs x15, s3_2_c11_c7_7 + 149c: d51ab80f msr s3_2_c11_c8_0, x15 + 14a0: d53ab80f mrs x15, s3_2_c11_c8_0 + 14a4: d51ab82f msr s3_2_c11_c8_1, x15 + 14a8: d53ab82f mrs x15, s3_2_c11_c8_1 + 14ac: d51ab84f msr s3_2_c11_c8_2, x15 + 14b0: d53ab84f mrs x15, s3_2_c11_c8_2 + 14b4: d51ab86f msr s3_2_c11_c8_3, x15 + 14b8: d53ab86f mrs x15, s3_2_c11_c8_3 + 14bc: d51ab88f msr s3_2_c11_c8_4, x15 + 14c0: d53ab88f mrs x15, s3_2_c11_c8_4 + 14c4: d51ab8af msr s3_2_c11_c8_5, x15 + 14c8: d53ab8af mrs x15, s3_2_c11_c8_5 + 14cc: d51ab8cf msr s3_2_c11_c8_6, x15 + 14d0: d53ab8cf mrs x15, s3_2_c11_c8_6 + 14d4: d51ab8ef msr s3_2_c11_c8_7, x15 + 14d8: d53ab8ef mrs x15, s3_2_c11_c8_7 + 14dc: d51ab90f msr s3_2_c11_c9_0, x15 + 14e0: d53ab90f mrs x15, s3_2_c11_c9_0 + 14e4: d51ab92f msr s3_2_c11_c9_1, x15 + 14e8: d53ab92f mrs x15, s3_2_c11_c9_1 + 14ec: d51ab94f msr s3_2_c11_c9_2, x15 + 14f0: d53ab94f mrs x15, s3_2_c11_c9_2 + 14f4: d51ab96f msr s3_2_c11_c9_3, x15 + 14f8: d53ab96f mrs x15, s3_2_c11_c9_3 + 14fc: d51ab98f msr s3_2_c11_c9_4, x15 + 1500: d53ab98f mrs x15, s3_2_c11_c9_4 + 1504: d51ab9af msr s3_2_c11_c9_5, x15 + 1508: d53ab9af mrs x15, s3_2_c11_c9_5 + 150c: d51ab9cf msr s3_2_c11_c9_6, x15 + 1510: d53ab9cf mrs x15, s3_2_c11_c9_6 + 1514: d51ab9ef msr s3_2_c11_c9_7, x15 + 1518: d53ab9ef mrs x15, s3_2_c11_c9_7 + 151c: d51aba0f msr s3_2_c11_c10_0, x15 + 1520: d53aba0f mrs x15, s3_2_c11_c10_0 + 1524: d51aba2f msr s3_2_c11_c10_1, x15 + 1528: d53aba2f mrs x15, s3_2_c11_c10_1 + 152c: d51aba4f msr s3_2_c11_c10_2, x15 + 1530: d53aba4f mrs x15, s3_2_c11_c10_2 + 1534: d51aba6f msr s3_2_c11_c10_3, x15 + 1538: d53aba6f mrs x15, s3_2_c11_c10_3 + 153c: d51aba8f msr s3_2_c11_c10_4, x15 + 1540: d53aba8f mrs x15, s3_2_c11_c10_4 + 1544: d51abaaf msr s3_2_c11_c10_5, x15 + 1548: d53abaaf mrs x15, s3_2_c11_c10_5 + 154c: d51abacf msr s3_2_c11_c10_6, x15 + 1550: d53abacf mrs x15, s3_2_c11_c10_6 + 1554: d51abaef msr s3_2_c11_c10_7, x15 + 1558: d53abaef mrs x15, s3_2_c11_c10_7 + 155c: d51abb0f msr s3_2_c11_c11_0, x15 + 1560: d53abb0f mrs x15, s3_2_c11_c11_0 + 1564: d51abb2f msr s3_2_c11_c11_1, x15 + 1568: d53abb2f mrs x15, s3_2_c11_c11_1 + 156c: d51abb4f msr s3_2_c11_c11_2, x15 + 1570: d53abb4f mrs x15, s3_2_c11_c11_2 + 1574: d51abb6f msr s3_2_c11_c11_3, x15 + 1578: d53abb6f mrs x15, s3_2_c11_c11_3 + 157c: d51abb8f msr s3_2_c11_c11_4, x15 + 1580: d53abb8f mrs x15, s3_2_c11_c11_4 + 1584: d51abbaf msr s3_2_c11_c11_5, x15 + 1588: d53abbaf mrs x15, s3_2_c11_c11_5 + 158c: d51abbcf msr s3_2_c11_c11_6, x15 + 1590: d53abbcf mrs x15, s3_2_c11_c11_6 + 1594: d51abbef msr s3_2_c11_c11_7, x15 + 1598: d53abbef mrs x15, s3_2_c11_c11_7 + 159c: d51abc0f msr s3_2_c11_c12_0, x15 + 15a0: d53abc0f mrs x15, s3_2_c11_c12_0 + 15a4: d51abc2f msr s3_2_c11_c12_1, x15 + 15a8: d53abc2f mrs x15, s3_2_c11_c12_1 + 15ac: d51abc4f msr s3_2_c11_c12_2, x15 + 15b0: d53abc4f mrs x15, s3_2_c11_c12_2 + 15b4: d51abc6f msr s3_2_c11_c12_3, x15 + 15b8: d53abc6f mrs x15, s3_2_c11_c12_3 + 15bc: d51abc8f msr s3_2_c11_c12_4, x15 + 15c0: d53abc8f mrs x15, s3_2_c11_c12_4 + 15c4: d51abcaf msr s3_2_c11_c12_5, x15 + 15c8: d53abcaf mrs x15, s3_2_c11_c12_5 + 15cc: d51abccf msr s3_2_c11_c12_6, x15 + 15d0: d53abccf mrs x15, s3_2_c11_c12_6 + 15d4: d51abcef msr s3_2_c11_c12_7, x15 + 15d8: d53abcef mrs x15, s3_2_c11_c12_7 + 15dc: d51abd0f msr s3_2_c11_c13_0, x15 + 15e0: d53abd0f mrs x15, s3_2_c11_c13_0 + 15e4: d51abd2f msr s3_2_c11_c13_1, x15 + 15e8: d53abd2f mrs x15, s3_2_c11_c13_1 + 15ec: d51abd4f msr s3_2_c11_c13_2, x15 + 15f0: d53abd4f mrs x15, s3_2_c11_c13_2 + 15f4: d51abd6f msr s3_2_c11_c13_3, x15 + 15f8: d53abd6f mrs x15, s3_2_c11_c13_3 + 15fc: d51abd8f msr s3_2_c11_c13_4, x15 + 1600: d53abd8f mrs x15, s3_2_c11_c13_4 + 1604: d51abdaf msr s3_2_c11_c13_5, x15 + 1608: d53abdaf mrs x15, s3_2_c11_c13_5 + 160c: d51abdcf msr s3_2_c11_c13_6, x15 + 1610: d53abdcf mrs x15, s3_2_c11_c13_6 + 1614: d51abdef msr s3_2_c11_c13_7, x15 + 1618: d53abdef mrs x15, s3_2_c11_c13_7 + 161c: d51abe0f msr s3_2_c11_c14_0, x15 + 1620: d53abe0f mrs x15, s3_2_c11_c14_0 + 1624: d51abe2f msr s3_2_c11_c14_1, x15 + 1628: d53abe2f mrs x15, s3_2_c11_c14_1 + 162c: d51abe4f msr s3_2_c11_c14_2, x15 + 1630: d53abe4f mrs x15, s3_2_c11_c14_2 + 1634: d51abe6f msr s3_2_c11_c14_3, x15 + 1638: d53abe6f mrs x15, s3_2_c11_c14_3 + 163c: d51abe8f msr s3_2_c11_c14_4, x15 + 1640: d53abe8f mrs x15, s3_2_c11_c14_4 + 1644: d51abeaf msr s3_2_c11_c14_5, x15 + 1648: d53abeaf mrs x15, s3_2_c11_c14_5 + 164c: d51abecf msr s3_2_c11_c14_6, x15 + 1650: d53abecf mrs x15, s3_2_c11_c14_6 + 1654: d51abeef msr s3_2_c11_c14_7, x15 + 1658: d53abeef mrs x15, s3_2_c11_c14_7 + 165c: d51abf0f msr s3_2_c11_c15_0, x15 + 1660: d53abf0f mrs x15, s3_2_c11_c15_0 + 1664: d51abf2f msr s3_2_c11_c15_1, x15 + 1668: d53abf2f mrs x15, s3_2_c11_c15_1 + 166c: d51abf4f msr s3_2_c11_c15_2, x15 + 1670: d53abf4f mrs x15, s3_2_c11_c15_2 + 1674: d51abf6f msr s3_2_c11_c15_3, x15 + 1678: d53abf6f mrs x15, s3_2_c11_c15_3 + 167c: d51abf8f msr s3_2_c11_c15_4, x15 + 1680: d53abf8f mrs x15, s3_2_c11_c15_4 + 1684: d51abfaf msr s3_2_c11_c15_5, x15 + 1688: d53abfaf mrs x15, s3_2_c11_c15_5 + 168c: d51abfcf msr s3_2_c11_c15_6, x15 + 1690: d53abfcf mrs x15, s3_2_c11_c15_6 + 1694: d51abfef msr s3_2_c11_c15_7, x15 + 1698: d53abfef mrs x15, s3_2_c11_c15_7 + 169c: d51af00f msr s3_2_c15_c0_0, x15 + 16a0: d53af00f mrs x15, s3_2_c15_c0_0 + 16a4: d51af02f msr s3_2_c15_c0_1, x15 + 16a8: d53af02f mrs x15, s3_2_c15_c0_1 + 16ac: d51af04f msr s3_2_c15_c0_2, x15 + 16b0: d53af04f mrs x15, s3_2_c15_c0_2 + 16b4: d51af06f msr s3_2_c15_c0_3, x15 + 16b8: d53af06f mrs x15, s3_2_c15_c0_3 + 16bc: d51af08f msr s3_2_c15_c0_4, x15 + 16c0: d53af08f mrs x15, s3_2_c15_c0_4 + 16c4: d51af0af msr s3_2_c15_c0_5, x15 + 16c8: d53af0af mrs x15, s3_2_c15_c0_5 + 16cc: d51af0cf msr s3_2_c15_c0_6, x15 + 16d0: d53af0cf mrs x15, s3_2_c15_c0_6 + 16d4: d51af0ef msr s3_2_c15_c0_7, x15 + 16d8: d53af0ef mrs x15, s3_2_c15_c0_7 + 16dc: d51af10f msr s3_2_c15_c1_0, x15 + 16e0: d53af10f mrs x15, s3_2_c15_c1_0 + 16e4: d51af12f msr s3_2_c15_c1_1, x15 + 16e8: d53af12f mrs x15, s3_2_c15_c1_1 + 16ec: d51af14f msr s3_2_c15_c1_2, x15 + 16f0: d53af14f mrs x15, s3_2_c15_c1_2 + 16f4: d51af16f msr s3_2_c15_c1_3, x15 + 16f8: d53af16f mrs x15, s3_2_c15_c1_3 + 16fc: d51af18f msr s3_2_c15_c1_4, x15 + 1700: d53af18f mrs x15, s3_2_c15_c1_4 + 1704: d51af1af msr s3_2_c15_c1_5, x15 + 1708: d53af1af mrs x15, s3_2_c15_c1_5 + 170c: d51af1cf msr s3_2_c15_c1_6, x15 + 1710: d53af1cf mrs x15, s3_2_c15_c1_6 + 1714: d51af1ef msr s3_2_c15_c1_7, x15 + 1718: d53af1ef mrs x15, s3_2_c15_c1_7 + 171c: d51af20f msr s3_2_c15_c2_0, x15 + 1720: d53af20f mrs x15, s3_2_c15_c2_0 + 1724: d51af22f msr s3_2_c15_c2_1, x15 + 1728: d53af22f mrs x15, s3_2_c15_c2_1 + 172c: d51af24f msr s3_2_c15_c2_2, x15 + 1730: d53af24f mrs x15, s3_2_c15_c2_2 + 1734: d51af26f msr s3_2_c15_c2_3, x15 + 1738: d53af26f mrs x15, s3_2_c15_c2_3 + 173c: d51af28f msr s3_2_c15_c2_4, x15 + 1740: d53af28f mrs x15, s3_2_c15_c2_4 + 1744: d51af2af msr s3_2_c15_c2_5, x15 + 1748: d53af2af mrs x15, s3_2_c15_c2_5 + 174c: d51af2cf msr s3_2_c15_c2_6, x15 + 1750: d53af2cf mrs x15, s3_2_c15_c2_6 + 1754: d51af2ef msr s3_2_c15_c2_7, x15 + 1758: d53af2ef mrs x15, s3_2_c15_c2_7 + 175c: d51af30f msr s3_2_c15_c3_0, x15 + 1760: d53af30f mrs x15, s3_2_c15_c3_0 + 1764: d51af32f msr s3_2_c15_c3_1, x15 + 1768: d53af32f mrs x15, s3_2_c15_c3_1 + 176c: d51af34f msr s3_2_c15_c3_2, x15 + 1770: d53af34f mrs x15, s3_2_c15_c3_2 + 1774: d51af36f msr s3_2_c15_c3_3, x15 + 1778: d53af36f mrs x15, s3_2_c15_c3_3 + 177c: d51af38f msr s3_2_c15_c3_4, x15 + 1780: d53af38f mrs x15, s3_2_c15_c3_4 + 1784: d51af3af msr s3_2_c15_c3_5, x15 + 1788: d53af3af mrs x15, s3_2_c15_c3_5 + 178c: d51af3cf msr s3_2_c15_c3_6, x15 + 1790: d53af3cf mrs x15, s3_2_c15_c3_6 + 1794: d51af3ef msr s3_2_c15_c3_7, x15 + 1798: d53af3ef mrs x15, s3_2_c15_c3_7 + 179c: d51af40f msr s3_2_c15_c4_0, x15 + 17a0: d53af40f mrs x15, s3_2_c15_c4_0 + 17a4: d51af42f msr s3_2_c15_c4_1, x15 + 17a8: d53af42f mrs x15, s3_2_c15_c4_1 + 17ac: d51af44f msr s3_2_c15_c4_2, x15 + 17b0: d53af44f mrs x15, s3_2_c15_c4_2 + 17b4: d51af46f msr s3_2_c15_c4_3, x15 + 17b8: d53af46f mrs x15, s3_2_c15_c4_3 + 17bc: d51af48f msr s3_2_c15_c4_4, x15 + 17c0: d53af48f mrs x15, s3_2_c15_c4_4 + 17c4: d51af4af msr s3_2_c15_c4_5, x15 + 17c8: d53af4af mrs x15, s3_2_c15_c4_5 + 17cc: d51af4cf msr s3_2_c15_c4_6, x15 + 17d0: d53af4cf mrs x15, s3_2_c15_c4_6 + 17d4: d51af4ef msr s3_2_c15_c4_7, x15 + 17d8: d53af4ef mrs x15, s3_2_c15_c4_7 + 17dc: d51af50f msr s3_2_c15_c5_0, x15 + 17e0: d53af50f mrs x15, s3_2_c15_c5_0 + 17e4: d51af52f msr s3_2_c15_c5_1, x15 + 17e8: d53af52f mrs x15, s3_2_c15_c5_1 + 17ec: d51af54f msr s3_2_c15_c5_2, x15 + 17f0: d53af54f mrs x15, s3_2_c15_c5_2 + 17f4: d51af56f msr s3_2_c15_c5_3, x15 + 17f8: d53af56f mrs x15, s3_2_c15_c5_3 + 17fc: d51af58f msr s3_2_c15_c5_4, x15 + 1800: d53af58f mrs x15, s3_2_c15_c5_4 + 1804: d51af5af msr s3_2_c15_c5_5, x15 + 1808: d53af5af mrs x15, s3_2_c15_c5_5 + 180c: d51af5cf msr s3_2_c15_c5_6, x15 + 1810: d53af5cf mrs x15, s3_2_c15_c5_6 + 1814: d51af5ef msr s3_2_c15_c5_7, x15 + 1818: d53af5ef mrs x15, s3_2_c15_c5_7 + 181c: d51af60f msr s3_2_c15_c6_0, x15 + 1820: d53af60f mrs x15, s3_2_c15_c6_0 + 1824: d51af62f msr s3_2_c15_c6_1, x15 + 1828: d53af62f mrs x15, s3_2_c15_c6_1 + 182c: d51af64f msr s3_2_c15_c6_2, x15 + 1830: d53af64f mrs x15, s3_2_c15_c6_2 + 1834: d51af66f msr s3_2_c15_c6_3, x15 + 1838: d53af66f mrs x15, s3_2_c15_c6_3 + 183c: d51af68f msr s3_2_c15_c6_4, x15 + 1840: d53af68f mrs x15, s3_2_c15_c6_4 + 1844: d51af6af msr s3_2_c15_c6_5, x15 + 1848: d53af6af mrs x15, s3_2_c15_c6_5 + 184c: d51af6cf msr s3_2_c15_c6_6, x15 + 1850: d53af6cf mrs x15, s3_2_c15_c6_6 + 1854: d51af6ef msr s3_2_c15_c6_7, x15 + 1858: d53af6ef mrs x15, s3_2_c15_c6_7 + 185c: d51af70f msr s3_2_c15_c7_0, x15 + 1860: d53af70f mrs x15, s3_2_c15_c7_0 + 1864: d51af72f msr s3_2_c15_c7_1, x15 + 1868: d53af72f mrs x15, s3_2_c15_c7_1 + 186c: d51af74f msr s3_2_c15_c7_2, x15 + 1870: d53af74f mrs x15, s3_2_c15_c7_2 + 1874: d51af76f msr s3_2_c15_c7_3, x15 + 1878: d53af76f mrs x15, s3_2_c15_c7_3 + 187c: d51af78f msr s3_2_c15_c7_4, x15 + 1880: d53af78f mrs x15, s3_2_c15_c7_4 + 1884: d51af7af msr s3_2_c15_c7_5, x15 + 1888: d53af7af mrs x15, s3_2_c15_c7_5 + 188c: d51af7cf msr s3_2_c15_c7_6, x15 + 1890: d53af7cf mrs x15, s3_2_c15_c7_6 + 1894: d51af7ef msr s3_2_c15_c7_7, x15 + 1898: d53af7ef mrs x15, s3_2_c15_c7_7 + 189c: d51af80f msr s3_2_c15_c8_0, x15 + 18a0: d53af80f mrs x15, s3_2_c15_c8_0 + 18a4: d51af82f msr s3_2_c15_c8_1, x15 + 18a8: d53af82f mrs x15, s3_2_c15_c8_1 + 18ac: d51af84f msr s3_2_c15_c8_2, x15 + 18b0: d53af84f mrs x15, s3_2_c15_c8_2 + 18b4: d51af86f msr s3_2_c15_c8_3, x15 + 18b8: d53af86f mrs x15, s3_2_c15_c8_3 + 18bc: d51af88f msr s3_2_c15_c8_4, x15 + 18c0: d53af88f mrs x15, s3_2_c15_c8_4 + 18c4: d51af8af msr s3_2_c15_c8_5, x15 + 18c8: d53af8af mrs x15, s3_2_c15_c8_5 + 18cc: d51af8cf msr s3_2_c15_c8_6, x15 + 18d0: d53af8cf mrs x15, s3_2_c15_c8_6 + 18d4: d51af8ef msr s3_2_c15_c8_7, x15 + 18d8: d53af8ef mrs x15, s3_2_c15_c8_7 + 18dc: d51af90f msr s3_2_c15_c9_0, x15 + 18e0: d53af90f mrs x15, s3_2_c15_c9_0 + 18e4: d51af92f msr s3_2_c15_c9_1, x15 + 18e8: d53af92f mrs x15, s3_2_c15_c9_1 + 18ec: d51af94f msr s3_2_c15_c9_2, x15 + 18f0: d53af94f mrs x15, s3_2_c15_c9_2 + 18f4: d51af96f msr s3_2_c15_c9_3, x15 + 18f8: d53af96f mrs x15, s3_2_c15_c9_3 + 18fc: d51af98f msr s3_2_c15_c9_4, x15 + 1900: d53af98f mrs x15, s3_2_c15_c9_4 + 1904: d51af9af msr s3_2_c15_c9_5, x15 + 1908: d53af9af mrs x15, s3_2_c15_c9_5 + 190c: d51af9cf msr s3_2_c15_c9_6, x15 + 1910: d53af9cf mrs x15, s3_2_c15_c9_6 + 1914: d51af9ef msr s3_2_c15_c9_7, x15 + 1918: d53af9ef mrs x15, s3_2_c15_c9_7 + 191c: d51afa0f msr s3_2_c15_c10_0, x15 + 1920: d53afa0f mrs x15, s3_2_c15_c10_0 + 1924: d51afa2f msr s3_2_c15_c10_1, x15 + 1928: d53afa2f mrs x15, s3_2_c15_c10_1 + 192c: d51afa4f msr s3_2_c15_c10_2, x15 + 1930: d53afa4f mrs x15, s3_2_c15_c10_2 + 1934: d51afa6f msr s3_2_c15_c10_3, x15 + 1938: d53afa6f mrs x15, s3_2_c15_c10_3 + 193c: d51afa8f msr s3_2_c15_c10_4, x15 + 1940: d53afa8f mrs x15, s3_2_c15_c10_4 + 1944: d51afaaf msr s3_2_c15_c10_5, x15 + 1948: d53afaaf mrs x15, s3_2_c15_c10_5 + 194c: d51afacf msr s3_2_c15_c10_6, x15 + 1950: d53afacf mrs x15, s3_2_c15_c10_6 + 1954: d51afaef msr s3_2_c15_c10_7, x15 + 1958: d53afaef mrs x15, s3_2_c15_c10_7 + 195c: d51afb0f msr s3_2_c15_c11_0, x15 + 1960: d53afb0f mrs x15, s3_2_c15_c11_0 + 1964: d51afb2f msr s3_2_c15_c11_1, x15 + 1968: d53afb2f mrs x15, s3_2_c15_c11_1 + 196c: d51afb4f msr s3_2_c15_c11_2, x15 + 1970: d53afb4f mrs x15, s3_2_c15_c11_2 + 1974: d51afb6f msr s3_2_c15_c11_3, x15 + 1978: d53afb6f mrs x15, s3_2_c15_c11_3 + 197c: d51afb8f msr s3_2_c15_c11_4, x15 + 1980: d53afb8f mrs x15, s3_2_c15_c11_4 + 1984: d51afbaf msr s3_2_c15_c11_5, x15 + 1988: d53afbaf mrs x15, s3_2_c15_c11_5 + 198c: d51afbcf msr s3_2_c15_c11_6, x15 + 1990: d53afbcf mrs x15, s3_2_c15_c11_6 + 1994: d51afbef msr s3_2_c15_c11_7, x15 + 1998: d53afbef mrs x15, s3_2_c15_c11_7 + 199c: d51afc0f msr s3_2_c15_c12_0, x15 + 19a0: d53afc0f mrs x15, s3_2_c15_c12_0 + 19a4: d51afc2f msr s3_2_c15_c12_1, x15 + 19a8: d53afc2f mrs x15, s3_2_c15_c12_1 + 19ac: d51afc4f msr s3_2_c15_c12_2, x15 + 19b0: d53afc4f mrs x15, s3_2_c15_c12_2 + 19b4: d51afc6f msr s3_2_c15_c12_3, x15 + 19b8: d53afc6f mrs x15, s3_2_c15_c12_3 + 19bc: d51afc8f msr s3_2_c15_c12_4, x15 + 19c0: d53afc8f mrs x15, s3_2_c15_c12_4 + 19c4: d51afcaf msr s3_2_c15_c12_5, x15 + 19c8: d53afcaf mrs x15, s3_2_c15_c12_5 + 19cc: d51afccf msr s3_2_c15_c12_6, x15 + 19d0: d53afccf mrs x15, s3_2_c15_c12_6 + 19d4: d51afcef msr s3_2_c15_c12_7, x15 + 19d8: d53afcef mrs x15, s3_2_c15_c12_7 + 19dc: d51afd0f msr s3_2_c15_c13_0, x15 + 19e0: d53afd0f mrs x15, s3_2_c15_c13_0 + 19e4: d51afd2f msr s3_2_c15_c13_1, x15 + 19e8: d53afd2f mrs x15, s3_2_c15_c13_1 + 19ec: d51afd4f msr s3_2_c15_c13_2, x15 + 19f0: d53afd4f mrs x15, s3_2_c15_c13_2 + 19f4: d51afd6f msr s3_2_c15_c13_3, x15 + 19f8: d53afd6f mrs x15, s3_2_c15_c13_3 + 19fc: d51afd8f msr s3_2_c15_c13_4, x15 + 1a00: d53afd8f mrs x15, s3_2_c15_c13_4 + 1a04: d51afdaf msr s3_2_c15_c13_5, x15 + 1a08: d53afdaf mrs x15, s3_2_c15_c13_5 + 1a0c: d51afdcf msr s3_2_c15_c13_6, x15 + 1a10: d53afdcf mrs x15, s3_2_c15_c13_6 + 1a14: d51afdef msr s3_2_c15_c13_7, x15 + 1a18: d53afdef mrs x15, s3_2_c15_c13_7 + 1a1c: d51afe0f msr s3_2_c15_c14_0, x15 + 1a20: d53afe0f mrs x15, s3_2_c15_c14_0 + 1a24: d51afe2f msr s3_2_c15_c14_1, x15 + 1a28: d53afe2f mrs x15, s3_2_c15_c14_1 + 1a2c: d51afe4f msr s3_2_c15_c14_2, x15 + 1a30: d53afe4f mrs x15, s3_2_c15_c14_2 + 1a34: d51afe6f msr s3_2_c15_c14_3, x15 + 1a38: d53afe6f mrs x15, s3_2_c15_c14_3 + 1a3c: d51afe8f msr s3_2_c15_c14_4, x15 + 1a40: d53afe8f mrs x15, s3_2_c15_c14_4 + 1a44: d51afeaf msr s3_2_c15_c14_5, x15 + 1a48: d53afeaf mrs x15, s3_2_c15_c14_5 + 1a4c: d51afecf msr s3_2_c15_c14_6, x15 + 1a50: d53afecf mrs x15, s3_2_c15_c14_6 + 1a54: d51afeef msr s3_2_c15_c14_7, x15 + 1a58: d53afeef mrs x15, s3_2_c15_c14_7 + 1a5c: d51aff0f msr s3_2_c15_c15_0, x15 + 1a60: d53aff0f mrs x15, s3_2_c15_c15_0 + 1a64: d51aff2f msr s3_2_c15_c15_1, x15 + 1a68: d53aff2f mrs x15, s3_2_c15_c15_1 + 1a6c: d51aff4f msr s3_2_c15_c15_2, x15 + 1a70: d53aff4f mrs x15, s3_2_c15_c15_2 + 1a74: d51aff6f msr s3_2_c15_c15_3, x15 + 1a78: d53aff6f mrs x15, s3_2_c15_c15_3 + 1a7c: d51aff8f msr s3_2_c15_c15_4, x15 + 1a80: d53aff8f mrs x15, s3_2_c15_c15_4 + 1a84: d51affaf msr s3_2_c15_c15_5, x15 + 1a88: d53affaf mrs x15, s3_2_c15_c15_5 + 1a8c: d51affcf msr s3_2_c15_c15_6, x15 + 1a90: d53affcf mrs x15, s3_2_c15_c15_6 + 1a94: d51affef msr s3_2_c15_c15_7, x15 + 1a98: d53affef mrs x15, s3_2_c15_c15_7 + 1a9c: d51bb00f msr s3_3_c11_c0_0, x15 + 1aa0: d53bb00f mrs x15, s3_3_c11_c0_0 + 1aa4: d51bb02f msr s3_3_c11_c0_1, x15 + 1aa8: d53bb02f mrs x15, s3_3_c11_c0_1 + 1aac: d51bb04f msr s3_3_c11_c0_2, x15 + 1ab0: d53bb04f mrs x15, s3_3_c11_c0_2 + 1ab4: d51bb06f msr s3_3_c11_c0_3, x15 + 1ab8: d53bb06f mrs x15, s3_3_c11_c0_3 + 1abc: d51bb08f msr s3_3_c11_c0_4, x15 + 1ac0: d53bb08f mrs x15, s3_3_c11_c0_4 + 1ac4: d51bb0af msr s3_3_c11_c0_5, x15 + 1ac8: d53bb0af mrs x15, s3_3_c11_c0_5 + 1acc: d51bb0cf msr s3_3_c11_c0_6, x15 + 1ad0: d53bb0cf mrs x15, s3_3_c11_c0_6 + 1ad4: d51bb0ef msr s3_3_c11_c0_7, x15 + 1ad8: d53bb0ef mrs x15, s3_3_c11_c0_7 + 1adc: d51bb10f msr s3_3_c11_c1_0, x15 + 1ae0: d53bb10f mrs x15, s3_3_c11_c1_0 + 1ae4: d51bb12f msr s3_3_c11_c1_1, x15 + 1ae8: d53bb12f mrs x15, s3_3_c11_c1_1 + 1aec: d51bb14f msr s3_3_c11_c1_2, x15 + 1af0: d53bb14f mrs x15, s3_3_c11_c1_2 + 1af4: d51bb16f msr s3_3_c11_c1_3, x15 + 1af8: d53bb16f mrs x15, s3_3_c11_c1_3 + 1afc: d51bb18f msr s3_3_c11_c1_4, x15 + 1b00: d53bb18f mrs x15, s3_3_c11_c1_4 + 1b04: d51bb1af msr s3_3_c11_c1_5, x15 + 1b08: d53bb1af mrs x15, s3_3_c11_c1_5 + 1b0c: d51bb1cf msr s3_3_c11_c1_6, x15 + 1b10: d53bb1cf mrs x15, s3_3_c11_c1_6 + 1b14: d51bb1ef msr s3_3_c11_c1_7, x15 + 1b18: d53bb1ef mrs x15, s3_3_c11_c1_7 + 1b1c: d51bb20f msr s3_3_c11_c2_0, x15 + 1b20: d53bb20f mrs x15, s3_3_c11_c2_0 + 1b24: d51bb22f msr s3_3_c11_c2_1, x15 + 1b28: d53bb22f mrs x15, s3_3_c11_c2_1 + 1b2c: d51bb24f msr s3_3_c11_c2_2, x15 + 1b30: d53bb24f mrs x15, s3_3_c11_c2_2 + 1b34: d51bb26f msr s3_3_c11_c2_3, x15 + 1b38: d53bb26f mrs x15, s3_3_c11_c2_3 + 1b3c: d51bb28f msr s3_3_c11_c2_4, x15 + 1b40: d53bb28f mrs x15, s3_3_c11_c2_4 + 1b44: d51bb2af msr s3_3_c11_c2_5, x15 + 1b48: d53bb2af mrs x15, s3_3_c11_c2_5 + 1b4c: d51bb2cf msr s3_3_c11_c2_6, x15 + 1b50: d53bb2cf mrs x15, s3_3_c11_c2_6 + 1b54: d51bb2ef msr s3_3_c11_c2_7, x15 + 1b58: d53bb2ef mrs x15, s3_3_c11_c2_7 + 1b5c: d51bb30f msr s3_3_c11_c3_0, x15 + 1b60: d53bb30f mrs x15, s3_3_c11_c3_0 + 1b64: d51bb32f msr s3_3_c11_c3_1, x15 + 1b68: d53bb32f mrs x15, s3_3_c11_c3_1 + 1b6c: d51bb34f msr s3_3_c11_c3_2, x15 + 1b70: d53bb34f mrs x15, s3_3_c11_c3_2 + 1b74: d51bb36f msr s3_3_c11_c3_3, x15 + 1b78: d53bb36f mrs x15, s3_3_c11_c3_3 + 1b7c: d51bb38f msr s3_3_c11_c3_4, x15 + 1b80: d53bb38f mrs x15, s3_3_c11_c3_4 + 1b84: d51bb3af msr s3_3_c11_c3_5, x15 + 1b88: d53bb3af mrs x15, s3_3_c11_c3_5 + 1b8c: d51bb3cf msr s3_3_c11_c3_6, x15 + 1b90: d53bb3cf mrs x15, s3_3_c11_c3_6 + 1b94: d51bb3ef msr s3_3_c11_c3_7, x15 + 1b98: d53bb3ef mrs x15, s3_3_c11_c3_7 + 1b9c: d51bb40f msr s3_3_c11_c4_0, x15 + 1ba0: d53bb40f mrs x15, s3_3_c11_c4_0 + 1ba4: d51bb42f msr s3_3_c11_c4_1, x15 + 1ba8: d53bb42f mrs x15, s3_3_c11_c4_1 + 1bac: d51bb44f msr s3_3_c11_c4_2, x15 + 1bb0: d53bb44f mrs x15, s3_3_c11_c4_2 + 1bb4: d51bb46f msr s3_3_c11_c4_3, x15 + 1bb8: d53bb46f mrs x15, s3_3_c11_c4_3 + 1bbc: d51bb48f msr s3_3_c11_c4_4, x15 + 1bc0: d53bb48f mrs x15, s3_3_c11_c4_4 + 1bc4: d51bb4af msr s3_3_c11_c4_5, x15 + 1bc8: d53bb4af mrs x15, s3_3_c11_c4_5 + 1bcc: d51bb4cf msr s3_3_c11_c4_6, x15 + 1bd0: d53bb4cf mrs x15, s3_3_c11_c4_6 + 1bd4: d51bb4ef msr s3_3_c11_c4_7, x15 + 1bd8: d53bb4ef mrs x15, s3_3_c11_c4_7 + 1bdc: d51bb50f msr s3_3_c11_c5_0, x15 + 1be0: d53bb50f mrs x15, s3_3_c11_c5_0 + 1be4: d51bb52f msr s3_3_c11_c5_1, x15 + 1be8: d53bb52f mrs x15, s3_3_c11_c5_1 + 1bec: d51bb54f msr s3_3_c11_c5_2, x15 + 1bf0: d53bb54f mrs x15, s3_3_c11_c5_2 + 1bf4: d51bb56f msr s3_3_c11_c5_3, x15 + 1bf8: d53bb56f mrs x15, s3_3_c11_c5_3 + 1bfc: d51bb58f msr s3_3_c11_c5_4, x15 + 1c00: d53bb58f mrs x15, s3_3_c11_c5_4 + 1c04: d51bb5af msr s3_3_c11_c5_5, x15 + 1c08: d53bb5af mrs x15, s3_3_c11_c5_5 + 1c0c: d51bb5cf msr s3_3_c11_c5_6, x15 + 1c10: d53bb5cf mrs x15, s3_3_c11_c5_6 + 1c14: d51bb5ef msr s3_3_c11_c5_7, x15 + 1c18: d53bb5ef mrs x15, s3_3_c11_c5_7 + 1c1c: d51bb60f msr s3_3_c11_c6_0, x15 + 1c20: d53bb60f mrs x15, s3_3_c11_c6_0 + 1c24: d51bb62f msr s3_3_c11_c6_1, x15 + 1c28: d53bb62f mrs x15, s3_3_c11_c6_1 + 1c2c: d51bb64f msr s3_3_c11_c6_2, x15 + 1c30: d53bb64f mrs x15, s3_3_c11_c6_2 + 1c34: d51bb66f msr s3_3_c11_c6_3, x15 + 1c38: d53bb66f mrs x15, s3_3_c11_c6_3 + 1c3c: d51bb68f msr s3_3_c11_c6_4, x15 + 1c40: d53bb68f mrs x15, s3_3_c11_c6_4 + 1c44: d51bb6af msr s3_3_c11_c6_5, x15 + 1c48: d53bb6af mrs x15, s3_3_c11_c6_5 + 1c4c: d51bb6cf msr s3_3_c11_c6_6, x15 + 1c50: d53bb6cf mrs x15, s3_3_c11_c6_6 + 1c54: d51bb6ef msr s3_3_c11_c6_7, x15 + 1c58: d53bb6ef mrs x15, s3_3_c11_c6_7 + 1c5c: d51bb70f msr s3_3_c11_c7_0, x15 + 1c60: d53bb70f mrs x15, s3_3_c11_c7_0 + 1c64: d51bb72f msr s3_3_c11_c7_1, x15 + 1c68: d53bb72f mrs x15, s3_3_c11_c7_1 + 1c6c: d51bb74f msr s3_3_c11_c7_2, x15 + 1c70: d53bb74f mrs x15, s3_3_c11_c7_2 + 1c74: d51bb76f msr s3_3_c11_c7_3, x15 + 1c78: d53bb76f mrs x15, s3_3_c11_c7_3 + 1c7c: d51bb78f msr s3_3_c11_c7_4, x15 + 1c80: d53bb78f mrs x15, s3_3_c11_c7_4 + 1c84: d51bb7af msr s3_3_c11_c7_5, x15 + 1c88: d53bb7af mrs x15, s3_3_c11_c7_5 + 1c8c: d51bb7cf msr s3_3_c11_c7_6, x15 + 1c90: d53bb7cf mrs x15, s3_3_c11_c7_6 + 1c94: d51bb7ef msr s3_3_c11_c7_7, x15 + 1c98: d53bb7ef mrs x15, s3_3_c11_c7_7 + 1c9c: d51bb80f msr s3_3_c11_c8_0, x15 + 1ca0: d53bb80f mrs x15, s3_3_c11_c8_0 + 1ca4: d51bb82f msr s3_3_c11_c8_1, x15 + 1ca8: d53bb82f mrs x15, s3_3_c11_c8_1 + 1cac: d51bb84f msr s3_3_c11_c8_2, x15 + 1cb0: d53bb84f mrs x15, s3_3_c11_c8_2 + 1cb4: d51bb86f msr s3_3_c11_c8_3, x15 + 1cb8: d53bb86f mrs x15, s3_3_c11_c8_3 + 1cbc: d51bb88f msr s3_3_c11_c8_4, x15 + 1cc0: d53bb88f mrs x15, s3_3_c11_c8_4 + 1cc4: d51bb8af msr s3_3_c11_c8_5, x15 + 1cc8: d53bb8af mrs x15, s3_3_c11_c8_5 + 1ccc: d51bb8cf msr s3_3_c11_c8_6, x15 + 1cd0: d53bb8cf mrs x15, s3_3_c11_c8_6 + 1cd4: d51bb8ef msr s3_3_c11_c8_7, x15 + 1cd8: d53bb8ef mrs x15, s3_3_c11_c8_7 + 1cdc: d51bb90f msr s3_3_c11_c9_0, x15 + 1ce0: d53bb90f mrs x15, s3_3_c11_c9_0 + 1ce4: d51bb92f msr s3_3_c11_c9_1, x15 + 1ce8: d53bb92f mrs x15, s3_3_c11_c9_1 + 1cec: d51bb94f msr s3_3_c11_c9_2, x15 + 1cf0: d53bb94f mrs x15, s3_3_c11_c9_2 + 1cf4: d51bb96f msr s3_3_c11_c9_3, x15 + 1cf8: d53bb96f mrs x15, s3_3_c11_c9_3 + 1cfc: d51bb98f msr s3_3_c11_c9_4, x15 + 1d00: d53bb98f mrs x15, s3_3_c11_c9_4 + 1d04: d51bb9af msr s3_3_c11_c9_5, x15 + 1d08: d53bb9af mrs x15, s3_3_c11_c9_5 + 1d0c: d51bb9cf msr s3_3_c11_c9_6, x15 + 1d10: d53bb9cf mrs x15, s3_3_c11_c9_6 + 1d14: d51bb9ef msr s3_3_c11_c9_7, x15 + 1d18: d53bb9ef mrs x15, s3_3_c11_c9_7 + 1d1c: d51bba0f msr s3_3_c11_c10_0, x15 + 1d20: d53bba0f mrs x15, s3_3_c11_c10_0 + 1d24: d51bba2f msr s3_3_c11_c10_1, x15 + 1d28: d53bba2f mrs x15, s3_3_c11_c10_1 + 1d2c: d51bba4f msr s3_3_c11_c10_2, x15 + 1d30: d53bba4f mrs x15, s3_3_c11_c10_2 + 1d34: d51bba6f msr s3_3_c11_c10_3, x15 + 1d38: d53bba6f mrs x15, s3_3_c11_c10_3 + 1d3c: d51bba8f msr s3_3_c11_c10_4, x15 + 1d40: d53bba8f mrs x15, s3_3_c11_c10_4 + 1d44: d51bbaaf msr s3_3_c11_c10_5, x15 + 1d48: d53bbaaf mrs x15, s3_3_c11_c10_5 + 1d4c: d51bbacf msr s3_3_c11_c10_6, x15 + 1d50: d53bbacf mrs x15, s3_3_c11_c10_6 + 1d54: d51bbaef msr s3_3_c11_c10_7, x15 + 1d58: d53bbaef mrs x15, s3_3_c11_c10_7 + 1d5c: d51bbb0f msr s3_3_c11_c11_0, x15 + 1d60: d53bbb0f mrs x15, s3_3_c11_c11_0 + 1d64: d51bbb2f msr s3_3_c11_c11_1, x15 + 1d68: d53bbb2f mrs x15, s3_3_c11_c11_1 + 1d6c: d51bbb4f msr s3_3_c11_c11_2, x15 + 1d70: d53bbb4f mrs x15, s3_3_c11_c11_2 + 1d74: d51bbb6f msr s3_3_c11_c11_3, x15 + 1d78: d53bbb6f mrs x15, s3_3_c11_c11_3 + 1d7c: d51bbb8f msr s3_3_c11_c11_4, x15 + 1d80: d53bbb8f mrs x15, s3_3_c11_c11_4 + 1d84: d51bbbaf msr s3_3_c11_c11_5, x15 + 1d88: d53bbbaf mrs x15, s3_3_c11_c11_5 + 1d8c: d51bbbcf msr s3_3_c11_c11_6, x15 + 1d90: d53bbbcf mrs x15, s3_3_c11_c11_6 + 1d94: d51bbbef msr s3_3_c11_c11_7, x15 + 1d98: d53bbbef mrs x15, s3_3_c11_c11_7 + 1d9c: d51bbc0f msr s3_3_c11_c12_0, x15 + 1da0: d53bbc0f mrs x15, s3_3_c11_c12_0 + 1da4: d51bbc2f msr s3_3_c11_c12_1, x15 + 1da8: d53bbc2f mrs x15, s3_3_c11_c12_1 + 1dac: d51bbc4f msr s3_3_c11_c12_2, x15 + 1db0: d53bbc4f mrs x15, s3_3_c11_c12_2 + 1db4: d51bbc6f msr s3_3_c11_c12_3, x15 + 1db8: d53bbc6f mrs x15, s3_3_c11_c12_3 + 1dbc: d51bbc8f msr s3_3_c11_c12_4, x15 + 1dc0: d53bbc8f mrs x15, s3_3_c11_c12_4 + 1dc4: d51bbcaf msr s3_3_c11_c12_5, x15 + 1dc8: d53bbcaf mrs x15, s3_3_c11_c12_5 + 1dcc: d51bbccf msr s3_3_c11_c12_6, x15 + 1dd0: d53bbccf mrs x15, s3_3_c11_c12_6 + 1dd4: d51bbcef msr s3_3_c11_c12_7, x15 + 1dd8: d53bbcef mrs x15, s3_3_c11_c12_7 + 1ddc: d51bbd0f msr s3_3_c11_c13_0, x15 + 1de0: d53bbd0f mrs x15, s3_3_c11_c13_0 + 1de4: d51bbd2f msr s3_3_c11_c13_1, x15 + 1de8: d53bbd2f mrs x15, s3_3_c11_c13_1 + 1dec: d51bbd4f msr s3_3_c11_c13_2, x15 + 1df0: d53bbd4f mrs x15, s3_3_c11_c13_2 + 1df4: d51bbd6f msr s3_3_c11_c13_3, x15 + 1df8: d53bbd6f mrs x15, s3_3_c11_c13_3 + 1dfc: d51bbd8f msr s3_3_c11_c13_4, x15 + 1e00: d53bbd8f mrs x15, s3_3_c11_c13_4 + 1e04: d51bbdaf msr s3_3_c11_c13_5, x15 + 1e08: d53bbdaf mrs x15, s3_3_c11_c13_5 + 1e0c: d51bbdcf msr s3_3_c11_c13_6, x15 + 1e10: d53bbdcf mrs x15, s3_3_c11_c13_6 + 1e14: d51bbdef msr s3_3_c11_c13_7, x15 + 1e18: d53bbdef mrs x15, s3_3_c11_c13_7 + 1e1c: d51bbe0f msr s3_3_c11_c14_0, x15 + 1e20: d53bbe0f mrs x15, s3_3_c11_c14_0 + 1e24: d51bbe2f msr s3_3_c11_c14_1, x15 + 1e28: d53bbe2f mrs x15, s3_3_c11_c14_1 + 1e2c: d51bbe4f msr s3_3_c11_c14_2, x15 + 1e30: d53bbe4f mrs x15, s3_3_c11_c14_2 + 1e34: d51bbe6f msr s3_3_c11_c14_3, x15 + 1e38: d53bbe6f mrs x15, s3_3_c11_c14_3 + 1e3c: d51bbe8f msr s3_3_c11_c14_4, x15 + 1e40: d53bbe8f mrs x15, s3_3_c11_c14_4 + 1e44: d51bbeaf msr s3_3_c11_c14_5, x15 + 1e48: d53bbeaf mrs x15, s3_3_c11_c14_5 + 1e4c: d51bbecf msr s3_3_c11_c14_6, x15 + 1e50: d53bbecf mrs x15, s3_3_c11_c14_6 + 1e54: d51bbeef msr s3_3_c11_c14_7, x15 + 1e58: d53bbeef mrs x15, s3_3_c11_c14_7 + 1e5c: d51bbf0f msr s3_3_c11_c15_0, x15 + 1e60: d53bbf0f mrs x15, s3_3_c11_c15_0 + 1e64: d51bbf2f msr s3_3_c11_c15_1, x15 + 1e68: d53bbf2f mrs x15, s3_3_c11_c15_1 + 1e6c: d51bbf4f msr s3_3_c11_c15_2, x15 + 1e70: d53bbf4f mrs x15, s3_3_c11_c15_2 + 1e74: d51bbf6f msr s3_3_c11_c15_3, x15 + 1e78: d53bbf6f mrs x15, s3_3_c11_c15_3 + 1e7c: d51bbf8f msr s3_3_c11_c15_4, x15 + 1e80: d53bbf8f mrs x15, s3_3_c11_c15_4 + 1e84: d51bbfaf msr s3_3_c11_c15_5, x15 + 1e88: d53bbfaf mrs x15, s3_3_c11_c15_5 + 1e8c: d51bbfcf msr s3_3_c11_c15_6, x15 + 1e90: d53bbfcf mrs x15, s3_3_c11_c15_6 + 1e94: d51bbfef msr s3_3_c11_c15_7, x15 + 1e98: d53bbfef mrs x15, s3_3_c11_c15_7 + 1e9c: d51bf00f msr s3_3_c15_c0_0, x15 + 1ea0: d53bf00f mrs x15, s3_3_c15_c0_0 + 1ea4: d51bf02f msr s3_3_c15_c0_1, x15 + 1ea8: d53bf02f mrs x15, s3_3_c15_c0_1 + 1eac: d51bf04f msr s3_3_c15_c0_2, x15 + 1eb0: d53bf04f mrs x15, s3_3_c15_c0_2 + 1eb4: d51bf06f msr s3_3_c15_c0_3, x15 + 1eb8: d53bf06f mrs x15, s3_3_c15_c0_3 + 1ebc: d51bf08f msr s3_3_c15_c0_4, x15 + 1ec0: d53bf08f mrs x15, s3_3_c15_c0_4 + 1ec4: d51bf0af msr s3_3_c15_c0_5, x15 + 1ec8: d53bf0af mrs x15, s3_3_c15_c0_5 + 1ecc: d51bf0cf msr s3_3_c15_c0_6, x15 + 1ed0: d53bf0cf mrs x15, s3_3_c15_c0_6 + 1ed4: d51bf0ef msr s3_3_c15_c0_7, x15 + 1ed8: d53bf0ef mrs x15, s3_3_c15_c0_7 + 1edc: d51bf10f msr s3_3_c15_c1_0, x15 + 1ee0: d53bf10f mrs x15, s3_3_c15_c1_0 + 1ee4: d51bf12f msr s3_3_c15_c1_1, x15 + 1ee8: d53bf12f mrs x15, s3_3_c15_c1_1 + 1eec: d51bf14f msr s3_3_c15_c1_2, x15 + 1ef0: d53bf14f mrs x15, s3_3_c15_c1_2 + 1ef4: d51bf16f msr s3_3_c15_c1_3, x15 + 1ef8: d53bf16f mrs x15, s3_3_c15_c1_3 + 1efc: d51bf18f msr s3_3_c15_c1_4, x15 + 1f00: d53bf18f mrs x15, s3_3_c15_c1_4 + 1f04: d51bf1af msr s3_3_c15_c1_5, x15 + 1f08: d53bf1af mrs x15, s3_3_c15_c1_5 + 1f0c: d51bf1cf msr s3_3_c15_c1_6, x15 + 1f10: d53bf1cf mrs x15, s3_3_c15_c1_6 + 1f14: d51bf1ef msr s3_3_c15_c1_7, x15 + 1f18: d53bf1ef mrs x15, s3_3_c15_c1_7 + 1f1c: d51bf20f msr s3_3_c15_c2_0, x15 + 1f20: d53bf20f mrs x15, s3_3_c15_c2_0 + 1f24: d51bf22f msr s3_3_c15_c2_1, x15 + 1f28: d53bf22f mrs x15, s3_3_c15_c2_1 + 1f2c: d51bf24f msr s3_3_c15_c2_2, x15 + 1f30: d53bf24f mrs x15, s3_3_c15_c2_2 + 1f34: d51bf26f msr s3_3_c15_c2_3, x15 + 1f38: d53bf26f mrs x15, s3_3_c15_c2_3 + 1f3c: d51bf28f msr s3_3_c15_c2_4, x15 + 1f40: d53bf28f mrs x15, s3_3_c15_c2_4 + 1f44: d51bf2af msr s3_3_c15_c2_5, x15 + 1f48: d53bf2af mrs x15, s3_3_c15_c2_5 + 1f4c: d51bf2cf msr s3_3_c15_c2_6, x15 + 1f50: d53bf2cf mrs x15, s3_3_c15_c2_6 + 1f54: d51bf2ef msr s3_3_c15_c2_7, x15 + 1f58: d53bf2ef mrs x15, s3_3_c15_c2_7 + 1f5c: d51bf30f msr s3_3_c15_c3_0, x15 + 1f60: d53bf30f mrs x15, s3_3_c15_c3_0 + 1f64: d51bf32f msr s3_3_c15_c3_1, x15 + 1f68: d53bf32f mrs x15, s3_3_c15_c3_1 + 1f6c: d51bf34f msr s3_3_c15_c3_2, x15 + 1f70: d53bf34f mrs x15, s3_3_c15_c3_2 + 1f74: d51bf36f msr s3_3_c15_c3_3, x15 + 1f78: d53bf36f mrs x15, s3_3_c15_c3_3 + 1f7c: d51bf38f msr s3_3_c15_c3_4, x15 + 1f80: d53bf38f mrs x15, s3_3_c15_c3_4 + 1f84: d51bf3af msr s3_3_c15_c3_5, x15 + 1f88: d53bf3af mrs x15, s3_3_c15_c3_5 + 1f8c: d51bf3cf msr s3_3_c15_c3_6, x15 + 1f90: d53bf3cf mrs x15, s3_3_c15_c3_6 + 1f94: d51bf3ef msr s3_3_c15_c3_7, x15 + 1f98: d53bf3ef mrs x15, s3_3_c15_c3_7 + 1f9c: d51bf40f msr s3_3_c15_c4_0, x15 + 1fa0: d53bf40f mrs x15, s3_3_c15_c4_0 + 1fa4: d51bf42f msr s3_3_c15_c4_1, x15 + 1fa8: d53bf42f mrs x15, s3_3_c15_c4_1 + 1fac: d51bf44f msr s3_3_c15_c4_2, x15 + 1fb0: d53bf44f mrs x15, s3_3_c15_c4_2 + 1fb4: d51bf46f msr s3_3_c15_c4_3, x15 + 1fb8: d53bf46f mrs x15, s3_3_c15_c4_3 + 1fbc: d51bf48f msr s3_3_c15_c4_4, x15 + 1fc0: d53bf48f mrs x15, s3_3_c15_c4_4 + 1fc4: d51bf4af msr s3_3_c15_c4_5, x15 + 1fc8: d53bf4af mrs x15, s3_3_c15_c4_5 + 1fcc: d51bf4cf msr s3_3_c15_c4_6, x15 + 1fd0: d53bf4cf mrs x15, s3_3_c15_c4_6 + 1fd4: d51bf4ef msr s3_3_c15_c4_7, x15 + 1fd8: d53bf4ef mrs x15, s3_3_c15_c4_7 + 1fdc: d51bf50f msr s3_3_c15_c5_0, x15 + 1fe0: d53bf50f mrs x15, s3_3_c15_c5_0 + 1fe4: d51bf52f msr s3_3_c15_c5_1, x15 + 1fe8: d53bf52f mrs x15, s3_3_c15_c5_1 + 1fec: d51bf54f msr s3_3_c15_c5_2, x15 + 1ff0: d53bf54f mrs x15, s3_3_c15_c5_2 + 1ff4: d51bf56f msr s3_3_c15_c5_3, x15 + 1ff8: d53bf56f mrs x15, s3_3_c15_c5_3 + 1ffc: d51bf58f msr s3_3_c15_c5_4, x15 + 2000: d53bf58f mrs x15, s3_3_c15_c5_4 + 2004: d51bf5af msr s3_3_c15_c5_5, x15 + 2008: d53bf5af mrs x15, s3_3_c15_c5_5 + 200c: d51bf5cf msr s3_3_c15_c5_6, x15 + 2010: d53bf5cf mrs x15, s3_3_c15_c5_6 + 2014: d51bf5ef msr s3_3_c15_c5_7, x15 + 2018: d53bf5ef mrs x15, s3_3_c15_c5_7 + 201c: d51bf60f msr s3_3_c15_c6_0, x15 + 2020: d53bf60f mrs x15, s3_3_c15_c6_0 + 2024: d51bf62f msr s3_3_c15_c6_1, x15 + 2028: d53bf62f mrs x15, s3_3_c15_c6_1 + 202c: d51bf64f msr s3_3_c15_c6_2, x15 + 2030: d53bf64f mrs x15, s3_3_c15_c6_2 + 2034: d51bf66f msr s3_3_c15_c6_3, x15 + 2038: d53bf66f mrs x15, s3_3_c15_c6_3 + 203c: d51bf68f msr s3_3_c15_c6_4, x15 + 2040: d53bf68f mrs x15, s3_3_c15_c6_4 + 2044: d51bf6af msr s3_3_c15_c6_5, x15 + 2048: d53bf6af mrs x15, s3_3_c15_c6_5 + 204c: d51bf6cf msr s3_3_c15_c6_6, x15 + 2050: d53bf6cf mrs x15, s3_3_c15_c6_6 + 2054: d51bf6ef msr s3_3_c15_c6_7, x15 + 2058: d53bf6ef mrs x15, s3_3_c15_c6_7 + 205c: d51bf70f msr s3_3_c15_c7_0, x15 + 2060: d53bf70f mrs x15, s3_3_c15_c7_0 + 2064: d51bf72f msr s3_3_c15_c7_1, x15 + 2068: d53bf72f mrs x15, s3_3_c15_c7_1 + 206c: d51bf74f msr s3_3_c15_c7_2, x15 + 2070: d53bf74f mrs x15, s3_3_c15_c7_2 + 2074: d51bf76f msr s3_3_c15_c7_3, x15 + 2078: d53bf76f mrs x15, s3_3_c15_c7_3 + 207c: d51bf78f msr s3_3_c15_c7_4, x15 + 2080: d53bf78f mrs x15, s3_3_c15_c7_4 + 2084: d51bf7af msr s3_3_c15_c7_5, x15 + 2088: d53bf7af mrs x15, s3_3_c15_c7_5 + 208c: d51bf7cf msr s3_3_c15_c7_6, x15 + 2090: d53bf7cf mrs x15, s3_3_c15_c7_6 + 2094: d51bf7ef msr s3_3_c15_c7_7, x15 + 2098: d53bf7ef mrs x15, s3_3_c15_c7_7 + 209c: d51bf80f msr s3_3_c15_c8_0, x15 + 20a0: d53bf80f mrs x15, s3_3_c15_c8_0 + 20a4: d51bf82f msr s3_3_c15_c8_1, x15 + 20a8: d53bf82f mrs x15, s3_3_c15_c8_1 + 20ac: d51bf84f msr s3_3_c15_c8_2, x15 + 20b0: d53bf84f mrs x15, s3_3_c15_c8_2 + 20b4: d51bf86f msr s3_3_c15_c8_3, x15 + 20b8: d53bf86f mrs x15, s3_3_c15_c8_3 + 20bc: d51bf88f msr s3_3_c15_c8_4, x15 + 20c0: d53bf88f mrs x15, s3_3_c15_c8_4 + 20c4: d51bf8af msr s3_3_c15_c8_5, x15 + 20c8: d53bf8af mrs x15, s3_3_c15_c8_5 + 20cc: d51bf8cf msr s3_3_c15_c8_6, x15 + 20d0: d53bf8cf mrs x15, s3_3_c15_c8_6 + 20d4: d51bf8ef msr s3_3_c15_c8_7, x15 + 20d8: d53bf8ef mrs x15, s3_3_c15_c8_7 + 20dc: d51bf90f msr s3_3_c15_c9_0, x15 + 20e0: d53bf90f mrs x15, s3_3_c15_c9_0 + 20e4: d51bf92f msr s3_3_c15_c9_1, x15 + 20e8: d53bf92f mrs x15, s3_3_c15_c9_1 + 20ec: d51bf94f msr s3_3_c15_c9_2, x15 + 20f0: d53bf94f mrs x15, s3_3_c15_c9_2 + 20f4: d51bf96f msr s3_3_c15_c9_3, x15 + 20f8: d53bf96f mrs x15, s3_3_c15_c9_3 + 20fc: d51bf98f msr s3_3_c15_c9_4, x15 + 2100: d53bf98f mrs x15, s3_3_c15_c9_4 + 2104: d51bf9af msr s3_3_c15_c9_5, x15 + 2108: d53bf9af mrs x15, s3_3_c15_c9_5 + 210c: d51bf9cf msr s3_3_c15_c9_6, x15 + 2110: d53bf9cf mrs x15, s3_3_c15_c9_6 + 2114: d51bf9ef msr s3_3_c15_c9_7, x15 + 2118: d53bf9ef mrs x15, s3_3_c15_c9_7 + 211c: d51bfa0f msr s3_3_c15_c10_0, x15 + 2120: d53bfa0f mrs x15, s3_3_c15_c10_0 + 2124: d51bfa2f msr s3_3_c15_c10_1, x15 + 2128: d53bfa2f mrs x15, s3_3_c15_c10_1 + 212c: d51bfa4f msr s3_3_c15_c10_2, x15 + 2130: d53bfa4f mrs x15, s3_3_c15_c10_2 + 2134: d51bfa6f msr s3_3_c15_c10_3, x15 + 2138: d53bfa6f mrs x15, s3_3_c15_c10_3 + 213c: d51bfa8f msr s3_3_c15_c10_4, x15 + 2140: d53bfa8f mrs x15, s3_3_c15_c10_4 + 2144: d51bfaaf msr s3_3_c15_c10_5, x15 + 2148: d53bfaaf mrs x15, s3_3_c15_c10_5 + 214c: d51bfacf msr s3_3_c15_c10_6, x15 + 2150: d53bfacf mrs x15, s3_3_c15_c10_6 + 2154: d51bfaef msr s3_3_c15_c10_7, x15 + 2158: d53bfaef mrs x15, s3_3_c15_c10_7 + 215c: d51bfb0f msr s3_3_c15_c11_0, x15 + 2160: d53bfb0f mrs x15, s3_3_c15_c11_0 + 2164: d51bfb2f msr s3_3_c15_c11_1, x15 + 2168: d53bfb2f mrs x15, s3_3_c15_c11_1 + 216c: d51bfb4f msr s3_3_c15_c11_2, x15 + 2170: d53bfb4f mrs x15, s3_3_c15_c11_2 + 2174: d51bfb6f msr s3_3_c15_c11_3, x15 + 2178: d53bfb6f mrs x15, s3_3_c15_c11_3 + 217c: d51bfb8f msr s3_3_c15_c11_4, x15 + 2180: d53bfb8f mrs x15, s3_3_c15_c11_4 + 2184: d51bfbaf msr s3_3_c15_c11_5, x15 + 2188: d53bfbaf mrs x15, s3_3_c15_c11_5 + 218c: d51bfbcf msr s3_3_c15_c11_6, x15 + 2190: d53bfbcf mrs x15, s3_3_c15_c11_6 + 2194: d51bfbef msr s3_3_c15_c11_7, x15 + 2198: d53bfbef mrs x15, s3_3_c15_c11_7 + 219c: d51bfc0f msr s3_3_c15_c12_0, x15 + 21a0: d53bfc0f mrs x15, s3_3_c15_c12_0 + 21a4: d51bfc2f msr s3_3_c15_c12_1, x15 + 21a8: d53bfc2f mrs x15, s3_3_c15_c12_1 + 21ac: d51bfc4f msr s3_3_c15_c12_2, x15 + 21b0: d53bfc4f mrs x15, s3_3_c15_c12_2 + 21b4: d51bfc6f msr s3_3_c15_c12_3, x15 + 21b8: d53bfc6f mrs x15, s3_3_c15_c12_3 + 21bc: d51bfc8f msr s3_3_c15_c12_4, x15 + 21c0: d53bfc8f mrs x15, s3_3_c15_c12_4 + 21c4: d51bfcaf msr s3_3_c15_c12_5, x15 + 21c8: d53bfcaf mrs x15, s3_3_c15_c12_5 + 21cc: d51bfccf msr s3_3_c15_c12_6, x15 + 21d0: d53bfccf mrs x15, s3_3_c15_c12_6 + 21d4: d51bfcef msr s3_3_c15_c12_7, x15 + 21d8: d53bfcef mrs x15, s3_3_c15_c12_7 + 21dc: d51bfd0f msr s3_3_c15_c13_0, x15 + 21e0: d53bfd0f mrs x15, s3_3_c15_c13_0 + 21e4: d51bfd2f msr s3_3_c15_c13_1, x15 + 21e8: d53bfd2f mrs x15, s3_3_c15_c13_1 + 21ec: d51bfd4f msr s3_3_c15_c13_2, x15 + 21f0: d53bfd4f mrs x15, s3_3_c15_c13_2 + 21f4: d51bfd6f msr s3_3_c15_c13_3, x15 + 21f8: d53bfd6f mrs x15, s3_3_c15_c13_3 + 21fc: d51bfd8f msr s3_3_c15_c13_4, x15 + 2200: d53bfd8f mrs x15, s3_3_c15_c13_4 + 2204: d51bfdaf msr s3_3_c15_c13_5, x15 + 2208: d53bfdaf mrs x15, s3_3_c15_c13_5 + 220c: d51bfdcf msr s3_3_c15_c13_6, x15 + 2210: d53bfdcf mrs x15, s3_3_c15_c13_6 + 2214: d51bfdef msr s3_3_c15_c13_7, x15 + 2218: d53bfdef mrs x15, s3_3_c15_c13_7 + 221c: d51bfe0f msr s3_3_c15_c14_0, x15 + 2220: d53bfe0f mrs x15, s3_3_c15_c14_0 + 2224: d51bfe2f msr s3_3_c15_c14_1, x15 + 2228: d53bfe2f mrs x15, s3_3_c15_c14_1 + 222c: d51bfe4f msr s3_3_c15_c14_2, x15 + 2230: d53bfe4f mrs x15, s3_3_c15_c14_2 + 2234: d51bfe6f msr s3_3_c15_c14_3, x15 + 2238: d53bfe6f mrs x15, s3_3_c15_c14_3 + 223c: d51bfe8f msr s3_3_c15_c14_4, x15 + 2240: d53bfe8f mrs x15, s3_3_c15_c14_4 + 2244: d51bfeaf msr s3_3_c15_c14_5, x15 + 2248: d53bfeaf mrs x15, s3_3_c15_c14_5 + 224c: d51bfecf msr s3_3_c15_c14_6, x15 + 2250: d53bfecf mrs x15, s3_3_c15_c14_6 + 2254: d51bfeef msr s3_3_c15_c14_7, x15 + 2258: d53bfeef mrs x15, s3_3_c15_c14_7 + 225c: d51bff0f msr s3_3_c15_c15_0, x15 + 2260: d53bff0f mrs x15, s3_3_c15_c15_0 + 2264: d51bff2f msr s3_3_c15_c15_1, x15 + 2268: d53bff2f mrs x15, s3_3_c15_c15_1 + 226c: d51bff4f msr s3_3_c15_c15_2, x15 + 2270: d53bff4f mrs x15, s3_3_c15_c15_2 + 2274: d51bff6f msr s3_3_c15_c15_3, x15 + 2278: d53bff6f mrs x15, s3_3_c15_c15_3 + 227c: d51bff8f msr s3_3_c15_c15_4, x15 + 2280: d53bff8f mrs x15, s3_3_c15_c15_4 + 2284: d51bffaf msr s3_3_c15_c15_5, x15 + 2288: d53bffaf mrs x15, s3_3_c15_c15_5 + 228c: d51bffcf msr s3_3_c15_c15_6, x15 + 2290: d53bffcf mrs x15, s3_3_c15_c15_6 + 2294: d51bffef msr s3_3_c15_c15_7, x15 + 2298: d53bffef mrs x15, s3_3_c15_c15_7 + 229c: d51cb00f msr s3_4_c11_c0_0, x15 + 22a0: d53cb00f mrs x15, s3_4_c11_c0_0 + 22a4: d51cb02f msr s3_4_c11_c0_1, x15 + 22a8: d53cb02f mrs x15, s3_4_c11_c0_1 + 22ac: d51cb04f msr s3_4_c11_c0_2, x15 + 22b0: d53cb04f mrs x15, s3_4_c11_c0_2 + 22b4: d51cb06f msr s3_4_c11_c0_3, x15 + 22b8: d53cb06f mrs x15, s3_4_c11_c0_3 + 22bc: d51cb08f msr s3_4_c11_c0_4, x15 + 22c0: d53cb08f mrs x15, s3_4_c11_c0_4 + 22c4: d51cb0af msr s3_4_c11_c0_5, x15 + 22c8: d53cb0af mrs x15, s3_4_c11_c0_5 + 22cc: d51cb0cf msr s3_4_c11_c0_6, x15 + 22d0: d53cb0cf mrs x15, s3_4_c11_c0_6 + 22d4: d51cb0ef msr s3_4_c11_c0_7, x15 + 22d8: d53cb0ef mrs x15, s3_4_c11_c0_7 + 22dc: d51cb10f msr s3_4_c11_c1_0, x15 + 22e0: d53cb10f mrs x15, s3_4_c11_c1_0 + 22e4: d51cb12f msr s3_4_c11_c1_1, x15 + 22e8: d53cb12f mrs x15, s3_4_c11_c1_1 + 22ec: d51cb14f msr s3_4_c11_c1_2, x15 + 22f0: d53cb14f mrs x15, s3_4_c11_c1_2 + 22f4: d51cb16f msr s3_4_c11_c1_3, x15 + 22f8: d53cb16f mrs x15, s3_4_c11_c1_3 + 22fc: d51cb18f msr s3_4_c11_c1_4, x15 + 2300: d53cb18f mrs x15, s3_4_c11_c1_4 + 2304: d51cb1af msr s3_4_c11_c1_5, x15 + 2308: d53cb1af mrs x15, s3_4_c11_c1_5 + 230c: d51cb1cf msr s3_4_c11_c1_6, x15 + 2310: d53cb1cf mrs x15, s3_4_c11_c1_6 + 2314: d51cb1ef msr s3_4_c11_c1_7, x15 + 2318: d53cb1ef mrs x15, s3_4_c11_c1_7 + 231c: d51cb20f msr s3_4_c11_c2_0, x15 + 2320: d53cb20f mrs x15, s3_4_c11_c2_0 + 2324: d51cb22f msr s3_4_c11_c2_1, x15 + 2328: d53cb22f mrs x15, s3_4_c11_c2_1 + 232c: d51cb24f msr s3_4_c11_c2_2, x15 + 2330: d53cb24f mrs x15, s3_4_c11_c2_2 + 2334: d51cb26f msr s3_4_c11_c2_3, x15 + 2338: d53cb26f mrs x15, s3_4_c11_c2_3 + 233c: d51cb28f msr s3_4_c11_c2_4, x15 + 2340: d53cb28f mrs x15, s3_4_c11_c2_4 + 2344: d51cb2af msr s3_4_c11_c2_5, x15 + 2348: d53cb2af mrs x15, s3_4_c11_c2_5 + 234c: d51cb2cf msr s3_4_c11_c2_6, x15 + 2350: d53cb2cf mrs x15, s3_4_c11_c2_6 + 2354: d51cb2ef msr s3_4_c11_c2_7, x15 + 2358: d53cb2ef mrs x15, s3_4_c11_c2_7 + 235c: d51cb30f msr s3_4_c11_c3_0, x15 + 2360: d53cb30f mrs x15, s3_4_c11_c3_0 + 2364: d51cb32f msr s3_4_c11_c3_1, x15 + 2368: d53cb32f mrs x15, s3_4_c11_c3_1 + 236c: d51cb34f msr s3_4_c11_c3_2, x15 + 2370: d53cb34f mrs x15, s3_4_c11_c3_2 + 2374: d51cb36f msr s3_4_c11_c3_3, x15 + 2378: d53cb36f mrs x15, s3_4_c11_c3_3 + 237c: d51cb38f msr s3_4_c11_c3_4, x15 + 2380: d53cb38f mrs x15, s3_4_c11_c3_4 + 2384: d51cb3af msr s3_4_c11_c3_5, x15 + 2388: d53cb3af mrs x15, s3_4_c11_c3_5 + 238c: d51cb3cf msr s3_4_c11_c3_6, x15 + 2390: d53cb3cf mrs x15, s3_4_c11_c3_6 + 2394: d51cb3ef msr s3_4_c11_c3_7, x15 + 2398: d53cb3ef mrs x15, s3_4_c11_c3_7 + 239c: d51cb40f msr s3_4_c11_c4_0, x15 + 23a0: d53cb40f mrs x15, s3_4_c11_c4_0 + 23a4: d51cb42f msr s3_4_c11_c4_1, x15 + 23a8: d53cb42f mrs x15, s3_4_c11_c4_1 + 23ac: d51cb44f msr s3_4_c11_c4_2, x15 + 23b0: d53cb44f mrs x15, s3_4_c11_c4_2 + 23b4: d51cb46f msr s3_4_c11_c4_3, x15 + 23b8: d53cb46f mrs x15, s3_4_c11_c4_3 + 23bc: d51cb48f msr s3_4_c11_c4_4, x15 + 23c0: d53cb48f mrs x15, s3_4_c11_c4_4 + 23c4: d51cb4af msr s3_4_c11_c4_5, x15 + 23c8: d53cb4af mrs x15, s3_4_c11_c4_5 + 23cc: d51cb4cf msr s3_4_c11_c4_6, x15 + 23d0: d53cb4cf mrs x15, s3_4_c11_c4_6 + 23d4: d51cb4ef msr s3_4_c11_c4_7, x15 + 23d8: d53cb4ef mrs x15, s3_4_c11_c4_7 + 23dc: d51cb50f msr s3_4_c11_c5_0, x15 + 23e0: d53cb50f mrs x15, s3_4_c11_c5_0 + 23e4: d51cb52f msr s3_4_c11_c5_1, x15 + 23e8: d53cb52f mrs x15, s3_4_c11_c5_1 + 23ec: d51cb54f msr s3_4_c11_c5_2, x15 + 23f0: d53cb54f mrs x15, s3_4_c11_c5_2 + 23f4: d51cb56f msr s3_4_c11_c5_3, x15 + 23f8: d53cb56f mrs x15, s3_4_c11_c5_3 + 23fc: d51cb58f msr s3_4_c11_c5_4, x15 + 2400: d53cb58f mrs x15, s3_4_c11_c5_4 + 2404: d51cb5af msr s3_4_c11_c5_5, x15 + 2408: d53cb5af mrs x15, s3_4_c11_c5_5 + 240c: d51cb5cf msr s3_4_c11_c5_6, x15 + 2410: d53cb5cf mrs x15, s3_4_c11_c5_6 + 2414: d51cb5ef msr s3_4_c11_c5_7, x15 + 2418: d53cb5ef mrs x15, s3_4_c11_c5_7 + 241c: d51cb60f msr s3_4_c11_c6_0, x15 + 2420: d53cb60f mrs x15, s3_4_c11_c6_0 + 2424: d51cb62f msr s3_4_c11_c6_1, x15 + 2428: d53cb62f mrs x15, s3_4_c11_c6_1 + 242c: d51cb64f msr s3_4_c11_c6_2, x15 + 2430: d53cb64f mrs x15, s3_4_c11_c6_2 + 2434: d51cb66f msr s3_4_c11_c6_3, x15 + 2438: d53cb66f mrs x15, s3_4_c11_c6_3 + 243c: d51cb68f msr s3_4_c11_c6_4, x15 + 2440: d53cb68f mrs x15, s3_4_c11_c6_4 + 2444: d51cb6af msr s3_4_c11_c6_5, x15 + 2448: d53cb6af mrs x15, s3_4_c11_c6_5 + 244c: d51cb6cf msr s3_4_c11_c6_6, x15 + 2450: d53cb6cf mrs x15, s3_4_c11_c6_6 + 2454: d51cb6ef msr s3_4_c11_c6_7, x15 + 2458: d53cb6ef mrs x15, s3_4_c11_c6_7 + 245c: d51cb70f msr s3_4_c11_c7_0, x15 + 2460: d53cb70f mrs x15, s3_4_c11_c7_0 + 2464: d51cb72f msr s3_4_c11_c7_1, x15 + 2468: d53cb72f mrs x15, s3_4_c11_c7_1 + 246c: d51cb74f msr s3_4_c11_c7_2, x15 + 2470: d53cb74f mrs x15, s3_4_c11_c7_2 + 2474: d51cb76f msr s3_4_c11_c7_3, x15 + 2478: d53cb76f mrs x15, s3_4_c11_c7_3 + 247c: d51cb78f msr s3_4_c11_c7_4, x15 + 2480: d53cb78f mrs x15, s3_4_c11_c7_4 + 2484: d51cb7af msr s3_4_c11_c7_5, x15 + 2488: d53cb7af mrs x15, s3_4_c11_c7_5 + 248c: d51cb7cf msr s3_4_c11_c7_6, x15 + 2490: d53cb7cf mrs x15, s3_4_c11_c7_6 + 2494: d51cb7ef msr s3_4_c11_c7_7, x15 + 2498: d53cb7ef mrs x15, s3_4_c11_c7_7 + 249c: d51cb80f msr s3_4_c11_c8_0, x15 + 24a0: d53cb80f mrs x15, s3_4_c11_c8_0 + 24a4: d51cb82f msr s3_4_c11_c8_1, x15 + 24a8: d53cb82f mrs x15, s3_4_c11_c8_1 + 24ac: d51cb84f msr s3_4_c11_c8_2, x15 + 24b0: d53cb84f mrs x15, s3_4_c11_c8_2 + 24b4: d51cb86f msr s3_4_c11_c8_3, x15 + 24b8: d53cb86f mrs x15, s3_4_c11_c8_3 + 24bc: d51cb88f msr s3_4_c11_c8_4, x15 + 24c0: d53cb88f mrs x15, s3_4_c11_c8_4 + 24c4: d51cb8af msr s3_4_c11_c8_5, x15 + 24c8: d53cb8af mrs x15, s3_4_c11_c8_5 + 24cc: d51cb8cf msr s3_4_c11_c8_6, x15 + 24d0: d53cb8cf mrs x15, s3_4_c11_c8_6 + 24d4: d51cb8ef msr s3_4_c11_c8_7, x15 + 24d8: d53cb8ef mrs x15, s3_4_c11_c8_7 + 24dc: d51cb90f msr s3_4_c11_c9_0, x15 + 24e0: d53cb90f mrs x15, s3_4_c11_c9_0 + 24e4: d51cb92f msr s3_4_c11_c9_1, x15 + 24e8: d53cb92f mrs x15, s3_4_c11_c9_1 + 24ec: d51cb94f msr s3_4_c11_c9_2, x15 + 24f0: d53cb94f mrs x15, s3_4_c11_c9_2 + 24f4: d51cb96f msr s3_4_c11_c9_3, x15 + 24f8: d53cb96f mrs x15, s3_4_c11_c9_3 + 24fc: d51cb98f msr s3_4_c11_c9_4, x15 + 2500: d53cb98f mrs x15, s3_4_c11_c9_4 + 2504: d51cb9af msr s3_4_c11_c9_5, x15 + 2508: d53cb9af mrs x15, s3_4_c11_c9_5 + 250c: d51cb9cf msr s3_4_c11_c9_6, x15 + 2510: d53cb9cf mrs x15, s3_4_c11_c9_6 + 2514: d51cb9ef msr s3_4_c11_c9_7, x15 + 2518: d53cb9ef mrs x15, s3_4_c11_c9_7 + 251c: d51cba0f msr s3_4_c11_c10_0, x15 + 2520: d53cba0f mrs x15, s3_4_c11_c10_0 + 2524: d51cba2f msr s3_4_c11_c10_1, x15 + 2528: d53cba2f mrs x15, s3_4_c11_c10_1 + 252c: d51cba4f msr s3_4_c11_c10_2, x15 + 2530: d53cba4f mrs x15, s3_4_c11_c10_2 + 2534: d51cba6f msr s3_4_c11_c10_3, x15 + 2538: d53cba6f mrs x15, s3_4_c11_c10_3 + 253c: d51cba8f msr s3_4_c11_c10_4, x15 + 2540: d53cba8f mrs x15, s3_4_c11_c10_4 + 2544: d51cbaaf msr s3_4_c11_c10_5, x15 + 2548: d53cbaaf mrs x15, s3_4_c11_c10_5 + 254c: d51cbacf msr s3_4_c11_c10_6, x15 + 2550: d53cbacf mrs x15, s3_4_c11_c10_6 + 2554: d51cbaef msr s3_4_c11_c10_7, x15 + 2558: d53cbaef mrs x15, s3_4_c11_c10_7 + 255c: d51cbb0f msr s3_4_c11_c11_0, x15 + 2560: d53cbb0f mrs x15, s3_4_c11_c11_0 + 2564: d51cbb2f msr s3_4_c11_c11_1, x15 + 2568: d53cbb2f mrs x15, s3_4_c11_c11_1 + 256c: d51cbb4f msr s3_4_c11_c11_2, x15 + 2570: d53cbb4f mrs x15, s3_4_c11_c11_2 + 2574: d51cbb6f msr s3_4_c11_c11_3, x15 + 2578: d53cbb6f mrs x15, s3_4_c11_c11_3 + 257c: d51cbb8f msr s3_4_c11_c11_4, x15 + 2580: d53cbb8f mrs x15, s3_4_c11_c11_4 + 2584: d51cbbaf msr s3_4_c11_c11_5, x15 + 2588: d53cbbaf mrs x15, s3_4_c11_c11_5 + 258c: d51cbbcf msr s3_4_c11_c11_6, x15 + 2590: d53cbbcf mrs x15, s3_4_c11_c11_6 + 2594: d51cbbef msr s3_4_c11_c11_7, x15 + 2598: d53cbbef mrs x15, s3_4_c11_c11_7 + 259c: d51cbc0f msr s3_4_c11_c12_0, x15 + 25a0: d53cbc0f mrs x15, s3_4_c11_c12_0 + 25a4: d51cbc2f msr s3_4_c11_c12_1, x15 + 25a8: d53cbc2f mrs x15, s3_4_c11_c12_1 + 25ac: d51cbc4f msr s3_4_c11_c12_2, x15 + 25b0: d53cbc4f mrs x15, s3_4_c11_c12_2 + 25b4: d51cbc6f msr s3_4_c11_c12_3, x15 + 25b8: d53cbc6f mrs x15, s3_4_c11_c12_3 + 25bc: d51cbc8f msr s3_4_c11_c12_4, x15 + 25c0: d53cbc8f mrs x15, s3_4_c11_c12_4 + 25c4: d51cbcaf msr s3_4_c11_c12_5, x15 + 25c8: d53cbcaf mrs x15, s3_4_c11_c12_5 + 25cc: d51cbccf msr s3_4_c11_c12_6, x15 + 25d0: d53cbccf mrs x15, s3_4_c11_c12_6 + 25d4: d51cbcef msr s3_4_c11_c12_7, x15 + 25d8: d53cbcef mrs x15, s3_4_c11_c12_7 + 25dc: d51cbd0f msr s3_4_c11_c13_0, x15 + 25e0: d53cbd0f mrs x15, s3_4_c11_c13_0 + 25e4: d51cbd2f msr s3_4_c11_c13_1, x15 + 25e8: d53cbd2f mrs x15, s3_4_c11_c13_1 + 25ec: d51cbd4f msr s3_4_c11_c13_2, x15 + 25f0: d53cbd4f mrs x15, s3_4_c11_c13_2 + 25f4: d51cbd6f msr s3_4_c11_c13_3, x15 + 25f8: d53cbd6f mrs x15, s3_4_c11_c13_3 + 25fc: d51cbd8f msr s3_4_c11_c13_4, x15 + 2600: d53cbd8f mrs x15, s3_4_c11_c13_4 + 2604: d51cbdaf msr s3_4_c11_c13_5, x15 + 2608: d53cbdaf mrs x15, s3_4_c11_c13_5 + 260c: d51cbdcf msr s3_4_c11_c13_6, x15 + 2610: d53cbdcf mrs x15, s3_4_c11_c13_6 + 2614: d51cbdef msr s3_4_c11_c13_7, x15 + 2618: d53cbdef mrs x15, s3_4_c11_c13_7 + 261c: d51cbe0f msr s3_4_c11_c14_0, x15 + 2620: d53cbe0f mrs x15, s3_4_c11_c14_0 + 2624: d51cbe2f msr s3_4_c11_c14_1, x15 + 2628: d53cbe2f mrs x15, s3_4_c11_c14_1 + 262c: d51cbe4f msr s3_4_c11_c14_2, x15 + 2630: d53cbe4f mrs x15, s3_4_c11_c14_2 + 2634: d51cbe6f msr s3_4_c11_c14_3, x15 + 2638: d53cbe6f mrs x15, s3_4_c11_c14_3 + 263c: d51cbe8f msr s3_4_c11_c14_4, x15 + 2640: d53cbe8f mrs x15, s3_4_c11_c14_4 + 2644: d51cbeaf msr s3_4_c11_c14_5, x15 + 2648: d53cbeaf mrs x15, s3_4_c11_c14_5 + 264c: d51cbecf msr s3_4_c11_c14_6, x15 + 2650: d53cbecf mrs x15, s3_4_c11_c14_6 + 2654: d51cbeef msr s3_4_c11_c14_7, x15 + 2658: d53cbeef mrs x15, s3_4_c11_c14_7 + 265c: d51cbf0f msr s3_4_c11_c15_0, x15 + 2660: d53cbf0f mrs x15, s3_4_c11_c15_0 + 2664: d51cbf2f msr s3_4_c11_c15_1, x15 + 2668: d53cbf2f mrs x15, s3_4_c11_c15_1 + 266c: d51cbf4f msr s3_4_c11_c15_2, x15 + 2670: d53cbf4f mrs x15, s3_4_c11_c15_2 + 2674: d51cbf6f msr s3_4_c11_c15_3, x15 + 2678: d53cbf6f mrs x15, s3_4_c11_c15_3 + 267c: d51cbf8f msr s3_4_c11_c15_4, x15 + 2680: d53cbf8f mrs x15, s3_4_c11_c15_4 + 2684: d51cbfaf msr s3_4_c11_c15_5, x15 + 2688: d53cbfaf mrs x15, s3_4_c11_c15_5 + 268c: d51cbfcf msr s3_4_c11_c15_6, x15 + 2690: d53cbfcf mrs x15, s3_4_c11_c15_6 + 2694: d51cbfef msr s3_4_c11_c15_7, x15 + 2698: d53cbfef mrs x15, s3_4_c11_c15_7 + 269c: d51cf00f msr s3_4_c15_c0_0, x15 + 26a0: d53cf00f mrs x15, s3_4_c15_c0_0 + 26a4: d51cf02f msr s3_4_c15_c0_1, x15 + 26a8: d53cf02f mrs x15, s3_4_c15_c0_1 + 26ac: d51cf04f msr s3_4_c15_c0_2, x15 + 26b0: d53cf04f mrs x15, s3_4_c15_c0_2 + 26b4: d51cf06f msr s3_4_c15_c0_3, x15 + 26b8: d53cf06f mrs x15, s3_4_c15_c0_3 + 26bc: d51cf08f msr s3_4_c15_c0_4, x15 + 26c0: d53cf08f mrs x15, s3_4_c15_c0_4 + 26c4: d51cf0af msr s3_4_c15_c0_5, x15 + 26c8: d53cf0af mrs x15, s3_4_c15_c0_5 + 26cc: d51cf0cf msr s3_4_c15_c0_6, x15 + 26d0: d53cf0cf mrs x15, s3_4_c15_c0_6 + 26d4: d51cf0ef msr s3_4_c15_c0_7, x15 + 26d8: d53cf0ef mrs x15, s3_4_c15_c0_7 + 26dc: d51cf10f msr s3_4_c15_c1_0, x15 + 26e0: d53cf10f mrs x15, s3_4_c15_c1_0 + 26e4: d51cf12f msr s3_4_c15_c1_1, x15 + 26e8: d53cf12f mrs x15, s3_4_c15_c1_1 + 26ec: d51cf14f msr s3_4_c15_c1_2, x15 + 26f0: d53cf14f mrs x15, s3_4_c15_c1_2 + 26f4: d51cf16f msr s3_4_c15_c1_3, x15 + 26f8: d53cf16f mrs x15, s3_4_c15_c1_3 + 26fc: d51cf18f msr s3_4_c15_c1_4, x15 + 2700: d53cf18f mrs x15, s3_4_c15_c1_4 + 2704: d51cf1af msr s3_4_c15_c1_5, x15 + 2708: d53cf1af mrs x15, s3_4_c15_c1_5 + 270c: d51cf1cf msr s3_4_c15_c1_6, x15 + 2710: d53cf1cf mrs x15, s3_4_c15_c1_6 + 2714: d51cf1ef msr s3_4_c15_c1_7, x15 + 2718: d53cf1ef mrs x15, s3_4_c15_c1_7 + 271c: d51cf20f msr s3_4_c15_c2_0, x15 + 2720: d53cf20f mrs x15, s3_4_c15_c2_0 + 2724: d51cf22f msr s3_4_c15_c2_1, x15 + 2728: d53cf22f mrs x15, s3_4_c15_c2_1 + 272c: d51cf24f msr s3_4_c15_c2_2, x15 + 2730: d53cf24f mrs x15, s3_4_c15_c2_2 + 2734: d51cf26f msr s3_4_c15_c2_3, x15 + 2738: d53cf26f mrs x15, s3_4_c15_c2_3 + 273c: d51cf28f msr s3_4_c15_c2_4, x15 + 2740: d53cf28f mrs x15, s3_4_c15_c2_4 + 2744: d51cf2af msr s3_4_c15_c2_5, x15 + 2748: d53cf2af mrs x15, s3_4_c15_c2_5 + 274c: d51cf2cf msr s3_4_c15_c2_6, x15 + 2750: d53cf2cf mrs x15, s3_4_c15_c2_6 + 2754: d51cf2ef msr s3_4_c15_c2_7, x15 + 2758: d53cf2ef mrs x15, s3_4_c15_c2_7 + 275c: d51cf30f msr s3_4_c15_c3_0, x15 + 2760: d53cf30f mrs x15, s3_4_c15_c3_0 + 2764: d51cf32f msr s3_4_c15_c3_1, x15 + 2768: d53cf32f mrs x15, s3_4_c15_c3_1 + 276c: d51cf34f msr s3_4_c15_c3_2, x15 + 2770: d53cf34f mrs x15, s3_4_c15_c3_2 + 2774: d51cf36f msr s3_4_c15_c3_3, x15 + 2778: d53cf36f mrs x15, s3_4_c15_c3_3 + 277c: d51cf38f msr s3_4_c15_c3_4, x15 + 2780: d53cf38f mrs x15, s3_4_c15_c3_4 + 2784: d51cf3af msr s3_4_c15_c3_5, x15 + 2788: d53cf3af mrs x15, s3_4_c15_c3_5 + 278c: d51cf3cf msr s3_4_c15_c3_6, x15 + 2790: d53cf3cf mrs x15, s3_4_c15_c3_6 + 2794: d51cf3ef msr s3_4_c15_c3_7, x15 + 2798: d53cf3ef mrs x15, s3_4_c15_c3_7 + 279c: d51cf40f msr s3_4_c15_c4_0, x15 + 27a0: d53cf40f mrs x15, s3_4_c15_c4_0 + 27a4: d51cf42f msr s3_4_c15_c4_1, x15 + 27a8: d53cf42f mrs x15, s3_4_c15_c4_1 + 27ac: d51cf44f msr s3_4_c15_c4_2, x15 + 27b0: d53cf44f mrs x15, s3_4_c15_c4_2 + 27b4: d51cf46f msr s3_4_c15_c4_3, x15 + 27b8: d53cf46f mrs x15, s3_4_c15_c4_3 + 27bc: d51cf48f msr s3_4_c15_c4_4, x15 + 27c0: d53cf48f mrs x15, s3_4_c15_c4_4 + 27c4: d51cf4af msr s3_4_c15_c4_5, x15 + 27c8: d53cf4af mrs x15, s3_4_c15_c4_5 + 27cc: d51cf4cf msr s3_4_c15_c4_6, x15 + 27d0: d53cf4cf mrs x15, s3_4_c15_c4_6 + 27d4: d51cf4ef msr s3_4_c15_c4_7, x15 + 27d8: d53cf4ef mrs x15, s3_4_c15_c4_7 + 27dc: d51cf50f msr s3_4_c15_c5_0, x15 + 27e0: d53cf50f mrs x15, s3_4_c15_c5_0 + 27e4: d51cf52f msr s3_4_c15_c5_1, x15 + 27e8: d53cf52f mrs x15, s3_4_c15_c5_1 + 27ec: d51cf54f msr s3_4_c15_c5_2, x15 + 27f0: d53cf54f mrs x15, s3_4_c15_c5_2 + 27f4: d51cf56f msr s3_4_c15_c5_3, x15 + 27f8: d53cf56f mrs x15, s3_4_c15_c5_3 + 27fc: d51cf58f msr s3_4_c15_c5_4, x15 + 2800: d53cf58f mrs x15, s3_4_c15_c5_4 + 2804: d51cf5af msr s3_4_c15_c5_5, x15 + 2808: d53cf5af mrs x15, s3_4_c15_c5_5 + 280c: d51cf5cf msr s3_4_c15_c5_6, x15 + 2810: d53cf5cf mrs x15, s3_4_c15_c5_6 + 2814: d51cf5ef msr s3_4_c15_c5_7, x15 + 2818: d53cf5ef mrs x15, s3_4_c15_c5_7 + 281c: d51cf60f msr s3_4_c15_c6_0, x15 + 2820: d53cf60f mrs x15, s3_4_c15_c6_0 + 2824: d51cf62f msr s3_4_c15_c6_1, x15 + 2828: d53cf62f mrs x15, s3_4_c15_c6_1 + 282c: d51cf64f msr s3_4_c15_c6_2, x15 + 2830: d53cf64f mrs x15, s3_4_c15_c6_2 + 2834: d51cf66f msr s3_4_c15_c6_3, x15 + 2838: d53cf66f mrs x15, s3_4_c15_c6_3 + 283c: d51cf68f msr s3_4_c15_c6_4, x15 + 2840: d53cf68f mrs x15, s3_4_c15_c6_4 + 2844: d51cf6af msr s3_4_c15_c6_5, x15 + 2848: d53cf6af mrs x15, s3_4_c15_c6_5 + 284c: d51cf6cf msr s3_4_c15_c6_6, x15 + 2850: d53cf6cf mrs x15, s3_4_c15_c6_6 + 2854: d51cf6ef msr s3_4_c15_c6_7, x15 + 2858: d53cf6ef mrs x15, s3_4_c15_c6_7 + 285c: d51cf70f msr s3_4_c15_c7_0, x15 + 2860: d53cf70f mrs x15, s3_4_c15_c7_0 + 2864: d51cf72f msr s3_4_c15_c7_1, x15 + 2868: d53cf72f mrs x15, s3_4_c15_c7_1 + 286c: d51cf74f msr s3_4_c15_c7_2, x15 + 2870: d53cf74f mrs x15, s3_4_c15_c7_2 + 2874: d51cf76f msr s3_4_c15_c7_3, x15 + 2878: d53cf76f mrs x15, s3_4_c15_c7_3 + 287c: d51cf78f msr s3_4_c15_c7_4, x15 + 2880: d53cf78f mrs x15, s3_4_c15_c7_4 + 2884: d51cf7af msr s3_4_c15_c7_5, x15 + 2888: d53cf7af mrs x15, s3_4_c15_c7_5 + 288c: d51cf7cf msr s3_4_c15_c7_6, x15 + 2890: d53cf7cf mrs x15, s3_4_c15_c7_6 + 2894: d51cf7ef msr s3_4_c15_c7_7, x15 + 2898: d53cf7ef mrs x15, s3_4_c15_c7_7 + 289c: d51cf80f msr s3_4_c15_c8_0, x15 + 28a0: d53cf80f mrs x15, s3_4_c15_c8_0 + 28a4: d51cf82f msr s3_4_c15_c8_1, x15 + 28a8: d53cf82f mrs x15, s3_4_c15_c8_1 + 28ac: d51cf84f msr s3_4_c15_c8_2, x15 + 28b0: d53cf84f mrs x15, s3_4_c15_c8_2 + 28b4: d51cf86f msr s3_4_c15_c8_3, x15 + 28b8: d53cf86f mrs x15, s3_4_c15_c8_3 + 28bc: d51cf88f msr s3_4_c15_c8_4, x15 + 28c0: d53cf88f mrs x15, s3_4_c15_c8_4 + 28c4: d51cf8af msr s3_4_c15_c8_5, x15 + 28c8: d53cf8af mrs x15, s3_4_c15_c8_5 + 28cc: d51cf8cf msr s3_4_c15_c8_6, x15 + 28d0: d53cf8cf mrs x15, s3_4_c15_c8_6 + 28d4: d51cf8ef msr s3_4_c15_c8_7, x15 + 28d8: d53cf8ef mrs x15, s3_4_c15_c8_7 + 28dc: d51cf90f msr s3_4_c15_c9_0, x15 + 28e0: d53cf90f mrs x15, s3_4_c15_c9_0 + 28e4: d51cf92f msr s3_4_c15_c9_1, x15 + 28e8: d53cf92f mrs x15, s3_4_c15_c9_1 + 28ec: d51cf94f msr s3_4_c15_c9_2, x15 + 28f0: d53cf94f mrs x15, s3_4_c15_c9_2 + 28f4: d51cf96f msr s3_4_c15_c9_3, x15 + 28f8: d53cf96f mrs x15, s3_4_c15_c9_3 + 28fc: d51cf98f msr s3_4_c15_c9_4, x15 + 2900: d53cf98f mrs x15, s3_4_c15_c9_4 + 2904: d51cf9af msr s3_4_c15_c9_5, x15 + 2908: d53cf9af mrs x15, s3_4_c15_c9_5 + 290c: d51cf9cf msr s3_4_c15_c9_6, x15 + 2910: d53cf9cf mrs x15, s3_4_c15_c9_6 + 2914: d51cf9ef msr s3_4_c15_c9_7, x15 + 2918: d53cf9ef mrs x15, s3_4_c15_c9_7 + 291c: d51cfa0f msr s3_4_c15_c10_0, x15 + 2920: d53cfa0f mrs x15, s3_4_c15_c10_0 + 2924: d51cfa2f msr s3_4_c15_c10_1, x15 + 2928: d53cfa2f mrs x15, s3_4_c15_c10_1 + 292c: d51cfa4f msr s3_4_c15_c10_2, x15 + 2930: d53cfa4f mrs x15, s3_4_c15_c10_2 + 2934: d51cfa6f msr s3_4_c15_c10_3, x15 + 2938: d53cfa6f mrs x15, s3_4_c15_c10_3 + 293c: d51cfa8f msr s3_4_c15_c10_4, x15 + 2940: d53cfa8f mrs x15, s3_4_c15_c10_4 + 2944: d51cfaaf msr s3_4_c15_c10_5, x15 + 2948: d53cfaaf mrs x15, s3_4_c15_c10_5 + 294c: d51cfacf msr s3_4_c15_c10_6, x15 + 2950: d53cfacf mrs x15, s3_4_c15_c10_6 + 2954: d51cfaef msr s3_4_c15_c10_7, x15 + 2958: d53cfaef mrs x15, s3_4_c15_c10_7 + 295c: d51cfb0f msr s3_4_c15_c11_0, x15 + 2960: d53cfb0f mrs x15, s3_4_c15_c11_0 + 2964: d51cfb2f msr s3_4_c15_c11_1, x15 + 2968: d53cfb2f mrs x15, s3_4_c15_c11_1 + 296c: d51cfb4f msr s3_4_c15_c11_2, x15 + 2970: d53cfb4f mrs x15, s3_4_c15_c11_2 + 2974: d51cfb6f msr s3_4_c15_c11_3, x15 + 2978: d53cfb6f mrs x15, s3_4_c15_c11_3 + 297c: d51cfb8f msr s3_4_c15_c11_4, x15 + 2980: d53cfb8f mrs x15, s3_4_c15_c11_4 + 2984: d51cfbaf msr s3_4_c15_c11_5, x15 + 2988: d53cfbaf mrs x15, s3_4_c15_c11_5 + 298c: d51cfbcf msr s3_4_c15_c11_6, x15 + 2990: d53cfbcf mrs x15, s3_4_c15_c11_6 + 2994: d51cfbef msr s3_4_c15_c11_7, x15 + 2998: d53cfbef mrs x15, s3_4_c15_c11_7 + 299c: d51cfc0f msr s3_4_c15_c12_0, x15 + 29a0: d53cfc0f mrs x15, s3_4_c15_c12_0 + 29a4: d51cfc2f msr s3_4_c15_c12_1, x15 + 29a8: d53cfc2f mrs x15, s3_4_c15_c12_1 + 29ac: d51cfc4f msr s3_4_c15_c12_2, x15 + 29b0: d53cfc4f mrs x15, s3_4_c15_c12_2 + 29b4: d51cfc6f msr s3_4_c15_c12_3, x15 + 29b8: d53cfc6f mrs x15, s3_4_c15_c12_3 + 29bc: d51cfc8f msr s3_4_c15_c12_4, x15 + 29c0: d53cfc8f mrs x15, s3_4_c15_c12_4 + 29c4: d51cfcaf msr s3_4_c15_c12_5, x15 + 29c8: d53cfcaf mrs x15, s3_4_c15_c12_5 + 29cc: d51cfccf msr s3_4_c15_c12_6, x15 + 29d0: d53cfccf mrs x15, s3_4_c15_c12_6 + 29d4: d51cfcef msr s3_4_c15_c12_7, x15 + 29d8: d53cfcef mrs x15, s3_4_c15_c12_7 + 29dc: d51cfd0f msr s3_4_c15_c13_0, x15 + 29e0: d53cfd0f mrs x15, s3_4_c15_c13_0 + 29e4: d51cfd2f msr s3_4_c15_c13_1, x15 + 29e8: d53cfd2f mrs x15, s3_4_c15_c13_1 + 29ec: d51cfd4f msr s3_4_c15_c13_2, x15 + 29f0: d53cfd4f mrs x15, s3_4_c15_c13_2 + 29f4: d51cfd6f msr s3_4_c15_c13_3, x15 + 29f8: d53cfd6f mrs x15, s3_4_c15_c13_3 + 29fc: d51cfd8f msr s3_4_c15_c13_4, x15 + 2a00: d53cfd8f mrs x15, s3_4_c15_c13_4 + 2a04: d51cfdaf msr s3_4_c15_c13_5, x15 + 2a08: d53cfdaf mrs x15, s3_4_c15_c13_5 + 2a0c: d51cfdcf msr s3_4_c15_c13_6, x15 + 2a10: d53cfdcf mrs x15, s3_4_c15_c13_6 + 2a14: d51cfdef msr s3_4_c15_c13_7, x15 + 2a18: d53cfdef mrs x15, s3_4_c15_c13_7 + 2a1c: d51cfe0f msr s3_4_c15_c14_0, x15 + 2a20: d53cfe0f mrs x15, s3_4_c15_c14_0 + 2a24: d51cfe2f msr s3_4_c15_c14_1, x15 + 2a28: d53cfe2f mrs x15, s3_4_c15_c14_1 + 2a2c: d51cfe4f msr s3_4_c15_c14_2, x15 + 2a30: d53cfe4f mrs x15, s3_4_c15_c14_2 + 2a34: d51cfe6f msr s3_4_c15_c14_3, x15 + 2a38: d53cfe6f mrs x15, s3_4_c15_c14_3 + 2a3c: d51cfe8f msr s3_4_c15_c14_4, x15 + 2a40: d53cfe8f mrs x15, s3_4_c15_c14_4 + 2a44: d51cfeaf msr s3_4_c15_c14_5, x15 + 2a48: d53cfeaf mrs x15, s3_4_c15_c14_5 + 2a4c: d51cfecf msr s3_4_c15_c14_6, x15 + 2a50: d53cfecf mrs x15, s3_4_c15_c14_6 + 2a54: d51cfeef msr s3_4_c15_c14_7, x15 + 2a58: d53cfeef mrs x15, s3_4_c15_c14_7 + 2a5c: d51cff0f msr s3_4_c15_c15_0, x15 + 2a60: d53cff0f mrs x15, s3_4_c15_c15_0 + 2a64: d51cff2f msr s3_4_c15_c15_1, x15 + 2a68: d53cff2f mrs x15, s3_4_c15_c15_1 + 2a6c: d51cff4f msr s3_4_c15_c15_2, x15 + 2a70: d53cff4f mrs x15, s3_4_c15_c15_2 + 2a74: d51cff6f msr s3_4_c15_c15_3, x15 + 2a78: d53cff6f mrs x15, s3_4_c15_c15_3 + 2a7c: d51cff8f msr s3_4_c15_c15_4, x15 + 2a80: d53cff8f mrs x15, s3_4_c15_c15_4 + 2a84: d51cffaf msr s3_4_c15_c15_5, x15 + 2a88: d53cffaf mrs x15, s3_4_c15_c15_5 + 2a8c: d51cffcf msr s3_4_c15_c15_6, x15 + 2a90: d53cffcf mrs x15, s3_4_c15_c15_6 + 2a94: d51cffef msr s3_4_c15_c15_7, x15 + 2a98: d53cffef mrs x15, s3_4_c15_c15_7 + 2a9c: d51db00f msr s3_5_c11_c0_0, x15 + 2aa0: d53db00f mrs x15, s3_5_c11_c0_0 + 2aa4: d51db02f msr s3_5_c11_c0_1, x15 + 2aa8: d53db02f mrs x15, s3_5_c11_c0_1 + 2aac: d51db04f msr s3_5_c11_c0_2, x15 + 2ab0: d53db04f mrs x15, s3_5_c11_c0_2 + 2ab4: d51db06f msr s3_5_c11_c0_3, x15 + 2ab8: d53db06f mrs x15, s3_5_c11_c0_3 + 2abc: d51db08f msr s3_5_c11_c0_4, x15 + 2ac0: d53db08f mrs x15, s3_5_c11_c0_4 + 2ac4: d51db0af msr s3_5_c11_c0_5, x15 + 2ac8: d53db0af mrs x15, s3_5_c11_c0_5 + 2acc: d51db0cf msr s3_5_c11_c0_6, x15 + 2ad0: d53db0cf mrs x15, s3_5_c11_c0_6 + 2ad4: d51db0ef msr s3_5_c11_c0_7, x15 + 2ad8: d53db0ef mrs x15, s3_5_c11_c0_7 + 2adc: d51db10f msr s3_5_c11_c1_0, x15 + 2ae0: d53db10f mrs x15, s3_5_c11_c1_0 + 2ae4: d51db12f msr s3_5_c11_c1_1, x15 + 2ae8: d53db12f mrs x15, s3_5_c11_c1_1 + 2aec: d51db14f msr s3_5_c11_c1_2, x15 + 2af0: d53db14f mrs x15, s3_5_c11_c1_2 + 2af4: d51db16f msr s3_5_c11_c1_3, x15 + 2af8: d53db16f mrs x15, s3_5_c11_c1_3 + 2afc: d51db18f msr s3_5_c11_c1_4, x15 + 2b00: d53db18f mrs x15, s3_5_c11_c1_4 + 2b04: d51db1af msr s3_5_c11_c1_5, x15 + 2b08: d53db1af mrs x15, s3_5_c11_c1_5 + 2b0c: d51db1cf msr s3_5_c11_c1_6, x15 + 2b10: d53db1cf mrs x15, s3_5_c11_c1_6 + 2b14: d51db1ef msr s3_5_c11_c1_7, x15 + 2b18: d53db1ef mrs x15, s3_5_c11_c1_7 + 2b1c: d51db20f msr s3_5_c11_c2_0, x15 + 2b20: d53db20f mrs x15, s3_5_c11_c2_0 + 2b24: d51db22f msr s3_5_c11_c2_1, x15 + 2b28: d53db22f mrs x15, s3_5_c11_c2_1 + 2b2c: d51db24f msr s3_5_c11_c2_2, x15 + 2b30: d53db24f mrs x15, s3_5_c11_c2_2 + 2b34: d51db26f msr s3_5_c11_c2_3, x15 + 2b38: d53db26f mrs x15, s3_5_c11_c2_3 + 2b3c: d51db28f msr s3_5_c11_c2_4, x15 + 2b40: d53db28f mrs x15, s3_5_c11_c2_4 + 2b44: d51db2af msr s3_5_c11_c2_5, x15 + 2b48: d53db2af mrs x15, s3_5_c11_c2_5 + 2b4c: d51db2cf msr s3_5_c11_c2_6, x15 + 2b50: d53db2cf mrs x15, s3_5_c11_c2_6 + 2b54: d51db2ef msr s3_5_c11_c2_7, x15 + 2b58: d53db2ef mrs x15, s3_5_c11_c2_7 + 2b5c: d51db30f msr s3_5_c11_c3_0, x15 + 2b60: d53db30f mrs x15, s3_5_c11_c3_0 + 2b64: d51db32f msr s3_5_c11_c3_1, x15 + 2b68: d53db32f mrs x15, s3_5_c11_c3_1 + 2b6c: d51db34f msr s3_5_c11_c3_2, x15 + 2b70: d53db34f mrs x15, s3_5_c11_c3_2 + 2b74: d51db36f msr s3_5_c11_c3_3, x15 + 2b78: d53db36f mrs x15, s3_5_c11_c3_3 + 2b7c: d51db38f msr s3_5_c11_c3_4, x15 + 2b80: d53db38f mrs x15, s3_5_c11_c3_4 + 2b84: d51db3af msr s3_5_c11_c3_5, x15 + 2b88: d53db3af mrs x15, s3_5_c11_c3_5 + 2b8c: d51db3cf msr s3_5_c11_c3_6, x15 + 2b90: d53db3cf mrs x15, s3_5_c11_c3_6 + 2b94: d51db3ef msr s3_5_c11_c3_7, x15 + 2b98: d53db3ef mrs x15, s3_5_c11_c3_7 + 2b9c: d51db40f msr s3_5_c11_c4_0, x15 + 2ba0: d53db40f mrs x15, s3_5_c11_c4_0 + 2ba4: d51db42f msr s3_5_c11_c4_1, x15 + 2ba8: d53db42f mrs x15, s3_5_c11_c4_1 + 2bac: d51db44f msr s3_5_c11_c4_2, x15 + 2bb0: d53db44f mrs x15, s3_5_c11_c4_2 + 2bb4: d51db46f msr s3_5_c11_c4_3, x15 + 2bb8: d53db46f mrs x15, s3_5_c11_c4_3 + 2bbc: d51db48f msr s3_5_c11_c4_4, x15 + 2bc0: d53db48f mrs x15, s3_5_c11_c4_4 + 2bc4: d51db4af msr s3_5_c11_c4_5, x15 + 2bc8: d53db4af mrs x15, s3_5_c11_c4_5 + 2bcc: d51db4cf msr s3_5_c11_c4_6, x15 + 2bd0: d53db4cf mrs x15, s3_5_c11_c4_6 + 2bd4: d51db4ef msr s3_5_c11_c4_7, x15 + 2bd8: d53db4ef mrs x15, s3_5_c11_c4_7 + 2bdc: d51db50f msr s3_5_c11_c5_0, x15 + 2be0: d53db50f mrs x15, s3_5_c11_c5_0 + 2be4: d51db52f msr s3_5_c11_c5_1, x15 + 2be8: d53db52f mrs x15, s3_5_c11_c5_1 + 2bec: d51db54f msr s3_5_c11_c5_2, x15 + 2bf0: d53db54f mrs x15, s3_5_c11_c5_2 + 2bf4: d51db56f msr s3_5_c11_c5_3, x15 + 2bf8: d53db56f mrs x15, s3_5_c11_c5_3 + 2bfc: d51db58f msr s3_5_c11_c5_4, x15 + 2c00: d53db58f mrs x15, s3_5_c11_c5_4 + 2c04: d51db5af msr s3_5_c11_c5_5, x15 + 2c08: d53db5af mrs x15, s3_5_c11_c5_5 + 2c0c: d51db5cf msr s3_5_c11_c5_6, x15 + 2c10: d53db5cf mrs x15, s3_5_c11_c5_6 + 2c14: d51db5ef msr s3_5_c11_c5_7, x15 + 2c18: d53db5ef mrs x15, s3_5_c11_c5_7 + 2c1c: d51db60f msr s3_5_c11_c6_0, x15 + 2c20: d53db60f mrs x15, s3_5_c11_c6_0 + 2c24: d51db62f msr s3_5_c11_c6_1, x15 + 2c28: d53db62f mrs x15, s3_5_c11_c6_1 + 2c2c: d51db64f msr s3_5_c11_c6_2, x15 + 2c30: d53db64f mrs x15, s3_5_c11_c6_2 + 2c34: d51db66f msr s3_5_c11_c6_3, x15 + 2c38: d53db66f mrs x15, s3_5_c11_c6_3 + 2c3c: d51db68f msr s3_5_c11_c6_4, x15 + 2c40: d53db68f mrs x15, s3_5_c11_c6_4 + 2c44: d51db6af msr s3_5_c11_c6_5, x15 + 2c48: d53db6af mrs x15, s3_5_c11_c6_5 + 2c4c: d51db6cf msr s3_5_c11_c6_6, x15 + 2c50: d53db6cf mrs x15, s3_5_c11_c6_6 + 2c54: d51db6ef msr s3_5_c11_c6_7, x15 + 2c58: d53db6ef mrs x15, s3_5_c11_c6_7 + 2c5c: d51db70f msr s3_5_c11_c7_0, x15 + 2c60: d53db70f mrs x15, s3_5_c11_c7_0 + 2c64: d51db72f msr s3_5_c11_c7_1, x15 + 2c68: d53db72f mrs x15, s3_5_c11_c7_1 + 2c6c: d51db74f msr s3_5_c11_c7_2, x15 + 2c70: d53db74f mrs x15, s3_5_c11_c7_2 + 2c74: d51db76f msr s3_5_c11_c7_3, x15 + 2c78: d53db76f mrs x15, s3_5_c11_c7_3 + 2c7c: d51db78f msr s3_5_c11_c7_4, x15 + 2c80: d53db78f mrs x15, s3_5_c11_c7_4 + 2c84: d51db7af msr s3_5_c11_c7_5, x15 + 2c88: d53db7af mrs x15, s3_5_c11_c7_5 + 2c8c: d51db7cf msr s3_5_c11_c7_6, x15 + 2c90: d53db7cf mrs x15, s3_5_c11_c7_6 + 2c94: d51db7ef msr s3_5_c11_c7_7, x15 + 2c98: d53db7ef mrs x15, s3_5_c11_c7_7 + 2c9c: d51db80f msr s3_5_c11_c8_0, x15 + 2ca0: d53db80f mrs x15, s3_5_c11_c8_0 + 2ca4: d51db82f msr s3_5_c11_c8_1, x15 + 2ca8: d53db82f mrs x15, s3_5_c11_c8_1 + 2cac: d51db84f msr s3_5_c11_c8_2, x15 + 2cb0: d53db84f mrs x15, s3_5_c11_c8_2 + 2cb4: d51db86f msr s3_5_c11_c8_3, x15 + 2cb8: d53db86f mrs x15, s3_5_c11_c8_3 + 2cbc: d51db88f msr s3_5_c11_c8_4, x15 + 2cc0: d53db88f mrs x15, s3_5_c11_c8_4 + 2cc4: d51db8af msr s3_5_c11_c8_5, x15 + 2cc8: d53db8af mrs x15, s3_5_c11_c8_5 + 2ccc: d51db8cf msr s3_5_c11_c8_6, x15 + 2cd0: d53db8cf mrs x15, s3_5_c11_c8_6 + 2cd4: d51db8ef msr s3_5_c11_c8_7, x15 + 2cd8: d53db8ef mrs x15, s3_5_c11_c8_7 + 2cdc: d51db90f msr s3_5_c11_c9_0, x15 + 2ce0: d53db90f mrs x15, s3_5_c11_c9_0 + 2ce4: d51db92f msr s3_5_c11_c9_1, x15 + 2ce8: d53db92f mrs x15, s3_5_c11_c9_1 + 2cec: d51db94f msr s3_5_c11_c9_2, x15 + 2cf0: d53db94f mrs x15, s3_5_c11_c9_2 + 2cf4: d51db96f msr s3_5_c11_c9_3, x15 + 2cf8: d53db96f mrs x15, s3_5_c11_c9_3 + 2cfc: d51db98f msr s3_5_c11_c9_4, x15 + 2d00: d53db98f mrs x15, s3_5_c11_c9_4 + 2d04: d51db9af msr s3_5_c11_c9_5, x15 + 2d08: d53db9af mrs x15, s3_5_c11_c9_5 + 2d0c: d51db9cf msr s3_5_c11_c9_6, x15 + 2d10: d53db9cf mrs x15, s3_5_c11_c9_6 + 2d14: d51db9ef msr s3_5_c11_c9_7, x15 + 2d18: d53db9ef mrs x15, s3_5_c11_c9_7 + 2d1c: d51dba0f msr s3_5_c11_c10_0, x15 + 2d20: d53dba0f mrs x15, s3_5_c11_c10_0 + 2d24: d51dba2f msr s3_5_c11_c10_1, x15 + 2d28: d53dba2f mrs x15, s3_5_c11_c10_1 + 2d2c: d51dba4f msr s3_5_c11_c10_2, x15 + 2d30: d53dba4f mrs x15, s3_5_c11_c10_2 + 2d34: d51dba6f msr s3_5_c11_c10_3, x15 + 2d38: d53dba6f mrs x15, s3_5_c11_c10_3 + 2d3c: d51dba8f msr s3_5_c11_c10_4, x15 + 2d40: d53dba8f mrs x15, s3_5_c11_c10_4 + 2d44: d51dbaaf msr s3_5_c11_c10_5, x15 + 2d48: d53dbaaf mrs x15, s3_5_c11_c10_5 + 2d4c: d51dbacf msr s3_5_c11_c10_6, x15 + 2d50: d53dbacf mrs x15, s3_5_c11_c10_6 + 2d54: d51dbaef msr s3_5_c11_c10_7, x15 + 2d58: d53dbaef mrs x15, s3_5_c11_c10_7 + 2d5c: d51dbb0f msr s3_5_c11_c11_0, x15 + 2d60: d53dbb0f mrs x15, s3_5_c11_c11_0 + 2d64: d51dbb2f msr s3_5_c11_c11_1, x15 + 2d68: d53dbb2f mrs x15, s3_5_c11_c11_1 + 2d6c: d51dbb4f msr s3_5_c11_c11_2, x15 + 2d70: d53dbb4f mrs x15, s3_5_c11_c11_2 + 2d74: d51dbb6f msr s3_5_c11_c11_3, x15 + 2d78: d53dbb6f mrs x15, s3_5_c11_c11_3 + 2d7c: d51dbb8f msr s3_5_c11_c11_4, x15 + 2d80: d53dbb8f mrs x15, s3_5_c11_c11_4 + 2d84: d51dbbaf msr s3_5_c11_c11_5, x15 + 2d88: d53dbbaf mrs x15, s3_5_c11_c11_5 + 2d8c: d51dbbcf msr s3_5_c11_c11_6, x15 + 2d90: d53dbbcf mrs x15, s3_5_c11_c11_6 + 2d94: d51dbbef msr s3_5_c11_c11_7, x15 + 2d98: d53dbbef mrs x15, s3_5_c11_c11_7 + 2d9c: d51dbc0f msr s3_5_c11_c12_0, x15 + 2da0: d53dbc0f mrs x15, s3_5_c11_c12_0 + 2da4: d51dbc2f msr s3_5_c11_c12_1, x15 + 2da8: d53dbc2f mrs x15, s3_5_c11_c12_1 + 2dac: d51dbc4f msr s3_5_c11_c12_2, x15 + 2db0: d53dbc4f mrs x15, s3_5_c11_c12_2 + 2db4: d51dbc6f msr s3_5_c11_c12_3, x15 + 2db8: d53dbc6f mrs x15, s3_5_c11_c12_3 + 2dbc: d51dbc8f msr s3_5_c11_c12_4, x15 + 2dc0: d53dbc8f mrs x15, s3_5_c11_c12_4 + 2dc4: d51dbcaf msr s3_5_c11_c12_5, x15 + 2dc8: d53dbcaf mrs x15, s3_5_c11_c12_5 + 2dcc: d51dbccf msr s3_5_c11_c12_6, x15 + 2dd0: d53dbccf mrs x15, s3_5_c11_c12_6 + 2dd4: d51dbcef msr s3_5_c11_c12_7, x15 + 2dd8: d53dbcef mrs x15, s3_5_c11_c12_7 + 2ddc: d51dbd0f msr s3_5_c11_c13_0, x15 + 2de0: d53dbd0f mrs x15, s3_5_c11_c13_0 + 2de4: d51dbd2f msr s3_5_c11_c13_1, x15 + 2de8: d53dbd2f mrs x15, s3_5_c11_c13_1 + 2dec: d51dbd4f msr s3_5_c11_c13_2, x15 + 2df0: d53dbd4f mrs x15, s3_5_c11_c13_2 + 2df4: d51dbd6f msr s3_5_c11_c13_3, x15 + 2df8: d53dbd6f mrs x15, s3_5_c11_c13_3 + 2dfc: d51dbd8f msr s3_5_c11_c13_4, x15 + 2e00: d53dbd8f mrs x15, s3_5_c11_c13_4 + 2e04: d51dbdaf msr s3_5_c11_c13_5, x15 + 2e08: d53dbdaf mrs x15, s3_5_c11_c13_5 + 2e0c: d51dbdcf msr s3_5_c11_c13_6, x15 + 2e10: d53dbdcf mrs x15, s3_5_c11_c13_6 + 2e14: d51dbdef msr s3_5_c11_c13_7, x15 + 2e18: d53dbdef mrs x15, s3_5_c11_c13_7 + 2e1c: d51dbe0f msr s3_5_c11_c14_0, x15 + 2e20: d53dbe0f mrs x15, s3_5_c11_c14_0 + 2e24: d51dbe2f msr s3_5_c11_c14_1, x15 + 2e28: d53dbe2f mrs x15, s3_5_c11_c14_1 + 2e2c: d51dbe4f msr s3_5_c11_c14_2, x15 + 2e30: d53dbe4f mrs x15, s3_5_c11_c14_2 + 2e34: d51dbe6f msr s3_5_c11_c14_3, x15 + 2e38: d53dbe6f mrs x15, s3_5_c11_c14_3 + 2e3c: d51dbe8f msr s3_5_c11_c14_4, x15 + 2e40: d53dbe8f mrs x15, s3_5_c11_c14_4 + 2e44: d51dbeaf msr s3_5_c11_c14_5, x15 + 2e48: d53dbeaf mrs x15, s3_5_c11_c14_5 + 2e4c: d51dbecf msr s3_5_c11_c14_6, x15 + 2e50: d53dbecf mrs x15, s3_5_c11_c14_6 + 2e54: d51dbeef msr s3_5_c11_c14_7, x15 + 2e58: d53dbeef mrs x15, s3_5_c11_c14_7 + 2e5c: d51dbf0f msr s3_5_c11_c15_0, x15 + 2e60: d53dbf0f mrs x15, s3_5_c11_c15_0 + 2e64: d51dbf2f msr s3_5_c11_c15_1, x15 + 2e68: d53dbf2f mrs x15, s3_5_c11_c15_1 + 2e6c: d51dbf4f msr s3_5_c11_c15_2, x15 + 2e70: d53dbf4f mrs x15, s3_5_c11_c15_2 + 2e74: d51dbf6f msr s3_5_c11_c15_3, x15 + 2e78: d53dbf6f mrs x15, s3_5_c11_c15_3 + 2e7c: d51dbf8f msr s3_5_c11_c15_4, x15 + 2e80: d53dbf8f mrs x15, s3_5_c11_c15_4 + 2e84: d51dbfaf msr s3_5_c11_c15_5, x15 + 2e88: d53dbfaf mrs x15, s3_5_c11_c15_5 + 2e8c: d51dbfcf msr s3_5_c11_c15_6, x15 + 2e90: d53dbfcf mrs x15, s3_5_c11_c15_6 + 2e94: d51dbfef msr s3_5_c11_c15_7, x15 + 2e98: d53dbfef mrs x15, s3_5_c11_c15_7 + 2e9c: d51df00f msr s3_5_c15_c0_0, x15 + 2ea0: d53df00f mrs x15, s3_5_c15_c0_0 + 2ea4: d51df02f msr s3_5_c15_c0_1, x15 + 2ea8: d53df02f mrs x15, s3_5_c15_c0_1 + 2eac: d51df04f msr s3_5_c15_c0_2, x15 + 2eb0: d53df04f mrs x15, s3_5_c15_c0_2 + 2eb4: d51df06f msr s3_5_c15_c0_3, x15 + 2eb8: d53df06f mrs x15, s3_5_c15_c0_3 + 2ebc: d51df08f msr s3_5_c15_c0_4, x15 + 2ec0: d53df08f mrs x15, s3_5_c15_c0_4 + 2ec4: d51df0af msr s3_5_c15_c0_5, x15 + 2ec8: d53df0af mrs x15, s3_5_c15_c0_5 + 2ecc: d51df0cf msr s3_5_c15_c0_6, x15 + 2ed0: d53df0cf mrs x15, s3_5_c15_c0_6 + 2ed4: d51df0ef msr s3_5_c15_c0_7, x15 + 2ed8: d53df0ef mrs x15, s3_5_c15_c0_7 + 2edc: d51df10f msr s3_5_c15_c1_0, x15 + 2ee0: d53df10f mrs x15, s3_5_c15_c1_0 + 2ee4: d51df12f msr s3_5_c15_c1_1, x15 + 2ee8: d53df12f mrs x15, s3_5_c15_c1_1 + 2eec: d51df14f msr s3_5_c15_c1_2, x15 + 2ef0: d53df14f mrs x15, s3_5_c15_c1_2 + 2ef4: d51df16f msr s3_5_c15_c1_3, x15 + 2ef8: d53df16f mrs x15, s3_5_c15_c1_3 + 2efc: d51df18f msr s3_5_c15_c1_4, x15 + 2f00: d53df18f mrs x15, s3_5_c15_c1_4 + 2f04: d51df1af msr s3_5_c15_c1_5, x15 + 2f08: d53df1af mrs x15, s3_5_c15_c1_5 + 2f0c: d51df1cf msr s3_5_c15_c1_6, x15 + 2f10: d53df1cf mrs x15, s3_5_c15_c1_6 + 2f14: d51df1ef msr s3_5_c15_c1_7, x15 + 2f18: d53df1ef mrs x15, s3_5_c15_c1_7 + 2f1c: d51df20f msr s3_5_c15_c2_0, x15 + 2f20: d53df20f mrs x15, s3_5_c15_c2_0 + 2f24: d51df22f msr s3_5_c15_c2_1, x15 + 2f28: d53df22f mrs x15, s3_5_c15_c2_1 + 2f2c: d51df24f msr s3_5_c15_c2_2, x15 + 2f30: d53df24f mrs x15, s3_5_c15_c2_2 + 2f34: d51df26f msr s3_5_c15_c2_3, x15 + 2f38: d53df26f mrs x15, s3_5_c15_c2_3 + 2f3c: d51df28f msr s3_5_c15_c2_4, x15 + 2f40: d53df28f mrs x15, s3_5_c15_c2_4 + 2f44: d51df2af msr s3_5_c15_c2_5, x15 + 2f48: d53df2af mrs x15, s3_5_c15_c2_5 + 2f4c: d51df2cf msr s3_5_c15_c2_6, x15 + 2f50: d53df2cf mrs x15, s3_5_c15_c2_6 + 2f54: d51df2ef msr s3_5_c15_c2_7, x15 + 2f58: d53df2ef mrs x15, s3_5_c15_c2_7 + 2f5c: d51df30f msr s3_5_c15_c3_0, x15 + 2f60: d53df30f mrs x15, s3_5_c15_c3_0 + 2f64: d51df32f msr s3_5_c15_c3_1, x15 + 2f68: d53df32f mrs x15, s3_5_c15_c3_1 + 2f6c: d51df34f msr s3_5_c15_c3_2, x15 + 2f70: d53df34f mrs x15, s3_5_c15_c3_2 + 2f74: d51df36f msr s3_5_c15_c3_3, x15 + 2f78: d53df36f mrs x15, s3_5_c15_c3_3 + 2f7c: d51df38f msr s3_5_c15_c3_4, x15 + 2f80: d53df38f mrs x15, s3_5_c15_c3_4 + 2f84: d51df3af msr s3_5_c15_c3_5, x15 + 2f88: d53df3af mrs x15, s3_5_c15_c3_5 + 2f8c: d51df3cf msr s3_5_c15_c3_6, x15 + 2f90: d53df3cf mrs x15, s3_5_c15_c3_6 + 2f94: d51df3ef msr s3_5_c15_c3_7, x15 + 2f98: d53df3ef mrs x15, s3_5_c15_c3_7 + 2f9c: d51df40f msr s3_5_c15_c4_0, x15 + 2fa0: d53df40f mrs x15, s3_5_c15_c4_0 + 2fa4: d51df42f msr s3_5_c15_c4_1, x15 + 2fa8: d53df42f mrs x15, s3_5_c15_c4_1 + 2fac: d51df44f msr s3_5_c15_c4_2, x15 + 2fb0: d53df44f mrs x15, s3_5_c15_c4_2 + 2fb4: d51df46f msr s3_5_c15_c4_3, x15 + 2fb8: d53df46f mrs x15, s3_5_c15_c4_3 + 2fbc: d51df48f msr s3_5_c15_c4_4, x15 + 2fc0: d53df48f mrs x15, s3_5_c15_c4_4 + 2fc4: d51df4af msr s3_5_c15_c4_5, x15 + 2fc8: d53df4af mrs x15, s3_5_c15_c4_5 + 2fcc: d51df4cf msr s3_5_c15_c4_6, x15 + 2fd0: d53df4cf mrs x15, s3_5_c15_c4_6 + 2fd4: d51df4ef msr s3_5_c15_c4_7, x15 + 2fd8: d53df4ef mrs x15, s3_5_c15_c4_7 + 2fdc: d51df50f msr s3_5_c15_c5_0, x15 + 2fe0: d53df50f mrs x15, s3_5_c15_c5_0 + 2fe4: d51df52f msr s3_5_c15_c5_1, x15 + 2fe8: d53df52f mrs x15, s3_5_c15_c5_1 + 2fec: d51df54f msr s3_5_c15_c5_2, x15 + 2ff0: d53df54f mrs x15, s3_5_c15_c5_2 + 2ff4: d51df56f msr s3_5_c15_c5_3, x15 + 2ff8: d53df56f mrs x15, s3_5_c15_c5_3 + 2ffc: d51df58f msr s3_5_c15_c5_4, x15 + 3000: d53df58f mrs x15, s3_5_c15_c5_4 + 3004: d51df5af msr s3_5_c15_c5_5, x15 + 3008: d53df5af mrs x15, s3_5_c15_c5_5 + 300c: d51df5cf msr s3_5_c15_c5_6, x15 + 3010: d53df5cf mrs x15, s3_5_c15_c5_6 + 3014: d51df5ef msr s3_5_c15_c5_7, x15 + 3018: d53df5ef mrs x15, s3_5_c15_c5_7 + 301c: d51df60f msr s3_5_c15_c6_0, x15 + 3020: d53df60f mrs x15, s3_5_c15_c6_0 + 3024: d51df62f msr s3_5_c15_c6_1, x15 + 3028: d53df62f mrs x15, s3_5_c15_c6_1 + 302c: d51df64f msr s3_5_c15_c6_2, x15 + 3030: d53df64f mrs x15, s3_5_c15_c6_2 + 3034: d51df66f msr s3_5_c15_c6_3, x15 + 3038: d53df66f mrs x15, s3_5_c15_c6_3 + 303c: d51df68f msr s3_5_c15_c6_4, x15 + 3040: d53df68f mrs x15, s3_5_c15_c6_4 + 3044: d51df6af msr s3_5_c15_c6_5, x15 + 3048: d53df6af mrs x15, s3_5_c15_c6_5 + 304c: d51df6cf msr s3_5_c15_c6_6, x15 + 3050: d53df6cf mrs x15, s3_5_c15_c6_6 + 3054: d51df6ef msr s3_5_c15_c6_7, x15 + 3058: d53df6ef mrs x15, s3_5_c15_c6_7 + 305c: d51df70f msr s3_5_c15_c7_0, x15 + 3060: d53df70f mrs x15, s3_5_c15_c7_0 + 3064: d51df72f msr s3_5_c15_c7_1, x15 + 3068: d53df72f mrs x15, s3_5_c15_c7_1 + 306c: d51df74f msr s3_5_c15_c7_2, x15 + 3070: d53df74f mrs x15, s3_5_c15_c7_2 + 3074: d51df76f msr s3_5_c15_c7_3, x15 + 3078: d53df76f mrs x15, s3_5_c15_c7_3 + 307c: d51df78f msr s3_5_c15_c7_4, x15 + 3080: d53df78f mrs x15, s3_5_c15_c7_4 + 3084: d51df7af msr s3_5_c15_c7_5, x15 + 3088: d53df7af mrs x15, s3_5_c15_c7_5 + 308c: d51df7cf msr s3_5_c15_c7_6, x15 + 3090: d53df7cf mrs x15, s3_5_c15_c7_6 + 3094: d51df7ef msr s3_5_c15_c7_7, x15 + 3098: d53df7ef mrs x15, s3_5_c15_c7_7 + 309c: d51df80f msr s3_5_c15_c8_0, x15 + 30a0: d53df80f mrs x15, s3_5_c15_c8_0 + 30a4: d51df82f msr s3_5_c15_c8_1, x15 + 30a8: d53df82f mrs x15, s3_5_c15_c8_1 + 30ac: d51df84f msr s3_5_c15_c8_2, x15 + 30b0: d53df84f mrs x15, s3_5_c15_c8_2 + 30b4: d51df86f msr s3_5_c15_c8_3, x15 + 30b8: d53df86f mrs x15, s3_5_c15_c8_3 + 30bc: d51df88f msr s3_5_c15_c8_4, x15 + 30c0: d53df88f mrs x15, s3_5_c15_c8_4 + 30c4: d51df8af msr s3_5_c15_c8_5, x15 + 30c8: d53df8af mrs x15, s3_5_c15_c8_5 + 30cc: d51df8cf msr s3_5_c15_c8_6, x15 + 30d0: d53df8cf mrs x15, s3_5_c15_c8_6 + 30d4: d51df8ef msr s3_5_c15_c8_7, x15 + 30d8: d53df8ef mrs x15, s3_5_c15_c8_7 + 30dc: d51df90f msr s3_5_c15_c9_0, x15 + 30e0: d53df90f mrs x15, s3_5_c15_c9_0 + 30e4: d51df92f msr s3_5_c15_c9_1, x15 + 30e8: d53df92f mrs x15, s3_5_c15_c9_1 + 30ec: d51df94f msr s3_5_c15_c9_2, x15 + 30f0: d53df94f mrs x15, s3_5_c15_c9_2 + 30f4: d51df96f msr s3_5_c15_c9_3, x15 + 30f8: d53df96f mrs x15, s3_5_c15_c9_3 + 30fc: d51df98f msr s3_5_c15_c9_4, x15 + 3100: d53df98f mrs x15, s3_5_c15_c9_4 + 3104: d51df9af msr s3_5_c15_c9_5, x15 + 3108: d53df9af mrs x15, s3_5_c15_c9_5 + 310c: d51df9cf msr s3_5_c15_c9_6, x15 + 3110: d53df9cf mrs x15, s3_5_c15_c9_6 + 3114: d51df9ef msr s3_5_c15_c9_7, x15 + 3118: d53df9ef mrs x15, s3_5_c15_c9_7 + 311c: d51dfa0f msr s3_5_c15_c10_0, x15 + 3120: d53dfa0f mrs x15, s3_5_c15_c10_0 + 3124: d51dfa2f msr s3_5_c15_c10_1, x15 + 3128: d53dfa2f mrs x15, s3_5_c15_c10_1 + 312c: d51dfa4f msr s3_5_c15_c10_2, x15 + 3130: d53dfa4f mrs x15, s3_5_c15_c10_2 + 3134: d51dfa6f msr s3_5_c15_c10_3, x15 + 3138: d53dfa6f mrs x15, s3_5_c15_c10_3 + 313c: d51dfa8f msr s3_5_c15_c10_4, x15 + 3140: d53dfa8f mrs x15, s3_5_c15_c10_4 + 3144: d51dfaaf msr s3_5_c15_c10_5, x15 + 3148: d53dfaaf mrs x15, s3_5_c15_c10_5 + 314c: d51dfacf msr s3_5_c15_c10_6, x15 + 3150: d53dfacf mrs x15, s3_5_c15_c10_6 + 3154: d51dfaef msr s3_5_c15_c10_7, x15 + 3158: d53dfaef mrs x15, s3_5_c15_c10_7 + 315c: d51dfb0f msr s3_5_c15_c11_0, x15 + 3160: d53dfb0f mrs x15, s3_5_c15_c11_0 + 3164: d51dfb2f msr s3_5_c15_c11_1, x15 + 3168: d53dfb2f mrs x15, s3_5_c15_c11_1 + 316c: d51dfb4f msr s3_5_c15_c11_2, x15 + 3170: d53dfb4f mrs x15, s3_5_c15_c11_2 + 3174: d51dfb6f msr s3_5_c15_c11_3, x15 + 3178: d53dfb6f mrs x15, s3_5_c15_c11_3 + 317c: d51dfb8f msr s3_5_c15_c11_4, x15 + 3180: d53dfb8f mrs x15, s3_5_c15_c11_4 + 3184: d51dfbaf msr s3_5_c15_c11_5, x15 + 3188: d53dfbaf mrs x15, s3_5_c15_c11_5 + 318c: d51dfbcf msr s3_5_c15_c11_6, x15 + 3190: d53dfbcf mrs x15, s3_5_c15_c11_6 + 3194: d51dfbef msr s3_5_c15_c11_7, x15 + 3198: d53dfbef mrs x15, s3_5_c15_c11_7 + 319c: d51dfc0f msr s3_5_c15_c12_0, x15 + 31a0: d53dfc0f mrs x15, s3_5_c15_c12_0 + 31a4: d51dfc2f msr s3_5_c15_c12_1, x15 + 31a8: d53dfc2f mrs x15, s3_5_c15_c12_1 + 31ac: d51dfc4f msr s3_5_c15_c12_2, x15 + 31b0: d53dfc4f mrs x15, s3_5_c15_c12_2 + 31b4: d51dfc6f msr s3_5_c15_c12_3, x15 + 31b8: d53dfc6f mrs x15, s3_5_c15_c12_3 + 31bc: d51dfc8f msr s3_5_c15_c12_4, x15 + 31c0: d53dfc8f mrs x15, s3_5_c15_c12_4 + 31c4: d51dfcaf msr s3_5_c15_c12_5, x15 + 31c8: d53dfcaf mrs x15, s3_5_c15_c12_5 + 31cc: d51dfccf msr s3_5_c15_c12_6, x15 + 31d0: d53dfccf mrs x15, s3_5_c15_c12_6 + 31d4: d51dfcef msr s3_5_c15_c12_7, x15 + 31d8: d53dfcef mrs x15, s3_5_c15_c12_7 + 31dc: d51dfd0f msr s3_5_c15_c13_0, x15 + 31e0: d53dfd0f mrs x15, s3_5_c15_c13_0 + 31e4: d51dfd2f msr s3_5_c15_c13_1, x15 + 31e8: d53dfd2f mrs x15, s3_5_c15_c13_1 + 31ec: d51dfd4f msr s3_5_c15_c13_2, x15 + 31f0: d53dfd4f mrs x15, s3_5_c15_c13_2 + 31f4: d51dfd6f msr s3_5_c15_c13_3, x15 + 31f8: d53dfd6f mrs x15, s3_5_c15_c13_3 + 31fc: d51dfd8f msr s3_5_c15_c13_4, x15 + 3200: d53dfd8f mrs x15, s3_5_c15_c13_4 + 3204: d51dfdaf msr s3_5_c15_c13_5, x15 + 3208: d53dfdaf mrs x15, s3_5_c15_c13_5 + 320c: d51dfdcf msr s3_5_c15_c13_6, x15 + 3210: d53dfdcf mrs x15, s3_5_c15_c13_6 + 3214: d51dfdef msr s3_5_c15_c13_7, x15 + 3218: d53dfdef mrs x15, s3_5_c15_c13_7 + 321c: d51dfe0f msr s3_5_c15_c14_0, x15 + 3220: d53dfe0f mrs x15, s3_5_c15_c14_0 + 3224: d51dfe2f msr s3_5_c15_c14_1, x15 + 3228: d53dfe2f mrs x15, s3_5_c15_c14_1 + 322c: d51dfe4f msr s3_5_c15_c14_2, x15 + 3230: d53dfe4f mrs x15, s3_5_c15_c14_2 + 3234: d51dfe6f msr s3_5_c15_c14_3, x15 + 3238: d53dfe6f mrs x15, s3_5_c15_c14_3 + 323c: d51dfe8f msr s3_5_c15_c14_4, x15 + 3240: d53dfe8f mrs x15, s3_5_c15_c14_4 + 3244: d51dfeaf msr s3_5_c15_c14_5, x15 + 3248: d53dfeaf mrs x15, s3_5_c15_c14_5 + 324c: d51dfecf msr s3_5_c15_c14_6, x15 + 3250: d53dfecf mrs x15, s3_5_c15_c14_6 + 3254: d51dfeef msr s3_5_c15_c14_7, x15 + 3258: d53dfeef mrs x15, s3_5_c15_c14_7 + 325c: d51dff0f msr s3_5_c15_c15_0, x15 + 3260: d53dff0f mrs x15, s3_5_c15_c15_0 + 3264: d51dff2f msr s3_5_c15_c15_1, x15 + 3268: d53dff2f mrs x15, s3_5_c15_c15_1 + 326c: d51dff4f msr s3_5_c15_c15_2, x15 + 3270: d53dff4f mrs x15, s3_5_c15_c15_2 + 3274: d51dff6f msr s3_5_c15_c15_3, x15 + 3278: d53dff6f mrs x15, s3_5_c15_c15_3 + 327c: d51dff8f msr s3_5_c15_c15_4, x15 + 3280: d53dff8f mrs x15, s3_5_c15_c15_4 + 3284: d51dffaf msr s3_5_c15_c15_5, x15 + 3288: d53dffaf mrs x15, s3_5_c15_c15_5 + 328c: d51dffcf msr s3_5_c15_c15_6, x15 + 3290: d53dffcf mrs x15, s3_5_c15_c15_6 + 3294: d51dffef msr s3_5_c15_c15_7, x15 + 3298: d53dffef mrs x15, s3_5_c15_c15_7 + 329c: d51eb00f msr s3_6_c11_c0_0, x15 + 32a0: d53eb00f mrs x15, s3_6_c11_c0_0 + 32a4: d51eb02f msr s3_6_c11_c0_1, x15 + 32a8: d53eb02f mrs x15, s3_6_c11_c0_1 + 32ac: d51eb04f msr s3_6_c11_c0_2, x15 + 32b0: d53eb04f mrs x15, s3_6_c11_c0_2 + 32b4: d51eb06f msr s3_6_c11_c0_3, x15 + 32b8: d53eb06f mrs x15, s3_6_c11_c0_3 + 32bc: d51eb08f msr s3_6_c11_c0_4, x15 + 32c0: d53eb08f mrs x15, s3_6_c11_c0_4 + 32c4: d51eb0af msr s3_6_c11_c0_5, x15 + 32c8: d53eb0af mrs x15, s3_6_c11_c0_5 + 32cc: d51eb0cf msr s3_6_c11_c0_6, x15 + 32d0: d53eb0cf mrs x15, s3_6_c11_c0_6 + 32d4: d51eb0ef msr s3_6_c11_c0_7, x15 + 32d8: d53eb0ef mrs x15, s3_6_c11_c0_7 + 32dc: d51eb10f msr s3_6_c11_c1_0, x15 + 32e0: d53eb10f mrs x15, s3_6_c11_c1_0 + 32e4: d51eb12f msr s3_6_c11_c1_1, x15 + 32e8: d53eb12f mrs x15, s3_6_c11_c1_1 + 32ec: d51eb14f msr s3_6_c11_c1_2, x15 + 32f0: d53eb14f mrs x15, s3_6_c11_c1_2 + 32f4: d51eb16f msr s3_6_c11_c1_3, x15 + 32f8: d53eb16f mrs x15, s3_6_c11_c1_3 + 32fc: d51eb18f msr s3_6_c11_c1_4, x15 + 3300: d53eb18f mrs x15, s3_6_c11_c1_4 + 3304: d51eb1af msr s3_6_c11_c1_5, x15 + 3308: d53eb1af mrs x15, s3_6_c11_c1_5 + 330c: d51eb1cf msr s3_6_c11_c1_6, x15 + 3310: d53eb1cf mrs x15, s3_6_c11_c1_6 + 3314: d51eb1ef msr s3_6_c11_c1_7, x15 + 3318: d53eb1ef mrs x15, s3_6_c11_c1_7 + 331c: d51eb20f msr s3_6_c11_c2_0, x15 + 3320: d53eb20f mrs x15, s3_6_c11_c2_0 + 3324: d51eb22f msr s3_6_c11_c2_1, x15 + 3328: d53eb22f mrs x15, s3_6_c11_c2_1 + 332c: d51eb24f msr s3_6_c11_c2_2, x15 + 3330: d53eb24f mrs x15, s3_6_c11_c2_2 + 3334: d51eb26f msr s3_6_c11_c2_3, x15 + 3338: d53eb26f mrs x15, s3_6_c11_c2_3 + 333c: d51eb28f msr s3_6_c11_c2_4, x15 + 3340: d53eb28f mrs x15, s3_6_c11_c2_4 + 3344: d51eb2af msr s3_6_c11_c2_5, x15 + 3348: d53eb2af mrs x15, s3_6_c11_c2_5 + 334c: d51eb2cf msr s3_6_c11_c2_6, x15 + 3350: d53eb2cf mrs x15, s3_6_c11_c2_6 + 3354: d51eb2ef msr s3_6_c11_c2_7, x15 + 3358: d53eb2ef mrs x15, s3_6_c11_c2_7 + 335c: d51eb30f msr s3_6_c11_c3_0, x15 + 3360: d53eb30f mrs x15, s3_6_c11_c3_0 + 3364: d51eb32f msr s3_6_c11_c3_1, x15 + 3368: d53eb32f mrs x15, s3_6_c11_c3_1 + 336c: d51eb34f msr s3_6_c11_c3_2, x15 + 3370: d53eb34f mrs x15, s3_6_c11_c3_2 + 3374: d51eb36f msr s3_6_c11_c3_3, x15 + 3378: d53eb36f mrs x15, s3_6_c11_c3_3 + 337c: d51eb38f msr s3_6_c11_c3_4, x15 + 3380: d53eb38f mrs x15, s3_6_c11_c3_4 + 3384: d51eb3af msr s3_6_c11_c3_5, x15 + 3388: d53eb3af mrs x15, s3_6_c11_c3_5 + 338c: d51eb3cf msr s3_6_c11_c3_6, x15 + 3390: d53eb3cf mrs x15, s3_6_c11_c3_6 + 3394: d51eb3ef msr s3_6_c11_c3_7, x15 + 3398: d53eb3ef mrs x15, s3_6_c11_c3_7 + 339c: d51eb40f msr s3_6_c11_c4_0, x15 + 33a0: d53eb40f mrs x15, s3_6_c11_c4_0 + 33a4: d51eb42f msr s3_6_c11_c4_1, x15 + 33a8: d53eb42f mrs x15, s3_6_c11_c4_1 + 33ac: d51eb44f msr s3_6_c11_c4_2, x15 + 33b0: d53eb44f mrs x15, s3_6_c11_c4_2 + 33b4: d51eb46f msr s3_6_c11_c4_3, x15 + 33b8: d53eb46f mrs x15, s3_6_c11_c4_3 + 33bc: d51eb48f msr s3_6_c11_c4_4, x15 + 33c0: d53eb48f mrs x15, s3_6_c11_c4_4 + 33c4: d51eb4af msr s3_6_c11_c4_5, x15 + 33c8: d53eb4af mrs x15, s3_6_c11_c4_5 + 33cc: d51eb4cf msr s3_6_c11_c4_6, x15 + 33d0: d53eb4cf mrs x15, s3_6_c11_c4_6 + 33d4: d51eb4ef msr s3_6_c11_c4_7, x15 + 33d8: d53eb4ef mrs x15, s3_6_c11_c4_7 + 33dc: d51eb50f msr s3_6_c11_c5_0, x15 + 33e0: d53eb50f mrs x15, s3_6_c11_c5_0 + 33e4: d51eb52f msr s3_6_c11_c5_1, x15 + 33e8: d53eb52f mrs x15, s3_6_c11_c5_1 + 33ec: d51eb54f msr s3_6_c11_c5_2, x15 + 33f0: d53eb54f mrs x15, s3_6_c11_c5_2 + 33f4: d51eb56f msr s3_6_c11_c5_3, x15 + 33f8: d53eb56f mrs x15, s3_6_c11_c5_3 + 33fc: d51eb58f msr s3_6_c11_c5_4, x15 + 3400: d53eb58f mrs x15, s3_6_c11_c5_4 + 3404: d51eb5af msr s3_6_c11_c5_5, x15 + 3408: d53eb5af mrs x15, s3_6_c11_c5_5 + 340c: d51eb5cf msr s3_6_c11_c5_6, x15 + 3410: d53eb5cf mrs x15, s3_6_c11_c5_6 + 3414: d51eb5ef msr s3_6_c11_c5_7, x15 + 3418: d53eb5ef mrs x15, s3_6_c11_c5_7 + 341c: d51eb60f msr s3_6_c11_c6_0, x15 + 3420: d53eb60f mrs x15, s3_6_c11_c6_0 + 3424: d51eb62f msr s3_6_c11_c6_1, x15 + 3428: d53eb62f mrs x15, s3_6_c11_c6_1 + 342c: d51eb64f msr s3_6_c11_c6_2, x15 + 3430: d53eb64f mrs x15, s3_6_c11_c6_2 + 3434: d51eb66f msr s3_6_c11_c6_3, x15 + 3438: d53eb66f mrs x15, s3_6_c11_c6_3 + 343c: d51eb68f msr s3_6_c11_c6_4, x15 + 3440: d53eb68f mrs x15, s3_6_c11_c6_4 + 3444: d51eb6af msr s3_6_c11_c6_5, x15 + 3448: d53eb6af mrs x15, s3_6_c11_c6_5 + 344c: d51eb6cf msr s3_6_c11_c6_6, x15 + 3450: d53eb6cf mrs x15, s3_6_c11_c6_6 + 3454: d51eb6ef msr s3_6_c11_c6_7, x15 + 3458: d53eb6ef mrs x15, s3_6_c11_c6_7 + 345c: d51eb70f msr s3_6_c11_c7_0, x15 + 3460: d53eb70f mrs x15, s3_6_c11_c7_0 + 3464: d51eb72f msr s3_6_c11_c7_1, x15 + 3468: d53eb72f mrs x15, s3_6_c11_c7_1 + 346c: d51eb74f msr s3_6_c11_c7_2, x15 + 3470: d53eb74f mrs x15, s3_6_c11_c7_2 + 3474: d51eb76f msr s3_6_c11_c7_3, x15 + 3478: d53eb76f mrs x15, s3_6_c11_c7_3 + 347c: d51eb78f msr s3_6_c11_c7_4, x15 + 3480: d53eb78f mrs x15, s3_6_c11_c7_4 + 3484: d51eb7af msr s3_6_c11_c7_5, x15 + 3488: d53eb7af mrs x15, s3_6_c11_c7_5 + 348c: d51eb7cf msr s3_6_c11_c7_6, x15 + 3490: d53eb7cf mrs x15, s3_6_c11_c7_6 + 3494: d51eb7ef msr s3_6_c11_c7_7, x15 + 3498: d53eb7ef mrs x15, s3_6_c11_c7_7 + 349c: d51eb80f msr s3_6_c11_c8_0, x15 + 34a0: d53eb80f mrs x15, s3_6_c11_c8_0 + 34a4: d51eb82f msr s3_6_c11_c8_1, x15 + 34a8: d53eb82f mrs x15, s3_6_c11_c8_1 + 34ac: d51eb84f msr s3_6_c11_c8_2, x15 + 34b0: d53eb84f mrs x15, s3_6_c11_c8_2 + 34b4: d51eb86f msr s3_6_c11_c8_3, x15 + 34b8: d53eb86f mrs x15, s3_6_c11_c8_3 + 34bc: d51eb88f msr s3_6_c11_c8_4, x15 + 34c0: d53eb88f mrs x15, s3_6_c11_c8_4 + 34c4: d51eb8af msr s3_6_c11_c8_5, x15 + 34c8: d53eb8af mrs x15, s3_6_c11_c8_5 + 34cc: d51eb8cf msr s3_6_c11_c8_6, x15 + 34d0: d53eb8cf mrs x15, s3_6_c11_c8_6 + 34d4: d51eb8ef msr s3_6_c11_c8_7, x15 + 34d8: d53eb8ef mrs x15, s3_6_c11_c8_7 + 34dc: d51eb90f msr s3_6_c11_c9_0, x15 + 34e0: d53eb90f mrs x15, s3_6_c11_c9_0 + 34e4: d51eb92f msr s3_6_c11_c9_1, x15 + 34e8: d53eb92f mrs x15, s3_6_c11_c9_1 + 34ec: d51eb94f msr s3_6_c11_c9_2, x15 + 34f0: d53eb94f mrs x15, s3_6_c11_c9_2 + 34f4: d51eb96f msr s3_6_c11_c9_3, x15 + 34f8: d53eb96f mrs x15, s3_6_c11_c9_3 + 34fc: d51eb98f msr s3_6_c11_c9_4, x15 + 3500: d53eb98f mrs x15, s3_6_c11_c9_4 + 3504: d51eb9af msr s3_6_c11_c9_5, x15 + 3508: d53eb9af mrs x15, s3_6_c11_c9_5 + 350c: d51eb9cf msr s3_6_c11_c9_6, x15 + 3510: d53eb9cf mrs x15, s3_6_c11_c9_6 + 3514: d51eb9ef msr s3_6_c11_c9_7, x15 + 3518: d53eb9ef mrs x15, s3_6_c11_c9_7 + 351c: d51eba0f msr s3_6_c11_c10_0, x15 + 3520: d53eba0f mrs x15, s3_6_c11_c10_0 + 3524: d51eba2f msr s3_6_c11_c10_1, x15 + 3528: d53eba2f mrs x15, s3_6_c11_c10_1 + 352c: d51eba4f msr s3_6_c11_c10_2, x15 + 3530: d53eba4f mrs x15, s3_6_c11_c10_2 + 3534: d51eba6f msr s3_6_c11_c10_3, x15 + 3538: d53eba6f mrs x15, s3_6_c11_c10_3 + 353c: d51eba8f msr s3_6_c11_c10_4, x15 + 3540: d53eba8f mrs x15, s3_6_c11_c10_4 + 3544: d51ebaaf msr s3_6_c11_c10_5, x15 + 3548: d53ebaaf mrs x15, s3_6_c11_c10_5 + 354c: d51ebacf msr s3_6_c11_c10_6, x15 + 3550: d53ebacf mrs x15, s3_6_c11_c10_6 + 3554: d51ebaef msr s3_6_c11_c10_7, x15 + 3558: d53ebaef mrs x15, s3_6_c11_c10_7 + 355c: d51ebb0f msr s3_6_c11_c11_0, x15 + 3560: d53ebb0f mrs x15, s3_6_c11_c11_0 + 3564: d51ebb2f msr s3_6_c11_c11_1, x15 + 3568: d53ebb2f mrs x15, s3_6_c11_c11_1 + 356c: d51ebb4f msr s3_6_c11_c11_2, x15 + 3570: d53ebb4f mrs x15, s3_6_c11_c11_2 + 3574: d51ebb6f msr s3_6_c11_c11_3, x15 + 3578: d53ebb6f mrs x15, s3_6_c11_c11_3 + 357c: d51ebb8f msr s3_6_c11_c11_4, x15 + 3580: d53ebb8f mrs x15, s3_6_c11_c11_4 + 3584: d51ebbaf msr s3_6_c11_c11_5, x15 + 3588: d53ebbaf mrs x15, s3_6_c11_c11_5 + 358c: d51ebbcf msr s3_6_c11_c11_6, x15 + 3590: d53ebbcf mrs x15, s3_6_c11_c11_6 + 3594: d51ebbef msr s3_6_c11_c11_7, x15 + 3598: d53ebbef mrs x15, s3_6_c11_c11_7 + 359c: d51ebc0f msr s3_6_c11_c12_0, x15 + 35a0: d53ebc0f mrs x15, s3_6_c11_c12_0 + 35a4: d51ebc2f msr s3_6_c11_c12_1, x15 + 35a8: d53ebc2f mrs x15, s3_6_c11_c12_1 + 35ac: d51ebc4f msr s3_6_c11_c12_2, x15 + 35b0: d53ebc4f mrs x15, s3_6_c11_c12_2 + 35b4: d51ebc6f msr s3_6_c11_c12_3, x15 + 35b8: d53ebc6f mrs x15, s3_6_c11_c12_3 + 35bc: d51ebc8f msr s3_6_c11_c12_4, x15 + 35c0: d53ebc8f mrs x15, s3_6_c11_c12_4 + 35c4: d51ebcaf msr s3_6_c11_c12_5, x15 + 35c8: d53ebcaf mrs x15, s3_6_c11_c12_5 + 35cc: d51ebccf msr s3_6_c11_c12_6, x15 + 35d0: d53ebccf mrs x15, s3_6_c11_c12_6 + 35d4: d51ebcef msr s3_6_c11_c12_7, x15 + 35d8: d53ebcef mrs x15, s3_6_c11_c12_7 + 35dc: d51ebd0f msr s3_6_c11_c13_0, x15 + 35e0: d53ebd0f mrs x15, s3_6_c11_c13_0 + 35e4: d51ebd2f msr s3_6_c11_c13_1, x15 + 35e8: d53ebd2f mrs x15, s3_6_c11_c13_1 + 35ec: d51ebd4f msr s3_6_c11_c13_2, x15 + 35f0: d53ebd4f mrs x15, s3_6_c11_c13_2 + 35f4: d51ebd6f msr s3_6_c11_c13_3, x15 + 35f8: d53ebd6f mrs x15, s3_6_c11_c13_3 + 35fc: d51ebd8f msr s3_6_c11_c13_4, x15 + 3600: d53ebd8f mrs x15, s3_6_c11_c13_4 + 3604: d51ebdaf msr s3_6_c11_c13_5, x15 + 3608: d53ebdaf mrs x15, s3_6_c11_c13_5 + 360c: d51ebdcf msr s3_6_c11_c13_6, x15 + 3610: d53ebdcf mrs x15, s3_6_c11_c13_6 + 3614: d51ebdef msr s3_6_c11_c13_7, x15 + 3618: d53ebdef mrs x15, s3_6_c11_c13_7 + 361c: d51ebe0f msr s3_6_c11_c14_0, x15 + 3620: d53ebe0f mrs x15, s3_6_c11_c14_0 + 3624: d51ebe2f msr s3_6_c11_c14_1, x15 + 3628: d53ebe2f mrs x15, s3_6_c11_c14_1 + 362c: d51ebe4f msr s3_6_c11_c14_2, x15 + 3630: d53ebe4f mrs x15, s3_6_c11_c14_2 + 3634: d51ebe6f msr s3_6_c11_c14_3, x15 + 3638: d53ebe6f mrs x15, s3_6_c11_c14_3 + 363c: d51ebe8f msr s3_6_c11_c14_4, x15 + 3640: d53ebe8f mrs x15, s3_6_c11_c14_4 + 3644: d51ebeaf msr s3_6_c11_c14_5, x15 + 3648: d53ebeaf mrs x15, s3_6_c11_c14_5 + 364c: d51ebecf msr s3_6_c11_c14_6, x15 + 3650: d53ebecf mrs x15, s3_6_c11_c14_6 + 3654: d51ebeef msr s3_6_c11_c14_7, x15 + 3658: d53ebeef mrs x15, s3_6_c11_c14_7 + 365c: d51ebf0f msr s3_6_c11_c15_0, x15 + 3660: d53ebf0f mrs x15, s3_6_c11_c15_0 + 3664: d51ebf2f msr s3_6_c11_c15_1, x15 + 3668: d53ebf2f mrs x15, s3_6_c11_c15_1 + 366c: d51ebf4f msr s3_6_c11_c15_2, x15 + 3670: d53ebf4f mrs x15, s3_6_c11_c15_2 + 3674: d51ebf6f msr s3_6_c11_c15_3, x15 + 3678: d53ebf6f mrs x15, s3_6_c11_c15_3 + 367c: d51ebf8f msr s3_6_c11_c15_4, x15 + 3680: d53ebf8f mrs x15, s3_6_c11_c15_4 + 3684: d51ebfaf msr s3_6_c11_c15_5, x15 + 3688: d53ebfaf mrs x15, s3_6_c11_c15_5 + 368c: d51ebfcf msr s3_6_c11_c15_6, x15 + 3690: d53ebfcf mrs x15, s3_6_c11_c15_6 + 3694: d51ebfef msr s3_6_c11_c15_7, x15 + 3698: d53ebfef mrs x15, s3_6_c11_c15_7 + 369c: d51ef00f msr s3_6_c15_c0_0, x15 + 36a0: d53ef00f mrs x15, s3_6_c15_c0_0 + 36a4: d51ef02f msr s3_6_c15_c0_1, x15 + 36a8: d53ef02f mrs x15, s3_6_c15_c0_1 + 36ac: d51ef04f msr s3_6_c15_c0_2, x15 + 36b0: d53ef04f mrs x15, s3_6_c15_c0_2 + 36b4: d51ef06f msr s3_6_c15_c0_3, x15 + 36b8: d53ef06f mrs x15, s3_6_c15_c0_3 + 36bc: d51ef08f msr s3_6_c15_c0_4, x15 + 36c0: d53ef08f mrs x15, s3_6_c15_c0_4 + 36c4: d51ef0af msr s3_6_c15_c0_5, x15 + 36c8: d53ef0af mrs x15, s3_6_c15_c0_5 + 36cc: d51ef0cf msr s3_6_c15_c0_6, x15 + 36d0: d53ef0cf mrs x15, s3_6_c15_c0_6 + 36d4: d51ef0ef msr s3_6_c15_c0_7, x15 + 36d8: d53ef0ef mrs x15, s3_6_c15_c0_7 + 36dc: d51ef10f msr s3_6_c15_c1_0, x15 + 36e0: d53ef10f mrs x15, s3_6_c15_c1_0 + 36e4: d51ef12f msr s3_6_c15_c1_1, x15 + 36e8: d53ef12f mrs x15, s3_6_c15_c1_1 + 36ec: d51ef14f msr s3_6_c15_c1_2, x15 + 36f0: d53ef14f mrs x15, s3_6_c15_c1_2 + 36f4: d51ef16f msr s3_6_c15_c1_3, x15 + 36f8: d53ef16f mrs x15, s3_6_c15_c1_3 + 36fc: d51ef18f msr s3_6_c15_c1_4, x15 + 3700: d53ef18f mrs x15, s3_6_c15_c1_4 + 3704: d51ef1af msr s3_6_c15_c1_5, x15 + 3708: d53ef1af mrs x15, s3_6_c15_c1_5 + 370c: d51ef1cf msr s3_6_c15_c1_6, x15 + 3710: d53ef1cf mrs x15, s3_6_c15_c1_6 + 3714: d51ef1ef msr s3_6_c15_c1_7, x15 + 3718: d53ef1ef mrs x15, s3_6_c15_c1_7 + 371c: d51ef20f msr s3_6_c15_c2_0, x15 + 3720: d53ef20f mrs x15, s3_6_c15_c2_0 + 3724: d51ef22f msr s3_6_c15_c2_1, x15 + 3728: d53ef22f mrs x15, s3_6_c15_c2_1 + 372c: d51ef24f msr s3_6_c15_c2_2, x15 + 3730: d53ef24f mrs x15, s3_6_c15_c2_2 + 3734: d51ef26f msr s3_6_c15_c2_3, x15 + 3738: d53ef26f mrs x15, s3_6_c15_c2_3 + 373c: d51ef28f msr s3_6_c15_c2_4, x15 + 3740: d53ef28f mrs x15, s3_6_c15_c2_4 + 3744: d51ef2af msr s3_6_c15_c2_5, x15 + 3748: d53ef2af mrs x15, s3_6_c15_c2_5 + 374c: d51ef2cf msr s3_6_c15_c2_6, x15 + 3750: d53ef2cf mrs x15, s3_6_c15_c2_6 + 3754: d51ef2ef msr s3_6_c15_c2_7, x15 + 3758: d53ef2ef mrs x15, s3_6_c15_c2_7 + 375c: d51ef30f msr s3_6_c15_c3_0, x15 + 3760: d53ef30f mrs x15, s3_6_c15_c3_0 + 3764: d51ef32f msr s3_6_c15_c3_1, x15 + 3768: d53ef32f mrs x15, s3_6_c15_c3_1 + 376c: d51ef34f msr s3_6_c15_c3_2, x15 + 3770: d53ef34f mrs x15, s3_6_c15_c3_2 + 3774: d51ef36f msr s3_6_c15_c3_3, x15 + 3778: d53ef36f mrs x15, s3_6_c15_c3_3 + 377c: d51ef38f msr s3_6_c15_c3_4, x15 + 3780: d53ef38f mrs x15, s3_6_c15_c3_4 + 3784: d51ef3af msr s3_6_c15_c3_5, x15 + 3788: d53ef3af mrs x15, s3_6_c15_c3_5 + 378c: d51ef3cf msr s3_6_c15_c3_6, x15 + 3790: d53ef3cf mrs x15, s3_6_c15_c3_6 + 3794: d51ef3ef msr s3_6_c15_c3_7, x15 + 3798: d53ef3ef mrs x15, s3_6_c15_c3_7 + 379c: d51ef40f msr s3_6_c15_c4_0, x15 + 37a0: d53ef40f mrs x15, s3_6_c15_c4_0 + 37a4: d51ef42f msr s3_6_c15_c4_1, x15 + 37a8: d53ef42f mrs x15, s3_6_c15_c4_1 + 37ac: d51ef44f msr s3_6_c15_c4_2, x15 + 37b0: d53ef44f mrs x15, s3_6_c15_c4_2 + 37b4: d51ef46f msr s3_6_c15_c4_3, x15 + 37b8: d53ef46f mrs x15, s3_6_c15_c4_3 + 37bc: d51ef48f msr s3_6_c15_c4_4, x15 + 37c0: d53ef48f mrs x15, s3_6_c15_c4_4 + 37c4: d51ef4af msr s3_6_c15_c4_5, x15 + 37c8: d53ef4af mrs x15, s3_6_c15_c4_5 + 37cc: d51ef4cf msr s3_6_c15_c4_6, x15 + 37d0: d53ef4cf mrs x15, s3_6_c15_c4_6 + 37d4: d51ef4ef msr s3_6_c15_c4_7, x15 + 37d8: d53ef4ef mrs x15, s3_6_c15_c4_7 + 37dc: d51ef50f msr s3_6_c15_c5_0, x15 + 37e0: d53ef50f mrs x15, s3_6_c15_c5_0 + 37e4: d51ef52f msr s3_6_c15_c5_1, x15 + 37e8: d53ef52f mrs x15, s3_6_c15_c5_1 + 37ec: d51ef54f msr s3_6_c15_c5_2, x15 + 37f0: d53ef54f mrs x15, s3_6_c15_c5_2 + 37f4: d51ef56f msr s3_6_c15_c5_3, x15 + 37f8: d53ef56f mrs x15, s3_6_c15_c5_3 + 37fc: d51ef58f msr s3_6_c15_c5_4, x15 + 3800: d53ef58f mrs x15, s3_6_c15_c5_4 + 3804: d51ef5af msr s3_6_c15_c5_5, x15 + 3808: d53ef5af mrs x15, s3_6_c15_c5_5 + 380c: d51ef5cf msr s3_6_c15_c5_6, x15 + 3810: d53ef5cf mrs x15, s3_6_c15_c5_6 + 3814: d51ef5ef msr s3_6_c15_c5_7, x15 + 3818: d53ef5ef mrs x15, s3_6_c15_c5_7 + 381c: d51ef60f msr s3_6_c15_c6_0, x15 + 3820: d53ef60f mrs x15, s3_6_c15_c6_0 + 3824: d51ef62f msr s3_6_c15_c6_1, x15 + 3828: d53ef62f mrs x15, s3_6_c15_c6_1 + 382c: d51ef64f msr s3_6_c15_c6_2, x15 + 3830: d53ef64f mrs x15, s3_6_c15_c6_2 + 3834: d51ef66f msr s3_6_c15_c6_3, x15 + 3838: d53ef66f mrs x15, s3_6_c15_c6_3 + 383c: d51ef68f msr s3_6_c15_c6_4, x15 + 3840: d53ef68f mrs x15, s3_6_c15_c6_4 + 3844: d51ef6af msr s3_6_c15_c6_5, x15 + 3848: d53ef6af mrs x15, s3_6_c15_c6_5 + 384c: d51ef6cf msr s3_6_c15_c6_6, x15 + 3850: d53ef6cf mrs x15, s3_6_c15_c6_6 + 3854: d51ef6ef msr s3_6_c15_c6_7, x15 + 3858: d53ef6ef mrs x15, s3_6_c15_c6_7 + 385c: d51ef70f msr s3_6_c15_c7_0, x15 + 3860: d53ef70f mrs x15, s3_6_c15_c7_0 + 3864: d51ef72f msr s3_6_c15_c7_1, x15 + 3868: d53ef72f mrs x15, s3_6_c15_c7_1 + 386c: d51ef74f msr s3_6_c15_c7_2, x15 + 3870: d53ef74f mrs x15, s3_6_c15_c7_2 + 3874: d51ef76f msr s3_6_c15_c7_3, x15 + 3878: d53ef76f mrs x15, s3_6_c15_c7_3 + 387c: d51ef78f msr s3_6_c15_c7_4, x15 + 3880: d53ef78f mrs x15, s3_6_c15_c7_4 + 3884: d51ef7af msr s3_6_c15_c7_5, x15 + 3888: d53ef7af mrs x15, s3_6_c15_c7_5 + 388c: d51ef7cf msr s3_6_c15_c7_6, x15 + 3890: d53ef7cf mrs x15, s3_6_c15_c7_6 + 3894: d51ef7ef msr s3_6_c15_c7_7, x15 + 3898: d53ef7ef mrs x15, s3_6_c15_c7_7 + 389c: d51ef80f msr s3_6_c15_c8_0, x15 + 38a0: d53ef80f mrs x15, s3_6_c15_c8_0 + 38a4: d51ef82f msr s3_6_c15_c8_1, x15 + 38a8: d53ef82f mrs x15, s3_6_c15_c8_1 + 38ac: d51ef84f msr s3_6_c15_c8_2, x15 + 38b0: d53ef84f mrs x15, s3_6_c15_c8_2 + 38b4: d51ef86f msr s3_6_c15_c8_3, x15 + 38b8: d53ef86f mrs x15, s3_6_c15_c8_3 + 38bc: d51ef88f msr s3_6_c15_c8_4, x15 + 38c0: d53ef88f mrs x15, s3_6_c15_c8_4 + 38c4: d51ef8af msr s3_6_c15_c8_5, x15 + 38c8: d53ef8af mrs x15, s3_6_c15_c8_5 + 38cc: d51ef8cf msr s3_6_c15_c8_6, x15 + 38d0: d53ef8cf mrs x15, s3_6_c15_c8_6 + 38d4: d51ef8ef msr s3_6_c15_c8_7, x15 + 38d8: d53ef8ef mrs x15, s3_6_c15_c8_7 + 38dc: d51ef90f msr s3_6_c15_c9_0, x15 + 38e0: d53ef90f mrs x15, s3_6_c15_c9_0 + 38e4: d51ef92f msr s3_6_c15_c9_1, x15 + 38e8: d53ef92f mrs x15, s3_6_c15_c9_1 + 38ec: d51ef94f msr s3_6_c15_c9_2, x15 + 38f0: d53ef94f mrs x15, s3_6_c15_c9_2 + 38f4: d51ef96f msr s3_6_c15_c9_3, x15 + 38f8: d53ef96f mrs x15, s3_6_c15_c9_3 + 38fc: d51ef98f msr s3_6_c15_c9_4, x15 + 3900: d53ef98f mrs x15, s3_6_c15_c9_4 + 3904: d51ef9af msr s3_6_c15_c9_5, x15 + 3908: d53ef9af mrs x15, s3_6_c15_c9_5 + 390c: d51ef9cf msr s3_6_c15_c9_6, x15 + 3910: d53ef9cf mrs x15, s3_6_c15_c9_6 + 3914: d51ef9ef msr s3_6_c15_c9_7, x15 + 3918: d53ef9ef mrs x15, s3_6_c15_c9_7 + 391c: d51efa0f msr s3_6_c15_c10_0, x15 + 3920: d53efa0f mrs x15, s3_6_c15_c10_0 + 3924: d51efa2f msr s3_6_c15_c10_1, x15 + 3928: d53efa2f mrs x15, s3_6_c15_c10_1 + 392c: d51efa4f msr s3_6_c15_c10_2, x15 + 3930: d53efa4f mrs x15, s3_6_c15_c10_2 + 3934: d51efa6f msr s3_6_c15_c10_3, x15 + 3938: d53efa6f mrs x15, s3_6_c15_c10_3 + 393c: d51efa8f msr s3_6_c15_c10_4, x15 + 3940: d53efa8f mrs x15, s3_6_c15_c10_4 + 3944: d51efaaf msr s3_6_c15_c10_5, x15 + 3948: d53efaaf mrs x15, s3_6_c15_c10_5 + 394c: d51efacf msr s3_6_c15_c10_6, x15 + 3950: d53efacf mrs x15, s3_6_c15_c10_6 + 3954: d51efaef msr s3_6_c15_c10_7, x15 + 3958: d53efaef mrs x15, s3_6_c15_c10_7 + 395c: d51efb0f msr s3_6_c15_c11_0, x15 + 3960: d53efb0f mrs x15, s3_6_c15_c11_0 + 3964: d51efb2f msr s3_6_c15_c11_1, x15 + 3968: d53efb2f mrs x15, s3_6_c15_c11_1 + 396c: d51efb4f msr s3_6_c15_c11_2, x15 + 3970: d53efb4f mrs x15, s3_6_c15_c11_2 + 3974: d51efb6f msr s3_6_c15_c11_3, x15 + 3978: d53efb6f mrs x15, s3_6_c15_c11_3 + 397c: d51efb8f msr s3_6_c15_c11_4, x15 + 3980: d53efb8f mrs x15, s3_6_c15_c11_4 + 3984: d51efbaf msr s3_6_c15_c11_5, x15 + 3988: d53efbaf mrs x15, s3_6_c15_c11_5 + 398c: d51efbcf msr s3_6_c15_c11_6, x15 + 3990: d53efbcf mrs x15, s3_6_c15_c11_6 + 3994: d51efbef msr s3_6_c15_c11_7, x15 + 3998: d53efbef mrs x15, s3_6_c15_c11_7 + 399c: d51efc0f msr s3_6_c15_c12_0, x15 + 39a0: d53efc0f mrs x15, s3_6_c15_c12_0 + 39a4: d51efc2f msr s3_6_c15_c12_1, x15 + 39a8: d53efc2f mrs x15, s3_6_c15_c12_1 + 39ac: d51efc4f msr s3_6_c15_c12_2, x15 + 39b0: d53efc4f mrs x15, s3_6_c15_c12_2 + 39b4: d51efc6f msr s3_6_c15_c12_3, x15 + 39b8: d53efc6f mrs x15, s3_6_c15_c12_3 + 39bc: d51efc8f msr s3_6_c15_c12_4, x15 + 39c0: d53efc8f mrs x15, s3_6_c15_c12_4 + 39c4: d51efcaf msr s3_6_c15_c12_5, x15 + 39c8: d53efcaf mrs x15, s3_6_c15_c12_5 + 39cc: d51efccf msr s3_6_c15_c12_6, x15 + 39d0: d53efccf mrs x15, s3_6_c15_c12_6 + 39d4: d51efcef msr s3_6_c15_c12_7, x15 + 39d8: d53efcef mrs x15, s3_6_c15_c12_7 + 39dc: d51efd0f msr s3_6_c15_c13_0, x15 + 39e0: d53efd0f mrs x15, s3_6_c15_c13_0 + 39e4: d51efd2f msr s3_6_c15_c13_1, x15 + 39e8: d53efd2f mrs x15, s3_6_c15_c13_1 + 39ec: d51efd4f msr s3_6_c15_c13_2, x15 + 39f0: d53efd4f mrs x15, s3_6_c15_c13_2 + 39f4: d51efd6f msr s3_6_c15_c13_3, x15 + 39f8: d53efd6f mrs x15, s3_6_c15_c13_3 + 39fc: d51efd8f msr s3_6_c15_c13_4, x15 + 3a00: d53efd8f mrs x15, s3_6_c15_c13_4 + 3a04: d51efdaf msr s3_6_c15_c13_5, x15 + 3a08: d53efdaf mrs x15, s3_6_c15_c13_5 + 3a0c: d51efdcf msr s3_6_c15_c13_6, x15 + 3a10: d53efdcf mrs x15, s3_6_c15_c13_6 + 3a14: d51efdef msr s3_6_c15_c13_7, x15 + 3a18: d53efdef mrs x15, s3_6_c15_c13_7 + 3a1c: d51efe0f msr s3_6_c15_c14_0, x15 + 3a20: d53efe0f mrs x15, s3_6_c15_c14_0 + 3a24: d51efe2f msr s3_6_c15_c14_1, x15 + 3a28: d53efe2f mrs x15, s3_6_c15_c14_1 + 3a2c: d51efe4f msr s3_6_c15_c14_2, x15 + 3a30: d53efe4f mrs x15, s3_6_c15_c14_2 + 3a34: d51efe6f msr s3_6_c15_c14_3, x15 + 3a38: d53efe6f mrs x15, s3_6_c15_c14_3 + 3a3c: d51efe8f msr s3_6_c15_c14_4, x15 + 3a40: d53efe8f mrs x15, s3_6_c15_c14_4 + 3a44: d51efeaf msr s3_6_c15_c14_5, x15 + 3a48: d53efeaf mrs x15, s3_6_c15_c14_5 + 3a4c: d51efecf msr s3_6_c15_c14_6, x15 + 3a50: d53efecf mrs x15, s3_6_c15_c14_6 + 3a54: d51efeef msr s3_6_c15_c14_7, x15 + 3a58: d53efeef mrs x15, s3_6_c15_c14_7 + 3a5c: d51eff0f msr s3_6_c15_c15_0, x15 + 3a60: d53eff0f mrs x15, s3_6_c15_c15_0 + 3a64: d51eff2f msr s3_6_c15_c15_1, x15 + 3a68: d53eff2f mrs x15, s3_6_c15_c15_1 + 3a6c: d51eff4f msr s3_6_c15_c15_2, x15 + 3a70: d53eff4f mrs x15, s3_6_c15_c15_2 + 3a74: d51eff6f msr s3_6_c15_c15_3, x15 + 3a78: d53eff6f mrs x15, s3_6_c15_c15_3 + 3a7c: d51eff8f msr s3_6_c15_c15_4, x15 + 3a80: d53eff8f mrs x15, s3_6_c15_c15_4 + 3a84: d51effaf msr s3_6_c15_c15_5, x15 + 3a88: d53effaf mrs x15, s3_6_c15_c15_5 + 3a8c: d51effcf msr s3_6_c15_c15_6, x15 + 3a90: d53effcf mrs x15, s3_6_c15_c15_6 + 3a94: d51effef msr s3_6_c15_c15_7, x15 + 3a98: d53effef mrs x15, s3_6_c15_c15_7 + 3a9c: d51fb00f msr s3_7_c11_c0_0, x15 + 3aa0: d53fb00f mrs x15, s3_7_c11_c0_0 + 3aa4: d51fb02f msr s3_7_c11_c0_1, x15 + 3aa8: d53fb02f mrs x15, s3_7_c11_c0_1 + 3aac: d51fb04f msr s3_7_c11_c0_2, x15 + 3ab0: d53fb04f mrs x15, s3_7_c11_c0_2 + 3ab4: d51fb06f msr s3_7_c11_c0_3, x15 + 3ab8: d53fb06f mrs x15, s3_7_c11_c0_3 + 3abc: d51fb08f msr s3_7_c11_c0_4, x15 + 3ac0: d53fb08f mrs x15, s3_7_c11_c0_4 + 3ac4: d51fb0af msr s3_7_c11_c0_5, x15 + 3ac8: d53fb0af mrs x15, s3_7_c11_c0_5 + 3acc: d51fb0cf msr s3_7_c11_c0_6, x15 + 3ad0: d53fb0cf mrs x15, s3_7_c11_c0_6 + 3ad4: d51fb0ef msr s3_7_c11_c0_7, x15 + 3ad8: d53fb0ef mrs x15, s3_7_c11_c0_7 + 3adc: d51fb10f msr s3_7_c11_c1_0, x15 + 3ae0: d53fb10f mrs x15, s3_7_c11_c1_0 + 3ae4: d51fb12f msr s3_7_c11_c1_1, x15 + 3ae8: d53fb12f mrs x15, s3_7_c11_c1_1 + 3aec: d51fb14f msr s3_7_c11_c1_2, x15 + 3af0: d53fb14f mrs x15, s3_7_c11_c1_2 + 3af4: d51fb16f msr s3_7_c11_c1_3, x15 + 3af8: d53fb16f mrs x15, s3_7_c11_c1_3 + 3afc: d51fb18f msr s3_7_c11_c1_4, x15 + 3b00: d53fb18f mrs x15, s3_7_c11_c1_4 + 3b04: d51fb1af msr s3_7_c11_c1_5, x15 + 3b08: d53fb1af mrs x15, s3_7_c11_c1_5 + 3b0c: d51fb1cf msr s3_7_c11_c1_6, x15 + 3b10: d53fb1cf mrs x15, s3_7_c11_c1_6 + 3b14: d51fb1ef msr s3_7_c11_c1_7, x15 + 3b18: d53fb1ef mrs x15, s3_7_c11_c1_7 + 3b1c: d51fb20f msr s3_7_c11_c2_0, x15 + 3b20: d53fb20f mrs x15, s3_7_c11_c2_0 + 3b24: d51fb22f msr s3_7_c11_c2_1, x15 + 3b28: d53fb22f mrs x15, s3_7_c11_c2_1 + 3b2c: d51fb24f msr s3_7_c11_c2_2, x15 + 3b30: d53fb24f mrs x15, s3_7_c11_c2_2 + 3b34: d51fb26f msr s3_7_c11_c2_3, x15 + 3b38: d53fb26f mrs x15, s3_7_c11_c2_3 + 3b3c: d51fb28f msr s3_7_c11_c2_4, x15 + 3b40: d53fb28f mrs x15, s3_7_c11_c2_4 + 3b44: d51fb2af msr s3_7_c11_c2_5, x15 + 3b48: d53fb2af mrs x15, s3_7_c11_c2_5 + 3b4c: d51fb2cf msr s3_7_c11_c2_6, x15 + 3b50: d53fb2cf mrs x15, s3_7_c11_c2_6 + 3b54: d51fb2ef msr s3_7_c11_c2_7, x15 + 3b58: d53fb2ef mrs x15, s3_7_c11_c2_7 + 3b5c: d51fb30f msr s3_7_c11_c3_0, x15 + 3b60: d53fb30f mrs x15, s3_7_c11_c3_0 + 3b64: d51fb32f msr s3_7_c11_c3_1, x15 + 3b68: d53fb32f mrs x15, s3_7_c11_c3_1 + 3b6c: d51fb34f msr s3_7_c11_c3_2, x15 + 3b70: d53fb34f mrs x15, s3_7_c11_c3_2 + 3b74: d51fb36f msr s3_7_c11_c3_3, x15 + 3b78: d53fb36f mrs x15, s3_7_c11_c3_3 + 3b7c: d51fb38f msr s3_7_c11_c3_4, x15 + 3b80: d53fb38f mrs x15, s3_7_c11_c3_4 + 3b84: d51fb3af msr s3_7_c11_c3_5, x15 + 3b88: d53fb3af mrs x15, s3_7_c11_c3_5 + 3b8c: d51fb3cf msr s3_7_c11_c3_6, x15 + 3b90: d53fb3cf mrs x15, s3_7_c11_c3_6 + 3b94: d51fb3ef msr s3_7_c11_c3_7, x15 + 3b98: d53fb3ef mrs x15, s3_7_c11_c3_7 + 3b9c: d51fb40f msr s3_7_c11_c4_0, x15 + 3ba0: d53fb40f mrs x15, s3_7_c11_c4_0 + 3ba4: d51fb42f msr s3_7_c11_c4_1, x15 + 3ba8: d53fb42f mrs x15, s3_7_c11_c4_1 + 3bac: d51fb44f msr s3_7_c11_c4_2, x15 + 3bb0: d53fb44f mrs x15, s3_7_c11_c4_2 + 3bb4: d51fb46f msr s3_7_c11_c4_3, x15 + 3bb8: d53fb46f mrs x15, s3_7_c11_c4_3 + 3bbc: d51fb48f msr s3_7_c11_c4_4, x15 + 3bc0: d53fb48f mrs x15, s3_7_c11_c4_4 + 3bc4: d51fb4af msr s3_7_c11_c4_5, x15 + 3bc8: d53fb4af mrs x15, s3_7_c11_c4_5 + 3bcc: d51fb4cf msr s3_7_c11_c4_6, x15 + 3bd0: d53fb4cf mrs x15, s3_7_c11_c4_6 + 3bd4: d51fb4ef msr s3_7_c11_c4_7, x15 + 3bd8: d53fb4ef mrs x15, s3_7_c11_c4_7 + 3bdc: d51fb50f msr s3_7_c11_c5_0, x15 + 3be0: d53fb50f mrs x15, s3_7_c11_c5_0 + 3be4: d51fb52f msr s3_7_c11_c5_1, x15 + 3be8: d53fb52f mrs x15, s3_7_c11_c5_1 + 3bec: d51fb54f msr s3_7_c11_c5_2, x15 + 3bf0: d53fb54f mrs x15, s3_7_c11_c5_2 + 3bf4: d51fb56f msr s3_7_c11_c5_3, x15 + 3bf8: d53fb56f mrs x15, s3_7_c11_c5_3 + 3bfc: d51fb58f msr s3_7_c11_c5_4, x15 + 3c00: d53fb58f mrs x15, s3_7_c11_c5_4 + 3c04: d51fb5af msr s3_7_c11_c5_5, x15 + 3c08: d53fb5af mrs x15, s3_7_c11_c5_5 + 3c0c: d51fb5cf msr s3_7_c11_c5_6, x15 + 3c10: d53fb5cf mrs x15, s3_7_c11_c5_6 + 3c14: d51fb5ef msr s3_7_c11_c5_7, x15 + 3c18: d53fb5ef mrs x15, s3_7_c11_c5_7 + 3c1c: d51fb60f msr s3_7_c11_c6_0, x15 + 3c20: d53fb60f mrs x15, s3_7_c11_c6_0 + 3c24: d51fb62f msr s3_7_c11_c6_1, x15 + 3c28: d53fb62f mrs x15, s3_7_c11_c6_1 + 3c2c: d51fb64f msr s3_7_c11_c6_2, x15 + 3c30: d53fb64f mrs x15, s3_7_c11_c6_2 + 3c34: d51fb66f msr s3_7_c11_c6_3, x15 + 3c38: d53fb66f mrs x15, s3_7_c11_c6_3 + 3c3c: d51fb68f msr s3_7_c11_c6_4, x15 + 3c40: d53fb68f mrs x15, s3_7_c11_c6_4 + 3c44: d51fb6af msr s3_7_c11_c6_5, x15 + 3c48: d53fb6af mrs x15, s3_7_c11_c6_5 + 3c4c: d51fb6cf msr s3_7_c11_c6_6, x15 + 3c50: d53fb6cf mrs x15, s3_7_c11_c6_6 + 3c54: d51fb6ef msr s3_7_c11_c6_7, x15 + 3c58: d53fb6ef mrs x15, s3_7_c11_c6_7 + 3c5c: d51fb70f msr s3_7_c11_c7_0, x15 + 3c60: d53fb70f mrs x15, s3_7_c11_c7_0 + 3c64: d51fb72f msr s3_7_c11_c7_1, x15 + 3c68: d53fb72f mrs x15, s3_7_c11_c7_1 + 3c6c: d51fb74f msr s3_7_c11_c7_2, x15 + 3c70: d53fb74f mrs x15, s3_7_c11_c7_2 + 3c74: d51fb76f msr s3_7_c11_c7_3, x15 + 3c78: d53fb76f mrs x15, s3_7_c11_c7_3 + 3c7c: d51fb78f msr s3_7_c11_c7_4, x15 + 3c80: d53fb78f mrs x15, s3_7_c11_c7_4 + 3c84: d51fb7af msr s3_7_c11_c7_5, x15 + 3c88: d53fb7af mrs x15, s3_7_c11_c7_5 + 3c8c: d51fb7cf msr s3_7_c11_c7_6, x15 + 3c90: d53fb7cf mrs x15, s3_7_c11_c7_6 + 3c94: d51fb7ef msr s3_7_c11_c7_7, x15 + 3c98: d53fb7ef mrs x15, s3_7_c11_c7_7 + 3c9c: d51fb80f msr s3_7_c11_c8_0, x15 + 3ca0: d53fb80f mrs x15, s3_7_c11_c8_0 + 3ca4: d51fb82f msr s3_7_c11_c8_1, x15 + 3ca8: d53fb82f mrs x15, s3_7_c11_c8_1 + 3cac: d51fb84f msr s3_7_c11_c8_2, x15 + 3cb0: d53fb84f mrs x15, s3_7_c11_c8_2 + 3cb4: d51fb86f msr s3_7_c11_c8_3, x15 + 3cb8: d53fb86f mrs x15, s3_7_c11_c8_3 + 3cbc: d51fb88f msr s3_7_c11_c8_4, x15 + 3cc0: d53fb88f mrs x15, s3_7_c11_c8_4 + 3cc4: d51fb8af msr s3_7_c11_c8_5, x15 + 3cc8: d53fb8af mrs x15, s3_7_c11_c8_5 + 3ccc: d51fb8cf msr s3_7_c11_c8_6, x15 + 3cd0: d53fb8cf mrs x15, s3_7_c11_c8_6 + 3cd4: d51fb8ef msr s3_7_c11_c8_7, x15 + 3cd8: d53fb8ef mrs x15, s3_7_c11_c8_7 + 3cdc: d51fb90f msr s3_7_c11_c9_0, x15 + 3ce0: d53fb90f mrs x15, s3_7_c11_c9_0 + 3ce4: d51fb92f msr s3_7_c11_c9_1, x15 + 3ce8: d53fb92f mrs x15, s3_7_c11_c9_1 + 3cec: d51fb94f msr s3_7_c11_c9_2, x15 + 3cf0: d53fb94f mrs x15, s3_7_c11_c9_2 + 3cf4: d51fb96f msr s3_7_c11_c9_3, x15 + 3cf8: d53fb96f mrs x15, s3_7_c11_c9_3 + 3cfc: d51fb98f msr s3_7_c11_c9_4, x15 + 3d00: d53fb98f mrs x15, s3_7_c11_c9_4 + 3d04: d51fb9af msr s3_7_c11_c9_5, x15 + 3d08: d53fb9af mrs x15, s3_7_c11_c9_5 + 3d0c: d51fb9cf msr s3_7_c11_c9_6, x15 + 3d10: d53fb9cf mrs x15, s3_7_c11_c9_6 + 3d14: d51fb9ef msr s3_7_c11_c9_7, x15 + 3d18: d53fb9ef mrs x15, s3_7_c11_c9_7 + 3d1c: d51fba0f msr s3_7_c11_c10_0, x15 + 3d20: d53fba0f mrs x15, s3_7_c11_c10_0 + 3d24: d51fba2f msr s3_7_c11_c10_1, x15 + 3d28: d53fba2f mrs x15, s3_7_c11_c10_1 + 3d2c: d51fba4f msr s3_7_c11_c10_2, x15 + 3d30: d53fba4f mrs x15, s3_7_c11_c10_2 + 3d34: d51fba6f msr s3_7_c11_c10_3, x15 + 3d38: d53fba6f mrs x15, s3_7_c11_c10_3 + 3d3c: d51fba8f msr s3_7_c11_c10_4, x15 + 3d40: d53fba8f mrs x15, s3_7_c11_c10_4 + 3d44: d51fbaaf msr s3_7_c11_c10_5, x15 + 3d48: d53fbaaf mrs x15, s3_7_c11_c10_5 + 3d4c: d51fbacf msr s3_7_c11_c10_6, x15 + 3d50: d53fbacf mrs x15, s3_7_c11_c10_6 + 3d54: d51fbaef msr s3_7_c11_c10_7, x15 + 3d58: d53fbaef mrs x15, s3_7_c11_c10_7 + 3d5c: d51fbb0f msr s3_7_c11_c11_0, x15 + 3d60: d53fbb0f mrs x15, s3_7_c11_c11_0 + 3d64: d51fbb2f msr s3_7_c11_c11_1, x15 + 3d68: d53fbb2f mrs x15, s3_7_c11_c11_1 + 3d6c: d51fbb4f msr s3_7_c11_c11_2, x15 + 3d70: d53fbb4f mrs x15, s3_7_c11_c11_2 + 3d74: d51fbb6f msr s3_7_c11_c11_3, x15 + 3d78: d53fbb6f mrs x15, s3_7_c11_c11_3 + 3d7c: d51fbb8f msr s3_7_c11_c11_4, x15 + 3d80: d53fbb8f mrs x15, s3_7_c11_c11_4 + 3d84: d51fbbaf msr s3_7_c11_c11_5, x15 + 3d88: d53fbbaf mrs x15, s3_7_c11_c11_5 + 3d8c: d51fbbcf msr s3_7_c11_c11_6, x15 + 3d90: d53fbbcf mrs x15, s3_7_c11_c11_6 + 3d94: d51fbbef msr s3_7_c11_c11_7, x15 + 3d98: d53fbbef mrs x15, s3_7_c11_c11_7 + 3d9c: d51fbc0f msr s3_7_c11_c12_0, x15 + 3da0: d53fbc0f mrs x15, s3_7_c11_c12_0 + 3da4: d51fbc2f msr s3_7_c11_c12_1, x15 + 3da8: d53fbc2f mrs x15, s3_7_c11_c12_1 + 3dac: d51fbc4f msr s3_7_c11_c12_2, x15 + 3db0: d53fbc4f mrs x15, s3_7_c11_c12_2 + 3db4: d51fbc6f msr s3_7_c11_c12_3, x15 + 3db8: d53fbc6f mrs x15, s3_7_c11_c12_3 + 3dbc: d51fbc8f msr s3_7_c11_c12_4, x15 + 3dc0: d53fbc8f mrs x15, s3_7_c11_c12_4 + 3dc4: d51fbcaf msr s3_7_c11_c12_5, x15 + 3dc8: d53fbcaf mrs x15, s3_7_c11_c12_5 + 3dcc: d51fbccf msr s3_7_c11_c12_6, x15 + 3dd0: d53fbccf mrs x15, s3_7_c11_c12_6 + 3dd4: d51fbcef msr s3_7_c11_c12_7, x15 + 3dd8: d53fbcef mrs x15, s3_7_c11_c12_7 + 3ddc: d51fbd0f msr s3_7_c11_c13_0, x15 + 3de0: d53fbd0f mrs x15, s3_7_c11_c13_0 + 3de4: d51fbd2f msr s3_7_c11_c13_1, x15 + 3de8: d53fbd2f mrs x15, s3_7_c11_c13_1 + 3dec: d51fbd4f msr s3_7_c11_c13_2, x15 + 3df0: d53fbd4f mrs x15, s3_7_c11_c13_2 + 3df4: d51fbd6f msr s3_7_c11_c13_3, x15 + 3df8: d53fbd6f mrs x15, s3_7_c11_c13_3 + 3dfc: d51fbd8f msr s3_7_c11_c13_4, x15 + 3e00: d53fbd8f mrs x15, s3_7_c11_c13_4 + 3e04: d51fbdaf msr s3_7_c11_c13_5, x15 + 3e08: d53fbdaf mrs x15, s3_7_c11_c13_5 + 3e0c: d51fbdcf msr s3_7_c11_c13_6, x15 + 3e10: d53fbdcf mrs x15, s3_7_c11_c13_6 + 3e14: d51fbdef msr s3_7_c11_c13_7, x15 + 3e18: d53fbdef mrs x15, s3_7_c11_c13_7 + 3e1c: d51fbe0f msr s3_7_c11_c14_0, x15 + 3e20: d53fbe0f mrs x15, s3_7_c11_c14_0 + 3e24: d51fbe2f msr s3_7_c11_c14_1, x15 + 3e28: d53fbe2f mrs x15, s3_7_c11_c14_1 + 3e2c: d51fbe4f msr s3_7_c11_c14_2, x15 + 3e30: d53fbe4f mrs x15, s3_7_c11_c14_2 + 3e34: d51fbe6f msr s3_7_c11_c14_3, x15 + 3e38: d53fbe6f mrs x15, s3_7_c11_c14_3 + 3e3c: d51fbe8f msr s3_7_c11_c14_4, x15 + 3e40: d53fbe8f mrs x15, s3_7_c11_c14_4 + 3e44: d51fbeaf msr s3_7_c11_c14_5, x15 + 3e48: d53fbeaf mrs x15, s3_7_c11_c14_5 + 3e4c: d51fbecf msr s3_7_c11_c14_6, x15 + 3e50: d53fbecf mrs x15, s3_7_c11_c14_6 + 3e54: d51fbeef msr s3_7_c11_c14_7, x15 + 3e58: d53fbeef mrs x15, s3_7_c11_c14_7 + 3e5c: d51fbf0f msr s3_7_c11_c15_0, x15 + 3e60: d53fbf0f mrs x15, s3_7_c11_c15_0 + 3e64: d51fbf2f msr s3_7_c11_c15_1, x15 + 3e68: d53fbf2f mrs x15, s3_7_c11_c15_1 + 3e6c: d51fbf4f msr s3_7_c11_c15_2, x15 + 3e70: d53fbf4f mrs x15, s3_7_c11_c15_2 + 3e74: d51fbf6f msr s3_7_c11_c15_3, x15 + 3e78: d53fbf6f mrs x15, s3_7_c11_c15_3 + 3e7c: d51fbf8f msr s3_7_c11_c15_4, x15 + 3e80: d53fbf8f mrs x15, s3_7_c11_c15_4 + 3e84: d51fbfaf msr s3_7_c11_c15_5, x15 + 3e88: d53fbfaf mrs x15, s3_7_c11_c15_5 + 3e8c: d51fbfcf msr s3_7_c11_c15_6, x15 + 3e90: d53fbfcf mrs x15, s3_7_c11_c15_6 + 3e94: d51fbfef msr s3_7_c11_c15_7, x15 + 3e98: d53fbfef mrs x15, s3_7_c11_c15_7 + 3e9c: d51ff00f msr s3_7_c15_c0_0, x15 + 3ea0: d53ff00f mrs x15, s3_7_c15_c0_0 + 3ea4: d51ff02f msr s3_7_c15_c0_1, x15 + 3ea8: d53ff02f mrs x15, s3_7_c15_c0_1 + 3eac: d51ff04f msr s3_7_c15_c0_2, x15 + 3eb0: d53ff04f mrs x15, s3_7_c15_c0_2 + 3eb4: d51ff06f msr s3_7_c15_c0_3, x15 + 3eb8: d53ff06f mrs x15, s3_7_c15_c0_3 + 3ebc: d51ff08f msr s3_7_c15_c0_4, x15 + 3ec0: d53ff08f mrs x15, s3_7_c15_c0_4 + 3ec4: d51ff0af msr s3_7_c15_c0_5, x15 + 3ec8: d53ff0af mrs x15, s3_7_c15_c0_5 + 3ecc: d51ff0cf msr s3_7_c15_c0_6, x15 + 3ed0: d53ff0cf mrs x15, s3_7_c15_c0_6 + 3ed4: d51ff0ef msr s3_7_c15_c0_7, x15 + 3ed8: d53ff0ef mrs x15, s3_7_c15_c0_7 + 3edc: d51ff10f msr s3_7_c15_c1_0, x15 + 3ee0: d53ff10f mrs x15, s3_7_c15_c1_0 + 3ee4: d51ff12f msr s3_7_c15_c1_1, x15 + 3ee8: d53ff12f mrs x15, s3_7_c15_c1_1 + 3eec: d51ff14f msr s3_7_c15_c1_2, x15 + 3ef0: d53ff14f mrs x15, s3_7_c15_c1_2 + 3ef4: d51ff16f msr s3_7_c15_c1_3, x15 + 3ef8: d53ff16f mrs x15, s3_7_c15_c1_3 + 3efc: d51ff18f msr s3_7_c15_c1_4, x15 + 3f00: d53ff18f mrs x15, s3_7_c15_c1_4 + 3f04: d51ff1af msr s3_7_c15_c1_5, x15 + 3f08: d53ff1af mrs x15, s3_7_c15_c1_5 + 3f0c: d51ff1cf msr s3_7_c15_c1_6, x15 + 3f10: d53ff1cf mrs x15, s3_7_c15_c1_6 + 3f14: d51ff1ef msr s3_7_c15_c1_7, x15 + 3f18: d53ff1ef mrs x15, s3_7_c15_c1_7 + 3f1c: d51ff20f msr s3_7_c15_c2_0, x15 + 3f20: d53ff20f mrs x15, s3_7_c15_c2_0 + 3f24: d51ff22f msr s3_7_c15_c2_1, x15 + 3f28: d53ff22f mrs x15, s3_7_c15_c2_1 + 3f2c: d51ff24f msr s3_7_c15_c2_2, x15 + 3f30: d53ff24f mrs x15, s3_7_c15_c2_2 + 3f34: d51ff26f msr s3_7_c15_c2_3, x15 + 3f38: d53ff26f mrs x15, s3_7_c15_c2_3 + 3f3c: d51ff28f msr s3_7_c15_c2_4, x15 + 3f40: d53ff28f mrs x15, s3_7_c15_c2_4 + 3f44: d51ff2af msr s3_7_c15_c2_5, x15 + 3f48: d53ff2af mrs x15, s3_7_c15_c2_5 + 3f4c: d51ff2cf msr s3_7_c15_c2_6, x15 + 3f50: d53ff2cf mrs x15, s3_7_c15_c2_6 + 3f54: d51ff2ef msr s3_7_c15_c2_7, x15 + 3f58: d53ff2ef mrs x15, s3_7_c15_c2_7 + 3f5c: d51ff30f msr s3_7_c15_c3_0, x15 + 3f60: d53ff30f mrs x15, s3_7_c15_c3_0 + 3f64: d51ff32f msr s3_7_c15_c3_1, x15 + 3f68: d53ff32f mrs x15, s3_7_c15_c3_1 + 3f6c: d51ff34f msr s3_7_c15_c3_2, x15 + 3f70: d53ff34f mrs x15, s3_7_c15_c3_2 + 3f74: d51ff36f msr s3_7_c15_c3_3, x15 + 3f78: d53ff36f mrs x15, s3_7_c15_c3_3 + 3f7c: d51ff38f msr s3_7_c15_c3_4, x15 + 3f80: d53ff38f mrs x15, s3_7_c15_c3_4 + 3f84: d51ff3af msr s3_7_c15_c3_5, x15 + 3f88: d53ff3af mrs x15, s3_7_c15_c3_5 + 3f8c: d51ff3cf msr s3_7_c15_c3_6, x15 + 3f90: d53ff3cf mrs x15, s3_7_c15_c3_6 + 3f94: d51ff3ef msr s3_7_c15_c3_7, x15 + 3f98: d53ff3ef mrs x15, s3_7_c15_c3_7 + 3f9c: d51ff40f msr s3_7_c15_c4_0, x15 + 3fa0: d53ff40f mrs x15, s3_7_c15_c4_0 + 3fa4: d51ff42f msr s3_7_c15_c4_1, x15 + 3fa8: d53ff42f mrs x15, s3_7_c15_c4_1 + 3fac: d51ff44f msr s3_7_c15_c4_2, x15 + 3fb0: d53ff44f mrs x15, s3_7_c15_c4_2 + 3fb4: d51ff46f msr s3_7_c15_c4_3, x15 + 3fb8: d53ff46f mrs x15, s3_7_c15_c4_3 + 3fbc: d51ff48f msr s3_7_c15_c4_4, x15 + 3fc0: d53ff48f mrs x15, s3_7_c15_c4_4 + 3fc4: d51ff4af msr s3_7_c15_c4_5, x15 + 3fc8: d53ff4af mrs x15, s3_7_c15_c4_5 + 3fcc: d51ff4cf msr s3_7_c15_c4_6, x15 + 3fd0: d53ff4cf mrs x15, s3_7_c15_c4_6 + 3fd4: d51ff4ef msr s3_7_c15_c4_7, x15 + 3fd8: d53ff4ef mrs x15, s3_7_c15_c4_7 + 3fdc: d51ff50f msr s3_7_c15_c5_0, x15 + 3fe0: d53ff50f mrs x15, s3_7_c15_c5_0 + 3fe4: d51ff52f msr s3_7_c15_c5_1, x15 + 3fe8: d53ff52f mrs x15, s3_7_c15_c5_1 + 3fec: d51ff54f msr s3_7_c15_c5_2, x15 + 3ff0: d53ff54f mrs x15, s3_7_c15_c5_2 + 3ff4: d51ff56f msr s3_7_c15_c5_3, x15 + 3ff8: d53ff56f mrs x15, s3_7_c15_c5_3 + 3ffc: d51ff58f msr s3_7_c15_c5_4, x15 + 4000: d53ff58f mrs x15, s3_7_c15_c5_4 + 4004: d51ff5af msr s3_7_c15_c5_5, x15 + 4008: d53ff5af mrs x15, s3_7_c15_c5_5 + 400c: d51ff5cf msr s3_7_c15_c5_6, x15 + 4010: d53ff5cf mrs x15, s3_7_c15_c5_6 + 4014: d51ff5ef msr s3_7_c15_c5_7, x15 + 4018: d53ff5ef mrs x15, s3_7_c15_c5_7 + 401c: d51ff60f msr s3_7_c15_c6_0, x15 + 4020: d53ff60f mrs x15, s3_7_c15_c6_0 + 4024: d51ff62f msr s3_7_c15_c6_1, x15 + 4028: d53ff62f mrs x15, s3_7_c15_c6_1 + 402c: d51ff64f msr s3_7_c15_c6_2, x15 + 4030: d53ff64f mrs x15, s3_7_c15_c6_2 + 4034: d51ff66f msr s3_7_c15_c6_3, x15 + 4038: d53ff66f mrs x15, s3_7_c15_c6_3 + 403c: d51ff68f msr s3_7_c15_c6_4, x15 + 4040: d53ff68f mrs x15, s3_7_c15_c6_4 + 4044: d51ff6af msr s3_7_c15_c6_5, x15 + 4048: d53ff6af mrs x15, s3_7_c15_c6_5 + 404c: d51ff6cf msr s3_7_c15_c6_6, x15 + 4050: d53ff6cf mrs x15, s3_7_c15_c6_6 + 4054: d51ff6ef msr s3_7_c15_c6_7, x15 + 4058: d53ff6ef mrs x15, s3_7_c15_c6_7 + 405c: d51ff70f msr s3_7_c15_c7_0, x15 + 4060: d53ff70f mrs x15, s3_7_c15_c7_0 + 4064: d51ff72f msr s3_7_c15_c7_1, x15 + 4068: d53ff72f mrs x15, s3_7_c15_c7_1 + 406c: d51ff74f msr s3_7_c15_c7_2, x15 + 4070: d53ff74f mrs x15, s3_7_c15_c7_2 + 4074: d51ff76f msr s3_7_c15_c7_3, x15 + 4078: d53ff76f mrs x15, s3_7_c15_c7_3 + 407c: d51ff78f msr s3_7_c15_c7_4, x15 + 4080: d53ff78f mrs x15, s3_7_c15_c7_4 + 4084: d51ff7af msr s3_7_c15_c7_5, x15 + 4088: d53ff7af mrs x15, s3_7_c15_c7_5 + 408c: d51ff7cf msr s3_7_c15_c7_6, x15 + 4090: d53ff7cf mrs x15, s3_7_c15_c7_6 + 4094: d51ff7ef msr s3_7_c15_c7_7, x15 + 4098: d53ff7ef mrs x15, s3_7_c15_c7_7 + 409c: d51ff80f msr s3_7_c15_c8_0, x15 + 40a0: d53ff80f mrs x15, s3_7_c15_c8_0 + 40a4: d51ff82f msr s3_7_c15_c8_1, x15 + 40a8: d53ff82f mrs x15, s3_7_c15_c8_1 + 40ac: d51ff84f msr s3_7_c15_c8_2, x15 + 40b0: d53ff84f mrs x15, s3_7_c15_c8_2 + 40b4: d51ff86f msr s3_7_c15_c8_3, x15 + 40b8: d53ff86f mrs x15, s3_7_c15_c8_3 + 40bc: d51ff88f msr s3_7_c15_c8_4, x15 + 40c0: d53ff88f mrs x15, s3_7_c15_c8_4 + 40c4: d51ff8af msr s3_7_c15_c8_5, x15 + 40c8: d53ff8af mrs x15, s3_7_c15_c8_5 + 40cc: d51ff8cf msr s3_7_c15_c8_6, x15 + 40d0: d53ff8cf mrs x15, s3_7_c15_c8_6 + 40d4: d51ff8ef msr s3_7_c15_c8_7, x15 + 40d8: d53ff8ef mrs x15, s3_7_c15_c8_7 + 40dc: d51ff90f msr s3_7_c15_c9_0, x15 + 40e0: d53ff90f mrs x15, s3_7_c15_c9_0 + 40e4: d51ff92f msr s3_7_c15_c9_1, x15 + 40e8: d53ff92f mrs x15, s3_7_c15_c9_1 + 40ec: d51ff94f msr s3_7_c15_c9_2, x15 + 40f0: d53ff94f mrs x15, s3_7_c15_c9_2 + 40f4: d51ff96f msr s3_7_c15_c9_3, x15 + 40f8: d53ff96f mrs x15, s3_7_c15_c9_3 + 40fc: d51ff98f msr s3_7_c15_c9_4, x15 + 4100: d53ff98f mrs x15, s3_7_c15_c9_4 + 4104: d51ff9af msr s3_7_c15_c9_5, x15 + 4108: d53ff9af mrs x15, s3_7_c15_c9_5 + 410c: d51ff9cf msr s3_7_c15_c9_6, x15 + 4110: d53ff9cf mrs x15, s3_7_c15_c9_6 + 4114: d51ff9ef msr s3_7_c15_c9_7, x15 + 4118: d53ff9ef mrs x15, s3_7_c15_c9_7 + 411c: d51ffa0f msr s3_7_c15_c10_0, x15 + 4120: d53ffa0f mrs x15, s3_7_c15_c10_0 + 4124: d51ffa2f msr s3_7_c15_c10_1, x15 + 4128: d53ffa2f mrs x15, s3_7_c15_c10_1 + 412c: d51ffa4f msr s3_7_c15_c10_2, x15 + 4130: d53ffa4f mrs x15, s3_7_c15_c10_2 + 4134: d51ffa6f msr s3_7_c15_c10_3, x15 + 4138: d53ffa6f mrs x15, s3_7_c15_c10_3 + 413c: d51ffa8f msr s3_7_c15_c10_4, x15 + 4140: d53ffa8f mrs x15, s3_7_c15_c10_4 + 4144: d51ffaaf msr s3_7_c15_c10_5, x15 + 4148: d53ffaaf mrs x15, s3_7_c15_c10_5 + 414c: d51ffacf msr s3_7_c15_c10_6, x15 + 4150: d53ffacf mrs x15, s3_7_c15_c10_6 + 4154: d51ffaef msr s3_7_c15_c10_7, x15 + 4158: d53ffaef mrs x15, s3_7_c15_c10_7 + 415c: d51ffb0f msr s3_7_c15_c11_0, x15 + 4160: d53ffb0f mrs x15, s3_7_c15_c11_0 + 4164: d51ffb2f msr s3_7_c15_c11_1, x15 + 4168: d53ffb2f mrs x15, s3_7_c15_c11_1 + 416c: d51ffb4f msr s3_7_c15_c11_2, x15 + 4170: d53ffb4f mrs x15, s3_7_c15_c11_2 + 4174: d51ffb6f msr s3_7_c15_c11_3, x15 + 4178: d53ffb6f mrs x15, s3_7_c15_c11_3 + 417c: d51ffb8f msr s3_7_c15_c11_4, x15 + 4180: d53ffb8f mrs x15, s3_7_c15_c11_4 + 4184: d51ffbaf msr s3_7_c15_c11_5, x15 + 4188: d53ffbaf mrs x15, s3_7_c15_c11_5 + 418c: d51ffbcf msr s3_7_c15_c11_6, x15 + 4190: d53ffbcf mrs x15, s3_7_c15_c11_6 + 4194: d51ffbef msr s3_7_c15_c11_7, x15 + 4198: d53ffbef mrs x15, s3_7_c15_c11_7 + 419c: d51ffc0f msr s3_7_c15_c12_0, x15 + 41a0: d53ffc0f mrs x15, s3_7_c15_c12_0 + 41a4: d51ffc2f msr s3_7_c15_c12_1, x15 + 41a8: d53ffc2f mrs x15, s3_7_c15_c12_1 + 41ac: d51ffc4f msr s3_7_c15_c12_2, x15 + 41b0: d53ffc4f mrs x15, s3_7_c15_c12_2 + 41b4: d51ffc6f msr s3_7_c15_c12_3, x15 + 41b8: d53ffc6f mrs x15, s3_7_c15_c12_3 + 41bc: d51ffc8f msr s3_7_c15_c12_4, x15 + 41c0: d53ffc8f mrs x15, s3_7_c15_c12_4 + 41c4: d51ffcaf msr s3_7_c15_c12_5, x15 + 41c8: d53ffcaf mrs x15, s3_7_c15_c12_5 + 41cc: d51ffccf msr s3_7_c15_c12_6, x15 + 41d0: d53ffccf mrs x15, s3_7_c15_c12_6 + 41d4: d51ffcef msr s3_7_c15_c12_7, x15 + 41d8: d53ffcef mrs x15, s3_7_c15_c12_7 + 41dc: d51ffd0f msr s3_7_c15_c13_0, x15 + 41e0: d53ffd0f mrs x15, s3_7_c15_c13_0 + 41e4: d51ffd2f msr s3_7_c15_c13_1, x15 + 41e8: d53ffd2f mrs x15, s3_7_c15_c13_1 + 41ec: d51ffd4f msr s3_7_c15_c13_2, x15 + 41f0: d53ffd4f mrs x15, s3_7_c15_c13_2 + 41f4: d51ffd6f msr s3_7_c15_c13_3, x15 + 41f8: d53ffd6f mrs x15, s3_7_c15_c13_3 + 41fc: d51ffd8f msr s3_7_c15_c13_4, x15 + 4200: d53ffd8f mrs x15, s3_7_c15_c13_4 + 4204: d51ffdaf msr s3_7_c15_c13_5, x15 + 4208: d53ffdaf mrs x15, s3_7_c15_c13_5 + 420c: d51ffdcf msr s3_7_c15_c13_6, x15 + 4210: d53ffdcf mrs x15, s3_7_c15_c13_6 + 4214: d51ffdef msr s3_7_c15_c13_7, x15 + 4218: d53ffdef mrs x15, s3_7_c15_c13_7 + 421c: d51ffe0f msr s3_7_c15_c14_0, x15 + 4220: d53ffe0f mrs x15, s3_7_c15_c14_0 + 4224: d51ffe2f msr s3_7_c15_c14_1, x15 + 4228: d53ffe2f mrs x15, s3_7_c15_c14_1 + 422c: d51ffe4f msr s3_7_c15_c14_2, x15 + 4230: d53ffe4f mrs x15, s3_7_c15_c14_2 + 4234: d51ffe6f msr s3_7_c15_c14_3, x15 + 4238: d53ffe6f mrs x15, s3_7_c15_c14_3 + 423c: d51ffe8f msr s3_7_c15_c14_4, x15 + 4240: d53ffe8f mrs x15, s3_7_c15_c14_4 + 4244: d51ffeaf msr s3_7_c15_c14_5, x15 + 4248: d53ffeaf mrs x15, s3_7_c15_c14_5 + 424c: d51ffecf msr s3_7_c15_c14_6, x15 + 4250: d53ffecf mrs x15, s3_7_c15_c14_6 + 4254: d51ffeef msr s3_7_c15_c14_7, x15 + 4258: d53ffeef mrs x15, s3_7_c15_c14_7 + 425c: d51fff0f msr s3_7_c15_c15_0, x15 + 4260: d53fff0f mrs x15, s3_7_c15_c15_0 + 4264: d51fff2f msr s3_7_c15_c15_1, x15 + 4268: d53fff2f mrs x15, s3_7_c15_c15_1 + 426c: d51fff4f msr s3_7_c15_c15_2, x15 + 4270: d53fff4f mrs x15, s3_7_c15_c15_2 + 4274: d51fff6f msr s3_7_c15_c15_3, x15 + 4278: d53fff6f mrs x15, s3_7_c15_c15_3 + 427c: d51fff8f msr s3_7_c15_c15_4, x15 + 4280: d53fff8f mrs x15, s3_7_c15_c15_4 + 4284: d51fffaf msr s3_7_c15_c15_5, x15 + 4288: d53fffaf mrs x15, s3_7_c15_c15_5 + 428c: d51fffcf msr s3_7_c15_c15_6, x15 + 4290: d53fffcf mrs x15, s3_7_c15_c15_6 + 4294: d51fffef msr s3_7_c15_c15_7, x15 + 4298: d53fffef mrs x15, s3_7_c15_c15_7 + 429c: d513040f msr dbgdtr_el0, x15 + 42a0: d533040f mrs x15, dbgdtr_el0 + 42a4: d533050f mrs x15, dbgdtrrx_el0 + 42a8: d518c04f msr rmr_el1, x15 + 42ac: d538c04f mrs x15, rmr_el1 + 42b0: d51cc04f msr rmr_el2, x15 + 42b4: d53cc04f mrs x15, rmr_el2 + 42b8: d51ec04f msr rmr_el3, x15 + 42bc: d53ec04f mrs x15, rmr_el3 + 42c0: d518400f msr spsr_el1, x15 + 42c4: d538400f mrs x15, spsr_el1 + 42c8: d51c400f msr spsr_el2, x15 + 42cc: d53c400f mrs x15, spsr_el2 + 42d0: d51e400f msr spsr_el3, x15 + 42d4: d53e400f mrs x15, spsr_el3 + 42d8: d500000f msr s0_0_c0_c0_0, x15 + 42dc: d520000f mrs x15, s0_0_c0_c0_0 + 42e0: d50ffffb sys #7, C15, C15, #7, x27 + 42e4: d52ffffb sysl x27, #7, C15, C15, #7 + 42e8: d514680e msr s2_4_c6_c8_0, x14 + 42ec: d534680e mrs x14, s2_4_c6_c8_0 + 42f0: d50ae444 sys #2, C14, C4, #2, x4 + 42f4: d52ae444 sysl x4, #2, C14, C4, #2 + 42f8: d501d167 msr s0_1_c13_c1_3, x7 + 42fc: d521d167 mrs x7, s0_1_c13_c1_3 diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-1.s b/gas/testsuite/gas/aarch64/sysreg/sysreg-1.s new file mode 100644 index 0000000..82a86d3 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-1.s @@ -0,0 +1,174 @@ +/* sysreg-1.s Test file for AArch64 system registers. + + Copyright (C) 2011-2024 Free Software Foundation, Inc. + Contributed by ARM Ltd. + + This file is part of GAS. + + GAS is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the license, or + (at your option) any later version. + + GAS is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program; see the file COPYING3. If not, + see . */ + + .macro rw_sys_reg sys_reg xreg r w + .ifc \w, 1 + msr \sys_reg, \xreg + .endif + .ifc \r, 1 + mrs \xreg, \sys_reg + .endif + .endm + + .text + + rw_sys_reg sys_reg=id_aa64afr0_el1 xreg=x7 r=1 w=0 + rw_sys_reg sys_reg=id_aa64afr1_el1 xreg=x7 r=1 w=0 + rw_sys_reg sys_reg=mvfr2_el1 xreg=x7 r=1 w=0 + rw_sys_reg sys_reg=dlr_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=dspsr_el0 xreg=x7 r=1 w=1 + + rw_sys_reg sys_reg=sder32_el3 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=mdcr_el3 xreg=x7 r=1 w=1 + + rw_sys_reg sys_reg=mdccint_el1 xreg=x7 r=1 w=1 + + rw_sys_reg sys_reg=dbgvcr32_el2 xreg=x7 r=1 w=1 + + rw_sys_reg sys_reg=fpexc32_el2 xreg=x7 r=1 w=1 + + rw_sys_reg sys_reg=teecr32_el1 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=teehbr32_el1 xreg=x7 r=1 w=1 + + rw_sys_reg sys_reg=cntp_tval_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=cntp_ctl_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=cntp_cval_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=cntps_tval_el1 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=cntps_ctl_el1 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=cntps_cval_el1 xreg=x7 r=1 w=1 + + rw_sys_reg sys_reg=pmccntr_el0 xreg=x7 r=1 w=1 + + rw_sys_reg sys_reg=pmevcntr0_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevcntr1_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevcntr2_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevcntr3_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevcntr4_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevcntr5_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevcntr6_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevcntr7_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevcntr8_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevcntr9_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevcntr10_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevcntr11_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevcntr12_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevcntr13_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevcntr14_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevcntr15_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevcntr16_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevcntr17_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevcntr18_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevcntr19_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevcntr20_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevcntr21_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevcntr22_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevcntr23_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevcntr24_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevcntr25_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevcntr26_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevcntr27_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevcntr28_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevcntr29_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevcntr30_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevtyper0_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevtyper1_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevtyper2_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevtyper3_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevtyper4_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevtyper5_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevtyper6_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevtyper7_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevtyper8_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevtyper9_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevtyper10_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevtyper11_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevtyper12_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevtyper13_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevtyper14_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevtyper15_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevtyper16_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevtyper17_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevtyper18_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevtyper19_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevtyper20_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevtyper21_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevtyper22_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevtyper23_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevtyper24_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevtyper25_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevtyper26_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevtyper27_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevtyper28_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevtyper29_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmevtyper30_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=pmccfiltr_el0 xreg=x7 r=1 w=1 + + rw_sys_reg sys_reg=tpidrro_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=tpidr_el0 xreg=x7 r=1 w=1 + rw_sys_reg sys_reg=cntfrq_el0 xreg=x7 r=1 w=1 + + // + // Macros to generate MRS and MSR with all the implementation defined + // system registers in the form of S3____. + + .altmacro + .macro all_op2 op1, crn, crm, from=0, to=7 + rw_sys_reg S3_\op1\()_C\crn\()_C\crm\()_\from x15 1 1 + .if (\to-\from > 0) + all_op2 \op1, \crn, \crm, %(\from+1), \to + .endif + .endm + + .macro all_crm op1, crn, from=0, to=15 + all_op2 \op1, \crn, \from, 0, 7 + .if (\to-\from > 0) + all_crm \op1, \crn, %(\from+1), \to + .endif + .endm + + .macro all_imple_defined from=0, to=7 + .irp crn, 11, 15 + all_crm \from, \crn, 0, 15 + .endr + .if \to-\from + all_imple_defined %(\from+1), \to + .endif + .endm + + all_imple_defined 0, 7 + .noaltmacro + + rw_sys_reg sys_reg=dbgdtr_el0 xreg=x15 r=1 w=1 + rw_sys_reg sys_reg=dbgdtrrx_el0 xreg=x15 r=1 w=0 + + rw_sys_reg sys_reg=rmr_el1 xreg=x15 r=1 w=1 + rw_sys_reg sys_reg=rmr_el2 xreg=x15 r=1 w=1 + rw_sys_reg sys_reg=rmr_el3 xreg=x15 r=1 w=1 + + rw_sys_reg sys_reg=spsr_el1 xreg=x15 r=1 w=1 + rw_sys_reg sys_reg=spsr_el2 xreg=x15 r=1 w=1 + rw_sys_reg sys_reg=spsr_el3 xreg=x15 r=1 w=1 + + rw_sys_reg sys_reg=s0_0_C0_C0_0 xreg=x15 r=1 w=1 + rw_sys_reg sys_reg=s1_7_C15_C15_7 xreg=x27 r=1 w=1 + rw_sys_reg sys_reg=s2_4_C6_C8_0 xreg=x14 r=1 w=1 + rw_sys_reg sys_reg=s1_2_C14_C4_2 xreg=x4 r=1 w=1 + rw_sys_reg sys_reg=s0_1_C13_C1_3 xreg=x7 r=1 w=1 diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-2.d b/gas/testsuite/gas/aarch64/sysreg/sysreg-2.d new file mode 100644 index 0000000..ac0a862 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-2.d @@ -0,0 +1,60 @@ +#objdump: -dr +#as: -march=armv8.2-a+profile + +.*: file .* + + +Disassembly of section .text: + +0+ <.*>: +.*: d5380725 mrs x5, id_aa64mmfr1_el1 +.*: d5380747 mrs x7, id_aa64mmfr2_el1 +.*: d5380769 mrs x9, id_aa64mmfr3_el1 +.*: d538078b mrs x11, id_aa64mmfr4_el1 + [0-9a-f]+: d5385305 mrs x5, erridr_el1 + [0-9a-f]+: d5185327 msr errselr_el1, x7 + [0-9a-f]+: d5385327 mrs x7, errselr_el1 + [0-9a-f]+: d5385405 mrs x5, erxfr_el1 + [0-9a-f]+: d5185425 msr erxctlr_el1, x5 + [0-9a-f]+: d5385425 mrs x5, erxctlr_el1 + [0-9a-f]+: d5185445 msr erxstatus_el1, x5 + [0-9a-f]+: d5385445 mrs x5, erxstatus_el1 + [0-9a-f]+: d5185465 msr erxaddr_el1, x5 + [0-9a-f]+: d5385465 mrs x5, erxaddr_el1 + [0-9a-f]+: d5185505 msr erxmisc0_el1, x5 + [0-9a-f]+: d5385505 mrs x5, erxmisc0_el1 + [0-9a-f]+: d5185525 msr erxmisc1_el1, x5 + [0-9a-f]+: d5385525 mrs x5, erxmisc1_el1 + [0-9a-f]+: d53c5265 mrs x5, vsesr_el2 + [0-9a-f]+: d518c125 msr disr_el1, x5 + [0-9a-f]+: d538c125 mrs x5, disr_el1 + [0-9a-f]+: d53cc125 mrs x5, vdisr_el2 + [0-9a-f]+: d50b7a20 dc cvac, x0 + [0-9a-f]+: d50b7b21 dc cvau, x1 + [0-9a-f]+: d50b7c22 dc cvap, x2 + [0-9a-f]+: d5087900 at s1e1rp, x0 + [0-9a-f]+: d5087921 at s1e1wp, x1 + [0-9a-f]+: d5189a07 msr pmblimitr_el1, x7 + [0-9a-f]+: d5389a07 mrs x7, pmblimitr_el1 + [0-9a-f]+: d5189a27 msr pmbptr_el1, x7 + [0-9a-f]+: d5389a27 mrs x7, pmbptr_el1 + [0-9a-f]+: d5189a67 msr pmbsr_el1, x7 + [0-9a-f]+: d5389a67 mrs x7, pmbsr_el1 + [0-9a-f]+: d5189907 msr pmscr_el1, x7 + [0-9a-f]+: d5389907 mrs x7, pmscr_el1 + [0-9a-f]+: d5189947 msr pmsicr_el1, x7 + [0-9a-f]+: d5389947 mrs x7, pmsicr_el1 + [0-9a-f]+: d5189967 msr pmsirr_el1, x7 + [0-9a-f]+: d5389967 mrs x7, pmsirr_el1 + [0-9a-f]+: d5189987 msr pmsfcr_el1, x7 + [0-9a-f]+: d5389987 mrs x7, pmsfcr_el1 + [0-9a-f]+: d51899a7 msr pmsevfr_el1, x7 + [0-9a-f]+: d53899a7 mrs x7, pmsevfr_el1 + [0-9a-f]+: d51899c7 msr pmslatfr_el1, x7 + [0-9a-f]+: d53899c7 mrs x7, pmslatfr_el1 + [0-9a-f]+: d51c9907 msr pmscr_el2, x7 + [0-9a-f]+: d53c9907 mrs x7, pmscr_el2 + [0-9a-f]+: d51d9907 msr pmscr_el12, x7 + [0-9a-f]+: d53d9907 mrs x7, pmscr_el12 + [0-9a-f]+: d5389ae7 mrs x7, pmbidr_el1 + [0-9a-f]+: d53899e7 mrs x7, pmsidr_el1 diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-2.s b/gas/testsuite/gas/aarch64/sysreg/sysreg-2.s new file mode 100644 index 0000000..ae2bb14 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-2.s @@ -0,0 +1,63 @@ +/* sysreg-2.s Test file for ARMv8.2 system registers. */ + + .macro rw_sys_reg sys_reg xreg r w + .ifc \w, 1 + msr \sys_reg, \xreg + .endif + .ifc \r, 1 + mrs \xreg, \sys_reg + .endif + .endm + + .text + + rw_sys_reg sys_reg=id_aa64mmfr1_el1 xreg=x5 r=1 w=0 + rw_sys_reg sys_reg=id_aa64mmfr2_el1 xreg=x7 r=1 w=0 + rw_sys_reg sys_reg=id_aa64mmfr3_el1 xreg=x9 r=1 w=0 + rw_sys_reg sys_reg=id_aa64mmfr4_el1 xreg=x11 r=1 w=0 + + /* RAS extension. */ + + rw_sys_reg sys_reg=erridr_el1 xreg=x5 r=1 w=0 + rw_sys_reg sys_reg=errselr_el1 xreg=x7 r=1 w=1 + + rw_sys_reg sys_reg=erxfr_el1 xreg=x5 r=1 w=0 + rw_sys_reg sys_reg=erxctlr_el1 xreg=x5 r=1 w=1 + rw_sys_reg sys_reg=erxstatus_el1 xreg=x5 r=1 w=1 + rw_sys_reg sys_reg=erxaddr_el1 xreg=x5 r=1 w=1 + + rw_sys_reg sys_reg=erxmisc0_el1 xreg=x5 r=1 w=1 + rw_sys_reg sys_reg=erxmisc1_el1 xreg=x5 r=1 w=1 + + rw_sys_reg sys_reg=vsesr_el2 xreg=x5 r=1 w=0 + rw_sys_reg sys_reg=disr_el1 xreg=x5 r=1 w=1 + rw_sys_reg sys_reg=vdisr_el2 xreg=x5 r=1 w=0 + + /* DC CVAP. */ + + dc cvac, x0 + dc cvau, x1 + dc cvap, x2 + + /* AT. */ + + at s1e1rp, x0 + at s1e1wp, x1 + + /* Statistical profiling. */ + + .irp reg, pmblimitr_el1, pmbptr_el1, pmbsr_el1 + rw_sys_reg sys_reg=\reg xreg=x7 r=1 w=1 + .endr + + .irp reg, pmscr_el1, pmsicr_el1, pmsirr_el1, pmsfcr_el1 + rw_sys_reg sys_reg=\reg xreg=x7 r=1 w=1 + .endr + + .irp reg, pmsevfr_el1, pmslatfr_el1, pmscr_el2, pmscr_el12 + rw_sys_reg sys_reg=\reg xreg=x7 r=1 w=1 + .endr + + .irp reg, pmbidr_el1, pmsidr_el1 + rw_sys_reg sys_reg=\reg xreg=x7 r=1 w=0 + .endr diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-3.d b/gas/testsuite/gas/aarch64/sysreg/sysreg-3.d new file mode 100644 index 0000000..e1c1ead --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-3.d @@ -0,0 +1,28 @@ +#objdump: -dr +#as: -march=armv8.3-a + +.*: file .* + +Disassembly of section \.text: + +0+ <.*>: + 0: d5182100 msr apiakeylo_el1, x0 + 4: d5382100 mrs x0, apiakeylo_el1 + 8: d5182121 msr apiakeyhi_el1, x1 + c: d5382121 mrs x1, apiakeyhi_el1 + 10: d5182142 msr apibkeylo_el1, x2 + 14: d5382142 mrs x2, apibkeylo_el1 + 18: d5182163 msr apibkeyhi_el1, x3 + 1c: d5382163 mrs x3, apibkeyhi_el1 + 20: d5182204 msr apdakeylo_el1, x4 + 24: d5382204 mrs x4, apdakeylo_el1 + 28: d5182225 msr apdakeyhi_el1, x5 + 2c: d5382225 mrs x5, apdakeyhi_el1 + 30: d5182246 msr apdbkeylo_el1, x6 + 34: d5382246 mrs x6, apdbkeylo_el1 + 38: d5182267 msr apdbkeyhi_el1, x7 + 3c: d5382267 mrs x7, apdbkeyhi_el1 + 40: d5182308 msr apgakeylo_el1, x8 + 44: d5382308 mrs x8, apgakeylo_el1 + 48: d5182329 msr apgakeyhi_el1, x9 + 4c: d5382329 mrs x9, apgakeyhi_el1 diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-3.s b/gas/testsuite/gas/aarch64/sysreg/sysreg-3.s new file mode 100644 index 0000000..e2ffc81 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-3.s @@ -0,0 +1,21 @@ +/* sysreg-3.s Test file for ARMv8.3 system registers. */ + + .macro test sys_reg xreg + msr \sys_reg, \xreg + mrs \xreg, \sys_reg + .endm + + .text + + test sys_reg=apiakeylo_el1 xreg=x0 + test sys_reg=apiakeyhi_el1 xreg=x1 + test sys_reg=apibkeylo_el1 xreg=x2 + test sys_reg=apibkeyhi_el1 xreg=x3 + + test sys_reg=apdakeylo_el1 xreg=x4 + test sys_reg=apdakeyhi_el1 xreg=x5 + test sys_reg=apdbkeylo_el1 xreg=x6 + test sys_reg=apdbkeyhi_el1 xreg=x7 + + test sys_reg=apgakeylo_el1 xreg=x8 + test sys_reg=apgakeyhi_el1 xreg=x9 diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-4.d b/gas/testsuite/gas/aarch64/sysreg/sysreg-4.d new file mode 100644 index 0000000..f0fffbe --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-4.d @@ -0,0 +1,59 @@ +#source: sysreg-4.s +#as: -march=armv8.5-a+rng+memtag +#objdump: -dr + +.*: file format .* + +Disassembly of section \.text: + +0+ <.*>: +.*: d50b7381 cfp rctx, x1 +.*: d50b73a2 dvp rctx, x2 +.*: d50b73e3 cpp rctx, x3 +.*: d50b7d24 dc cvadp, x4 +.*: d53b2405 mrs x5, rndr +.*: d53b2426 mrs x6, rndrrs +.*: d53bd0e7 mrs x7, scxtnum_el0 +.*: d538d0e7 mrs x7, scxtnum_el1 +.*: d53cd0e7 mrs x7, scxtnum_el2 +.*: d53ed0e7 mrs x7, scxtnum_el3 +.*: d53dd0e7 mrs x7, scxtnum_el12 +.*: d5380388 mrs x8, id_pfr2_el1 +.*: d53b42e1 mrs x1, tco +.*: d53b42e2 mrs x2, tco +.*: d5385621 mrs x1, tfsre0_el1 +.*: d5385601 mrs x1, tfsr_el1 +.*: d53c5602 mrs x2, tfsr_el2 +.*: d53e5603 mrs x3, tfsr_el3 +.*: d53d560c mrs x12, tfsr_el12 +.*: d53810a1 mrs x1, rgsr_el1 +.*: d53810c3 mrs x3, gcr_el1 +.*: d5390084 mrs x4, gmid_el1 +.*: d51b42e1 msr tco, x1 +.*: d51b42e2 msr tco, x2 +.*: d5185621 msr tfsre0_el1, x1 +.*: d5185601 msr tfsr_el1, x1 +.*: d51c5602 msr tfsr_el2, x2 +.*: d51e5603 msr tfsr_el3, x3 +.*: d51d560c msr tfsr_el12, x12 +.*: d51810a1 msr rgsr_el1, x1 +.*: d51810c3 msr gcr_el1, x3 +.*: d503419f msr tco, #0x1 +.*: d5087661 dc igvac, x1 +.*: d5087682 dc igsw, x2 +.*: d5087a83 dc cgsw, x3 +.*: d5087e84 dc cigsw, x4 +.*: d50b7a65 dc cgvac, x5 +.*: d50b7c66 dc cgvap, x6 +.*: d50b7d67 dc cgvadp, x7 +.*: d50b7e68 dc cigvac, x8 +.*: d50b7469 dc gva, x9 +.*: d50876aa dc igdvac, x10 +.*: d50876cb dc igdsw, x11 +.*: d5087acc dc cgdsw, x12 +.*: d5087ecd dc cigdsw, x13 +.*: d50b7aae dc cgdvac, x14 +.*: d50b7caf dc cgdvap, x15 +.*: d50b7db0 dc cgdvadp, x16 +.*: d50b7eb1 dc cigdvac, x17 +.*: d50b7492 dc gzva, x18 diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-4.s b/gas/testsuite/gas/aarch64/sysreg/sysreg-4.s new file mode 100644 index 0000000..769f0a6 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-4.s @@ -0,0 +1,64 @@ +/* sysreg-4.s Test file for ARMv8.5 system registers. */ +func: + cfp rctx, x1 + dvp rctx, x2 + cpp rctx, x3 + dc cvadp, x4 + mrs x5, rndr + mrs x6, rndrrs + mrs x7, scxtnum_el0 + mrs x7, scxtnum_el1 + mrs x7, scxtnum_el2 + mrs x7, scxtnum_el3 + mrs x7, scxtnum_el12 + mrs x8, id_pfr2_el1 + + # ARMv8.5-a+memtag + # MRS (register) + mrs x1, tco + mrs x2, TCO + mrs x1, tfsre0_el1 + mrs x1, TFSR_EL1 + mrs x2, TFSR_EL2 + mrs x3, TFSR_EL3 + mrs x12, TFSR_EL12 + mrs x1, rgsr_el1 + mrs x3, gcr_el1 + mrs x4, gmid_el1 + + # MSR (register) + msr tco, x1 + msr TCO, x2 + msr tfsre0_el1, x1 + msr TFSR_EL1, x1 + msr TFSR_EL2, x2 + msr TFSR_EL3, x3 + msr TFSR_EL12, x12 + msr rgsr_el1, x1 + msr gcr_el1, x3 + + # MSR (immediate) + msr TCO, #1 + + # Data cache + dc igvac, x1 + dc igsw, x2 + dc cgsw, x3 + dc cigsw, x4 + dc cgvac, x5 + dc cgvap, x6 + dc cgvadp, x7 + dc cigvac, x8 + + dc gva, x9 + + dc igdvac, x10 + dc igdsw, x11 + dc cgdsw, x12 + dc cigdsw, x13 + dc cgdvac, x14 + dc cgdvap, x15 + dc cgdvadp, x16 + dc cigdvac, x17 + + dc gzva, x18 diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-5.s b/gas/testsuite/gas/aarch64/sysreg/sysreg-5.s new file mode 100644 index 0000000..c695b1b --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-5.s @@ -0,0 +1 @@ +tlbi rvae1is, x0 diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-6.d b/gas/testsuite/gas/aarch64/sysreg/sysreg-6.d new file mode 100644 index 0000000..ac928ce --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-6.d @@ -0,0 +1,9 @@ +#objdump: -dr + +.*: file format .* + +Disassembly of section \.text: + +0+ <.*>: +[^:]+: d51c1100 msr hcr_el2, x0 +[^:]+: d53c1100 mrs x0, hcr_el2 diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-6.s b/gas/testsuite/gas/aarch64/sysreg/sysreg-6.s new file mode 100644 index 0000000..c6772ae --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-6.s @@ -0,0 +1,2 @@ +msr hcr_el2, x0 +mrs x0,hcr_el2 diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-7.d b/gas/testsuite/gas/aarch64/sysreg/sysreg-7.d new file mode 100644 index 0000000..1564f53 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-7.d @@ -0,0 +1,25 @@ +#objdump: -dr + +.*: file format .* + +Disassembly of section \.text: + +0+ <.*>: + +.*: d538a460 mrs x0, lorc_el1 +.*: d538a420 mrs x0, lorea_el1 +.*: d538a440 mrs x0, lorn_el1 +.*: d538a400 mrs x0, lorsa_el1 +.*: d53ecc80 mrs x0, icc_ctlr_el3 +.*: d538cca0 mrs x0, icc_sre_el1 +.*: d53cc9a0 mrs x0, icc_sre_el2 +.*: d53ecca0 mrs x0, icc_sre_el3 +.*: d53ccb20 mrs x0, ich_vtr_el2 +.*: d518a460 msr lorc_el1, x0 +.*: d518a420 msr lorea_el1, x0 +.*: d518a440 msr lorn_el1, x0 +.*: d518a400 msr lorsa_el1, x0 +.*: d51ecc80 msr icc_ctlr_el3, x0 +.*: d518cca0 msr icc_sre_el1, x0 +.*: d51cc9a0 msr icc_sre_el2, x0 +.*: d51ecca0 msr icc_sre_el3, x0 diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-7.s b/gas/testsuite/gas/aarch64/sysreg/sysreg-7.s new file mode 100644 index 0000000..94dd85b --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-7.s @@ -0,0 +1,22 @@ +.arch armv8-a+lor + +/* Read from system registers. */ +mrs x0, lorc_el1 +mrs x0, lorea_el1 +mrs x0, lorn_el1 +mrs x0, lorsa_el1 +mrs x0, icc_ctlr_el3 +mrs x0, icc_sre_el1 +mrs x0, icc_sre_el2 +mrs x0, icc_sre_el3 +mrs x0, ich_vtr_el2 + +/* Write to system registers. */ +msr lorc_el1, x0 +msr lorea_el1, x0 +msr lorn_el1, x0 +msr lorsa_el1, x0 +msr icc_ctlr_el3, x0 +msr icc_sre_el1, x0 +msr icc_sre_el2, x0 +msr icc_sre_el3, x0 diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-8.d b/gas/testsuite/gas/aarch64/sysreg/sysreg-8.d new file mode 100644 index 0000000..09b6724 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-8.d @@ -0,0 +1,295 @@ +#objdump: -dr + +.* + + +Disassembly of section \.text: + +0+ <\.text>: +[^:]*: d53803a0 mrs x0, id_dfr1_el1 +[^:]*: d53803c0 mrs x0, id_mmfr5_el1 +[^:]*: d53802e0 mrs x0, id_isar6_el1 +[^:]*: d5384602 mrs x2, icc_pmr_el1 +[^:]*: d5184603 msr icc_pmr_el1, x3 +[^:]*: d538c800 mrs x0, icc_iar0_el1 +[^:]*: d518c821 msr icc_eoir0_el1, x1 +[^:]*: d538c840 mrs x0, icc_hppir0_el1 +[^:]*: d538c862 mrs x2, icc_bpr0_el1 +[^:]*: d518c863 msr icc_bpr0_el1, x3 +[^:]*: d538c882 mrs x2, icc_ap0r0_el1 +[^:]*: d518c883 msr icc_ap0r0_el1, x3 +[^:]*: d538c8a2 mrs x2, icc_ap0r1_el1 +[^:]*: d518c8a3 msr icc_ap0r1_el1, x3 +[^:]*: d538c8c2 mrs x2, icc_ap0r2_el1 +[^:]*: d518c8c3 msr icc_ap0r2_el1, x3 +[^:]*: d538c8e2 mrs x2, icc_ap0r3_el1 +[^:]*: d518c8e3 msr icc_ap0r3_el1, x3 +[^:]*: d538c902 mrs x2, icc_ap1r0_el1 +[^:]*: d518c903 msr icc_ap1r0_el1, x3 +[^:]*: d538c922 mrs x2, icc_ap1r1_el1 +[^:]*: d518c923 msr icc_ap1r1_el1, x3 +[^:]*: d538c942 mrs x2, icc_ap1r2_el1 +[^:]*: d518c943 msr icc_ap1r2_el1, x3 +[^:]*: d538c962 mrs x2, icc_ap1r3_el1 +[^:]*: d518c963 msr icc_ap1r3_el1, x3 +[^:]*: d518cb21 msr icc_dir_el1, x1 +[^:]*: d538cb60 mrs x0, icc_rpr_el1 +[^:]*: d518cba1 msr icc_sgi1r_el1, x1 +[^:]*: d518cbc1 msr icc_asgi1r_el1, x1 +[^:]*: d518cbe1 msr icc_sgi0r_el1, x1 +[^:]*: d538cc00 mrs x0, icc_iar1_el1 +[^:]*: d518cc21 msr icc_eoir1_el1, x1 +[^:]*: d538cc40 mrs x0, icc_hppir1_el1 +[^:]*: d538cc62 mrs x2, icc_bpr1_el1 +[^:]*: d518cc63 msr icc_bpr1_el1, x3 +[^:]*: d538cc82 mrs x2, icc_ctlr_el1 +[^:]*: d518cc83 msr icc_ctlr_el1, x3 +[^:]*: d538ccc2 mrs x2, icc_igrpen0_el1 +[^:]*: d518ccc3 msr icc_igrpen0_el1, x3 +[^:]*: d538cce2 mrs x2, icc_igrpen1_el1 +[^:]*: d518cce3 msr icc_igrpen1_el1, x3 +[^:]*: d53cc802 mrs x2, ich_ap0r0_el2 +[^:]*: d51cc803 msr ich_ap0r0_el2, x3 +[^:]*: d53cc822 mrs x2, ich_ap0r1_el2 +[^:]*: d51cc823 msr ich_ap0r1_el2, x3 +[^:]*: d53cc842 mrs x2, ich_ap0r2_el2 +[^:]*: d51cc843 msr ich_ap0r2_el2, x3 +[^:]*: d53cc862 mrs x2, ich_ap0r3_el2 +[^:]*: d51cc863 msr ich_ap0r3_el2, x3 +[^:]*: d53cc902 mrs x2, ich_ap1r0_el2 +[^:]*: d51cc903 msr ich_ap1r0_el2, x3 +[^:]*: d53cc922 mrs x2, ich_ap1r1_el2 +[^:]*: d51cc923 msr ich_ap1r1_el2, x3 +[^:]*: d53cc942 mrs x2, ich_ap1r2_el2 +[^:]*: d51cc943 msr ich_ap1r2_el2, x3 +[^:]*: d53cc962 mrs x2, ich_ap1r3_el2 +[^:]*: d51cc963 msr ich_ap1r3_el2, x3 +[^:]*: d53ccb02 mrs x2, ich_hcr_el2 +[^:]*: d51ccb03 msr ich_hcr_el2, x3 +[^:]*: d53ccb40 mrs x0, ich_misr_el2 +[^:]*: d53ccb60 mrs x0, ich_eisr_el2 +[^:]*: d53ccba0 mrs x0, ich_elrsr_el2 +[^:]*: d53ccbe2 mrs x2, ich_vmcr_el2 +[^:]*: d51ccbe3 msr ich_vmcr_el2, x3 +[^:]*: d53ccc02 mrs x2, ich_lr0_el2 +[^:]*: d51ccc03 msr ich_lr0_el2, x3 +[^:]*: d53ccc22 mrs x2, ich_lr1_el2 +[^:]*: d51ccc23 msr ich_lr1_el2, x3 +[^:]*: d53ccc42 mrs x2, ich_lr2_el2 +[^:]*: d51ccc43 msr ich_lr2_el2, x3 +[^:]*: d53ccc62 mrs x2, ich_lr3_el2 +[^:]*: d51ccc63 msr ich_lr3_el2, x3 +[^:]*: d53ccc82 mrs x2, ich_lr4_el2 +[^:]*: d51ccc83 msr ich_lr4_el2, x3 +[^:]*: d53ccca2 mrs x2, ich_lr5_el2 +[^:]*: d51ccca3 msr ich_lr5_el2, x3 +[^:]*: d53cccc2 mrs x2, ich_lr6_el2 +[^:]*: d51cccc3 msr ich_lr6_el2, x3 +[^:]*: d53ccce2 mrs x2, ich_lr7_el2 +[^:]*: d51ccce3 msr ich_lr7_el2, x3 +[^:]*: d53ccd02 mrs x2, ich_lr8_el2 +[^:]*: d51ccd03 msr ich_lr8_el2, x3 +[^:]*: d53ccd22 mrs x2, ich_lr9_el2 +[^:]*: d51ccd23 msr ich_lr9_el2, x3 +[^:]*: d53ccd42 mrs x2, ich_lr10_el2 +[^:]*: d51ccd43 msr ich_lr10_el2, x3 +[^:]*: d53ccd62 mrs x2, ich_lr11_el2 +[^:]*: d51ccd63 msr ich_lr11_el2, x3 +[^:]*: d53ccd82 mrs x2, ich_lr12_el2 +[^:]*: d51ccd83 msr ich_lr12_el2, x3 +[^:]*: d53ccda2 mrs x2, ich_lr13_el2 +[^:]*: d51ccda3 msr ich_lr13_el2, x3 +[^:]*: d53ccdc2 mrs x2, ich_lr14_el2 +[^:]*: d51ccdc3 msr ich_lr14_el2, x3 +[^:]*: d53ccde2 mrs x2, ich_lr15_el2 +[^:]*: d51ccde3 msr ich_lr15_el2, x3 +[^:]*: d53ecce2 mrs x2, icc_igrpen1_el3 +[^:]*: d51ecce3 msr icc_igrpen1_el3, x3 +[^:]*: d538a4e0 mrs x0, lorid_el1 +[^:]*: d5390040 mrs x0, ccsidr2_el1 +[^:]*: d5381222 mrs x2, trfcr_el1 +[^:]*: d5181223 msr trfcr_el1, x3 +[^:]*: d5389ec0 mrs x0, pmmir_el1 +[^:]*: d53c1222 mrs x2, trfcr_el2 +[^:]*: d51c1223 msr trfcr_el2, x3 +[^:]*: d53d1222 mrs x2, trfcr_el12 +[^:]*: d51d1223 msr trfcr_el12, x3 +[^:]*: d53bd202 mrs x2, amcr_el0 +[^:]*: d51bd203 msr amcr_el0, x3 +[^:]*: d53bd220 mrs x0, amcfgr_el0 +[^:]*: d53bd240 mrs x0, amcgcr_el0 +[^:]*: d53bd262 mrs x2, amuserenr_el0 +[^:]*: d51bd263 msr amuserenr_el0, x3 +[^:]*: d53bd282 mrs x2, amcntenclr0_el0 +[^:]*: d51bd283 msr amcntenclr0_el0, x3 +[^:]*: d53bd2a2 mrs x2, amcntenset0_el0 +[^:]*: d51bd2a3 msr amcntenset0_el0, x3 +[^:]*: d53bd302 mrs x2, amcntenclr1_el0 +[^:]*: d51bd303 msr amcntenclr1_el0, x3 +[^:]*: d53bd322 mrs x2, amcntenset1_el0 +[^:]*: d51bd323 msr amcntenset1_el0, x3 +[^:]*: d53bd402 mrs x2, amevcntr00_el0 +[^:]*: d51bd403 msr amevcntr00_el0, x3 +[^:]*: d53bd422 mrs x2, amevcntr01_el0 +[^:]*: d51bd423 msr amevcntr01_el0, x3 +[^:]*: d53bd442 mrs x2, amevcntr02_el0 +[^:]*: d51bd443 msr amevcntr02_el0, x3 +[^:]*: d53bd462 mrs x2, amevcntr03_el0 +[^:]*: d51bd463 msr amevcntr03_el0, x3 +[^:]*: d53bd600 mrs x0, amevtyper00_el0 +[^:]*: d53bd620 mrs x0, amevtyper01_el0 +[^:]*: d53bd640 mrs x0, amevtyper02_el0 +[^:]*: d53bd660 mrs x0, amevtyper03_el0 +[^:]*: d53bdc02 mrs x2, amevcntr10_el0 +[^:]*: d51bdc03 msr amevcntr10_el0, x3 +[^:]*: d53bdc22 mrs x2, amevcntr11_el0 +[^:]*: d51bdc23 msr amevcntr11_el0, x3 +[^:]*: d53bdc42 mrs x2, amevcntr12_el0 +[^:]*: d51bdc43 msr amevcntr12_el0, x3 +[^:]*: d53bdc62 mrs x2, amevcntr13_el0 +[^:]*: d51bdc63 msr amevcntr13_el0, x3 +[^:]*: d53bdc82 mrs x2, amevcntr14_el0 +[^:]*: d51bdc83 msr amevcntr14_el0, x3 +[^:]*: d53bdca2 mrs x2, amevcntr15_el0 +[^:]*: d51bdca3 msr amevcntr15_el0, x3 +[^:]*: d53bdcc2 mrs x2, amevcntr16_el0 +[^:]*: d51bdcc3 msr amevcntr16_el0, x3 +[^:]*: d53bdce2 mrs x2, amevcntr17_el0 +[^:]*: d51bdce3 msr amevcntr17_el0, x3 +[^:]*: d53bdd02 mrs x2, amevcntr18_el0 +[^:]*: d51bdd03 msr amevcntr18_el0, x3 +[^:]*: d53bdd22 mrs x2, amevcntr19_el0 +[^:]*: d51bdd23 msr amevcntr19_el0, x3 +[^:]*: d53bdd42 mrs x2, amevcntr110_el0 +[^:]*: d51bdd43 msr amevcntr110_el0, x3 +[^:]*: d53bdd62 mrs x2, amevcntr111_el0 +[^:]*: d51bdd63 msr amevcntr111_el0, x3 +[^:]*: d53bdd82 mrs x2, amevcntr112_el0 +[^:]*: d51bdd83 msr amevcntr112_el0, x3 +[^:]*: d53bdda2 mrs x2, amevcntr113_el0 +[^:]*: d51bdda3 msr amevcntr113_el0, x3 +[^:]*: d53bddc2 mrs x2, amevcntr114_el0 +[^:]*: d51bddc3 msr amevcntr114_el0, x3 +[^:]*: d53bdde2 mrs x2, amevcntr115_el0 +[^:]*: d51bdde3 msr amevcntr115_el0, x3 +[^:]*: d53bde02 mrs x2, amevtyper10_el0 +[^:]*: d51bde03 msr amevtyper10_el0, x3 +[^:]*: d53bde22 mrs x2, amevtyper11_el0 +[^:]*: d51bde23 msr amevtyper11_el0, x3 +[^:]*: d53bde42 mrs x2, amevtyper12_el0 +[^:]*: d51bde43 msr amevtyper12_el0, x3 +[^:]*: d53bde62 mrs x2, amevtyper13_el0 +[^:]*: d51bde63 msr amevtyper13_el0, x3 +[^:]*: d53bde82 mrs x2, amevtyper14_el0 +[^:]*: d51bde83 msr amevtyper14_el0, x3 +[^:]*: d53bdea2 mrs x2, amevtyper15_el0 +[^:]*: d51bdea3 msr amevtyper15_el0, x3 +[^:]*: d53bdec2 mrs x2, amevtyper16_el0 +[^:]*: d51bdec3 msr amevtyper16_el0, x3 +[^:]*: d53bdee2 mrs x2, amevtyper17_el0 +[^:]*: d51bdee3 msr amevtyper17_el0, x3 +[^:]*: d53bdf02 mrs x2, amevtyper18_el0 +[^:]*: d51bdf03 msr amevtyper18_el0, x3 +[^:]*: d53bdf22 mrs x2, amevtyper19_el0 +[^:]*: d51bdf23 msr amevtyper19_el0, x3 +[^:]*: d53bdf42 mrs x2, amevtyper110_el0 +[^:]*: d51bdf43 msr amevtyper110_el0, x3 +[^:]*: d53bdf62 mrs x2, amevtyper111_el0 +[^:]*: d51bdf63 msr amevtyper111_el0, x3 +[^:]*: d53bdf82 mrs x2, amevtyper112_el0 +[^:]*: d51bdf83 msr amevtyper112_el0, x3 +[^:]*: d53bdfa2 mrs x2, amevtyper113_el0 +[^:]*: d51bdfa3 msr amevtyper113_el0, x3 +[^:]*: d53bdfc2 mrs x2, amevtyper114_el0 +[^:]*: d51bdfc3 msr amevtyper114_el0, x3 +[^:]*: d53bdfe2 mrs x2, amevtyper115_el0 +[^:]*: d51bdfe3 msr amevtyper115_el0, x3 +[^:]*: d53bd2c0 mrs x0, amcg1idr_el0 +[^:]*: d53be0a0 mrs x0, cntpctss_el0 +[^:]*: d53be0c0 mrs x0, cntvctss_el0 +[^:]*: d53c1182 mrs x2, hfgrtr_el2 +[^:]*: d51c1183 msr hfgrtr_el2, x3 +[^:]*: d53c11a2 mrs x2, hfgwtr_el2 +[^:]*: d51c11a3 msr hfgwtr_el2, x3 +[^:]*: d53c11c2 mrs x2, hfgitr_el2 +[^:]*: d51c11c3 msr hfgitr_el2, x3 +[^:]*: d53c3182 mrs x2, hdfgrtr_el2 +[^:]*: d51c3183 msr hdfgrtr_el2, x3 +[^:]*: d53c31a2 mrs x2, hdfgwtr_el2 +[^:]*: d51c31a3 msr hdfgwtr_el2, x3 +[^:]*: d53c31c2 mrs x2, hafgrtr_el2 +[^:]*: d51c31c3 msr hafgrtr_el2, x3 +[^:]*: d53cd802 mrs x2, amevcntvoff00_el2 +[^:]*: d51cd803 msr amevcntvoff00_el2, x3 +[^:]*: d53cd822 mrs x2, amevcntvoff01_el2 +[^:]*: d51cd823 msr amevcntvoff01_el2, x3 +[^:]*: d53cd842 mrs x2, amevcntvoff02_el2 +[^:]*: d51cd843 msr amevcntvoff02_el2, x3 +[^:]*: d53cd862 mrs x2, amevcntvoff03_el2 +[^:]*: d51cd863 msr amevcntvoff03_el2, x3 +[^:]*: d53cd882 mrs x2, amevcntvoff04_el2 +[^:]*: d51cd883 msr amevcntvoff04_el2, x3 +[^:]*: d53cd8a2 mrs x2, amevcntvoff05_el2 +[^:]*: d51cd8a3 msr amevcntvoff05_el2, x3 +[^:]*: d53cd8c2 mrs x2, amevcntvoff06_el2 +[^:]*: d51cd8c3 msr amevcntvoff06_el2, x3 +[^:]*: d53cd8e2 mrs x2, amevcntvoff07_el2 +[^:]*: d51cd8e3 msr amevcntvoff07_el2, x3 +[^:]*: d53cd902 mrs x2, amevcntvoff08_el2 +[^:]*: d51cd903 msr amevcntvoff08_el2, x3 +[^:]*: d53cd922 mrs x2, amevcntvoff09_el2 +[^:]*: d51cd923 msr amevcntvoff09_el2, x3 +[^:]*: d53cd942 mrs x2, amevcntvoff010_el2 +[^:]*: d51cd943 msr amevcntvoff010_el2, x3 +[^:]*: d53cd962 mrs x2, amevcntvoff011_el2 +[^:]*: d51cd963 msr amevcntvoff011_el2, x3 +[^:]*: d53cd982 mrs x2, amevcntvoff012_el2 +[^:]*: d51cd983 msr amevcntvoff012_el2, x3 +[^:]*: d53cd9a2 mrs x2, amevcntvoff013_el2 +[^:]*: d51cd9a3 msr amevcntvoff013_el2, x3 +[^:]*: d53cd9c2 mrs x2, amevcntvoff014_el2 +[^:]*: d51cd9c3 msr amevcntvoff014_el2, x3 +[^:]*: d53cd9e2 mrs x2, amevcntvoff015_el2 +[^:]*: d51cd9e3 msr amevcntvoff015_el2, x3 +[^:]*: d53cda02 mrs x2, amevcntvoff10_el2 +[^:]*: d51cda03 msr amevcntvoff10_el2, x3 +[^:]*: d53cda22 mrs x2, amevcntvoff11_el2 +[^:]*: d51cda23 msr amevcntvoff11_el2, x3 +[^:]*: d53cda42 mrs x2, amevcntvoff12_el2 +[^:]*: d51cda43 msr amevcntvoff12_el2, x3 +[^:]*: d53cda62 mrs x2, amevcntvoff13_el2 +[^:]*: d51cda63 msr amevcntvoff13_el2, x3 +[^:]*: d53cda82 mrs x2, amevcntvoff14_el2 +[^:]*: d51cda83 msr amevcntvoff14_el2, x3 +[^:]*: d53cdaa2 mrs x2, amevcntvoff15_el2 +[^:]*: d51cdaa3 msr amevcntvoff15_el2, x3 +[^:]*: d53cdac2 mrs x2, amevcntvoff16_el2 +[^:]*: d51cdac3 msr amevcntvoff16_el2, x3 +[^:]*: d53cdae2 mrs x2, amevcntvoff17_el2 +[^:]*: d51cdae3 msr amevcntvoff17_el2, x3 +[^:]*: d53cdb02 mrs x2, amevcntvoff18_el2 +[^:]*: d51cdb03 msr amevcntvoff18_el2, x3 +[^:]*: d53cdb22 mrs x2, amevcntvoff19_el2 +[^:]*: d51cdb23 msr amevcntvoff19_el2, x3 +[^:]*: d53cdb42 mrs x2, amevcntvoff110_el2 +[^:]*: d51cdb43 msr amevcntvoff110_el2, x3 +[^:]*: d53cdb62 mrs x2, amevcntvoff111_el2 +[^:]*: d51cdb63 msr amevcntvoff111_el2, x3 +[^:]*: d53cdb82 mrs x2, amevcntvoff112_el2 +[^:]*: d51cdb83 msr amevcntvoff112_el2, x3 +[^:]*: d53cdba2 mrs x2, amevcntvoff113_el2 +[^:]*: d51cdba3 msr amevcntvoff113_el2, x3 +[^:]*: d53cdbc2 mrs x2, amevcntvoff114_el2 +[^:]*: d51cdbc3 msr amevcntvoff114_el2, x3 +[^:]*: d53cdbe2 mrs x2, amevcntvoff115_el2 +[^:]*: d51cdbe3 msr amevcntvoff115_el2, x3 +[^:]*: d53ce0c2 mrs x2, cntpoff_el2 +[^:]*: d51ce0c3 msr cntpoff_el2, x3 +[^:]*: d5389922 mrs x2, pmsnevfr_el1 +[^:]*: d5189923 msr pmsnevfr_el1, x3 +[^:]*: d53c1242 mrs x2, hcrx_el2 +[^:]*: d51c1243 msr hcrx_el2, x3 +[^:]*: d538d0c2 mrs x2, rcwmask_el1 +[^:]*: d518d0c3 msr rcwmask_el1, x3 +[^:]*: d538d062 mrs x2, rcwsmask_el1 +[^:]*: d518d063 msr rcwsmask_el1, x3 diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-8.s b/gas/testsuite/gas/aarch64/sysreg/sysreg-8.s new file mode 100644 index 0000000..21daa8c --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-8.s @@ -0,0 +1,192 @@ + .macro roreg, name + mrs x0, \name + .endm + + .macro woreg, name + msr \name, x1 + .endm + + .macro rwreg, name + mrs x2, \name + msr \name, x3 + .endm + + roreg id_dfr1_el1 + roreg id_mmfr5_el1 + roreg id_isar6_el1 + + rwreg icc_pmr_el1 + roreg icc_iar0_el1 + woreg icc_eoir0_el1 + roreg icc_hppir0_el1 + rwreg icc_bpr0_el1 + rwreg icc_ap0r0_el1 + rwreg icc_ap0r1_el1 + rwreg icc_ap0r2_el1 + rwreg icc_ap0r3_el1 + rwreg icc_ap1r0_el1 + rwreg icc_ap1r1_el1 + rwreg icc_ap1r2_el1 + rwreg icc_ap1r3_el1 + woreg icc_dir_el1 + roreg icc_rpr_el1 + woreg icc_sgi1r_el1 + woreg icc_asgi1r_el1 + woreg icc_sgi0r_el1 + roreg icc_iar1_el1 + woreg icc_eoir1_el1 + roreg icc_hppir1_el1 + rwreg icc_bpr1_el1 + rwreg icc_ctlr_el1 + rwreg icc_igrpen0_el1 + rwreg icc_igrpen1_el1 + rwreg ich_ap0r0_el2 + rwreg ich_ap0r1_el2 + rwreg ich_ap0r2_el2 + rwreg ich_ap0r3_el2 + rwreg ich_ap1r0_el2 + rwreg ich_ap1r1_el2 + rwreg ich_ap1r2_el2 + rwreg ich_ap1r3_el2 + rwreg ich_hcr_el2 + roreg ich_misr_el2 + roreg ich_eisr_el2 + roreg ich_elrsr_el2 + rwreg ich_vmcr_el2 + rwreg ich_lr0_el2 + rwreg ich_lr1_el2 + rwreg ich_lr2_el2 + rwreg ich_lr3_el2 + rwreg ich_lr4_el2 + rwreg ich_lr5_el2 + rwreg ich_lr6_el2 + rwreg ich_lr7_el2 + rwreg ich_lr8_el2 + rwreg ich_lr9_el2 + rwreg ich_lr10_el2 + rwreg ich_lr11_el2 + rwreg ich_lr12_el2 + rwreg ich_lr13_el2 + rwreg ich_lr14_el2 + rwreg ich_lr15_el2 + rwreg icc_igrpen1_el3 + + .arch armv8.1-a + + roreg lorid_el1 + + .arch armv8.3-a + + roreg ccsidr2_el1 + + .arch armv8.4-a + + rwreg trfcr_el1 + roreg pmmir_el1 + rwreg trfcr_el2 + + rwreg trfcr_el12 + + rwreg amcr_el0 + roreg amcfgr_el0 + roreg amcgcr_el0 + rwreg amuserenr_el0 + rwreg amcntenclr0_el0 + rwreg amcntenset0_el0 + rwreg amcntenclr1_el0 + rwreg amcntenset1_el0 + rwreg amevcntr00_el0 + rwreg amevcntr01_el0 + rwreg amevcntr02_el0 + rwreg amevcntr03_el0 + roreg amevtyper00_el0 + roreg amevtyper01_el0 + roreg amevtyper02_el0 + roreg amevtyper03_el0 + rwreg amevcntr10_el0 + rwreg amevcntr11_el0 + rwreg amevcntr12_el0 + rwreg amevcntr13_el0 + rwreg amevcntr14_el0 + rwreg amevcntr15_el0 + rwreg amevcntr16_el0 + rwreg amevcntr17_el0 + rwreg amevcntr18_el0 + rwreg amevcntr19_el0 + rwreg amevcntr110_el0 + rwreg amevcntr111_el0 + rwreg amevcntr112_el0 + rwreg amevcntr113_el0 + rwreg amevcntr114_el0 + rwreg amevcntr115_el0 + rwreg amevtyper10_el0 + rwreg amevtyper11_el0 + rwreg amevtyper12_el0 + rwreg amevtyper13_el0 + rwreg amevtyper14_el0 + rwreg amevtyper15_el0 + rwreg amevtyper16_el0 + rwreg amevtyper17_el0 + rwreg amevtyper18_el0 + rwreg amevtyper19_el0 + rwreg amevtyper110_el0 + rwreg amevtyper111_el0 + rwreg amevtyper112_el0 + rwreg amevtyper113_el0 + rwreg amevtyper114_el0 + rwreg amevtyper115_el0 + + .arch armv8.6-a + + roreg amcg1idr_el0 + roreg cntpctss_el0 + roreg cntvctss_el0 + rwreg hfgrtr_el2 + rwreg hfgwtr_el2 + rwreg hfgitr_el2 + rwreg hdfgrtr_el2 + rwreg hdfgwtr_el2 + rwreg hafgrtr_el2 + rwreg amevcntvoff00_el2 + rwreg amevcntvoff01_el2 + rwreg amevcntvoff02_el2 + rwreg amevcntvoff03_el2 + rwreg amevcntvoff04_el2 + rwreg amevcntvoff05_el2 + rwreg amevcntvoff06_el2 + rwreg amevcntvoff07_el2 + rwreg amevcntvoff08_el2 + rwreg amevcntvoff09_el2 + rwreg amevcntvoff010_el2 + rwreg amevcntvoff011_el2 + rwreg amevcntvoff012_el2 + rwreg amevcntvoff013_el2 + rwreg amevcntvoff014_el2 + rwreg amevcntvoff015_el2 + rwreg amevcntvoff10_el2 + rwreg amevcntvoff11_el2 + rwreg amevcntvoff12_el2 + rwreg amevcntvoff13_el2 + rwreg amevcntvoff14_el2 + rwreg amevcntvoff15_el2 + rwreg amevcntvoff16_el2 + rwreg amevcntvoff17_el2 + rwreg amevcntvoff18_el2 + rwreg amevcntvoff19_el2 + rwreg amevcntvoff110_el2 + rwreg amevcntvoff111_el2 + rwreg amevcntvoff112_el2 + rwreg amevcntvoff113_el2 + rwreg amevcntvoff114_el2 + rwreg amevcntvoff115_el2 + rwreg cntpoff_el2 + + .arch armv8.7-a + + rwreg pmsnevfr_el1 + rwreg hcrx_el2 + + .arch armv8-a+the + + rwreg rcwmask_el1 + rwreg rcwsmask_el1 diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-diagnostic.d b/gas/testsuite/gas/aarch64/sysreg/sysreg-diagnostic.d new file mode 100644 index 0000000..55cdf09 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-diagnostic.d @@ -0,0 +1,16 @@ +#objdump: -dr -M notes +#as: -march=armv8-a +#warning_output: sysreg-diagnostic.l + +.*: file format .* + +Disassembly of section \.text: + +.* <.*>: +.*: d5130503 msr dbgdtrtx_el0, x3 +.*: d5130503 msr dbgdtrtx_el0, x3 +.*: d5330503 mrs x3, dbgdtrrx_el0 +.*: d5330503 mrs x3, dbgdtrrx_el0 +.*: d5180003 msr midr_el1, x3 // note: writing to a read-only register +.*: d5180640 msr id_aa64isar2_el1, x0 // note: writing to a read-only register +.*: d5180660 msr id_aa64isar3_el1, x0 // note: writing to a read-only register diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-diagnostic.l b/gas/testsuite/gas/aarch64/sysreg/sysreg-diagnostic.l new file mode 100644 index 0000000..df3d3e5 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-diagnostic.l @@ -0,0 +1,6 @@ +.*: Assembler messages: +.*:3: Warning: specified register cannot be written to at operand 1 -- `msr dbgdtrrx_el0,x3' +.*:5: Warning: specified register cannot be read from at operand 2 -- `mrs x3,dbgdtrtx_el0' +.*:6: Warning: specified register cannot be written to at operand 1 -- `msr midr_el1,x3' +.*:7: Warning: specified register cannot be written to at operand 1 -- `msr id_aa64isar2_el1,x0' +.*:8: Warning: specified register cannot be written to at operand 1 -- `msr id_aa64isar3_el1,x0' diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg-diagnostic.s b/gas/testsuite/gas/aarch64/sysreg/sysreg-diagnostic.s new file mode 100644 index 0000000..d8e48c6 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/sysreg-diagnostic.s @@ -0,0 +1,8 @@ +.text + msr dbgdtrtx_el0, x3 + msr dbgdtrrx_el0, x3 + mrs x3, dbgdtrrx_el0 + mrs x3, dbgdtrtx_el0 + msr midr_el1, x3 + msr id_aa64isar2_el1, x0 + msr id_aa64isar3_el1, x0 diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg.d b/gas/testsuite/gas/aarch64/sysreg/sysreg.d new file mode 100644 index 0000000..d101758 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/sysreg.d @@ -0,0 +1,35 @@ +#objdump: -dr + +.*: file format .* + +Disassembly of section \.text: + +0+ <.*>: + 0: d51b9c67 msr pmovsclr_el0, x7 + 4: d53b9c60 mrs x0, pmovsclr_el0 + 8: d51b9e67 msr pmovsset_el0, x7 + c: d53b9e60 mrs x0, pmovsset_el0 + 10: d5380140 mrs x0, id_dfr0_el1 + 14: d5380100 mrs x0, id_pfr0_el1 + 18: d5380120 mrs x0, id_pfr1_el1 + 1c: d5380160 mrs x0, id_afr0_el1 + 20: d5380180 mrs x0, id_mmfr0_el1 + 24: d53801a0 mrs x0, id_mmfr1_el1 + 28: d53801c0 mrs x0, id_mmfr2_el1 + 2c: d53801e0 mrs x0, id_mmfr3_el1 + 30: d53802c0 mrs x0, id_mmfr4_el1 + 34: d5380200 mrs x0, id_isar0_el1 + 38: d5380220 mrs x0, id_isar1_el1 + 3c: d5380240 mrs x0, id_isar2_el1 + 40: d5380260 mrs x0, id_isar3_el1 + 44: d5380280 mrs x0, id_isar4_el1 + 48: d53802a0 mrs x0, id_isar5_el1 + 4c: d538cf00 mrs x0, s3_0_c12_c15_0 + 50: d5384b00 mrs x0, s3_0_c4_c11_0 + 54: d5184b00 msr s3_0_c4_c11_0, x0 + 58: d5310300 mrs x0, trcstatr + 5c: d5110300 msr trcstatr, x0 + 60: d5380640 mrs x0, id_aa64isar2_el1 + 64: d538065e mrs x30, id_aa64isar2_el1 + 68: d5380660 mrs x0, id_aa64isar3_el1 + 6c: d538067e mrs x30, id_aa64isar3_el1 diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg.s b/gas/testsuite/gas/aarch64/sysreg/sysreg.s new file mode 100644 index 0000000..a3f5b79 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/sysreg.s @@ -0,0 +1,38 @@ + + # Test case for system registers + .text + + msr pmovsclr_el0, x7 + mrs x0, pmovsclr_el0 + + msr pmovsset_el0, x7 + mrs x0, pmovsset_el0 + + mrs x0, id_dfr0_el1 + mrs x0, id_pfr0_el1 + mrs x0, id_pfr1_el1 + mrs x0, id_afr0_el1 + mrs x0, id_mmfr0_el1 + mrs x0, id_mmfr1_el1 + mrs x0, id_mmfr2_el1 + mrs x0, id_mmfr3_el1 + mrs x0, id_mmfr4_el1 + mrs x0, id_isar0_el1 + mrs x0, id_isar1_el1 + mrs x0, id_isar2_el1 + mrs x0, id_isar3_el1 + mrs x0, id_isar4_el1 + mrs x0, id_isar5_el1 + + mrs x0, s3_0_c12_c15_0 + mrs x0, s3_0_c4_c11_0 + msr s3_0_c4_c11_0, x0 + + mrs x0, s2_1_c0_c3_0 + msr s2_1_c0_c3_0, x0 + + mrs x0, id_aa64isar2_el1 + mrs x30, id_aa64isar2_el1 + + mrs x0, id_aa64isar3_el1 + mrs x30, id_aa64isar3_el1 diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg128.d b/gas/testsuite/gas/aarch64/sysreg/sysreg128.d new file mode 100644 index 0000000..8c9f7ca --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/sysreg128.d @@ -0,0 +1,28 @@ +#objdump: -dr + +.* + + +Disassembly of section \.text: + +0+ <\.text>: +[^:]*: d5787402 mrrs x2, x3, par_el1 +[^:]*: d5587404 msrr par_el1, x4, x5 +[^:]*: d578d0c2 mrrs x2, x3, rcwmask_el1 +[^:]*: d558d0c4 msrr rcwmask_el1, x4, x5 +[^:]*: d578d062 mrrs x2, x3, rcwsmask_el1 +[^:]*: d558d064 msrr rcwsmask_el1, x4, x5 +[^:]*: d5782002 mrrs x2, x3, ttbr0_el1 +[^:]*: d5582004 msrr ttbr0_el1, x4, x5 +[^:]*: d57d2002 mrrs x2, x3, ttbr0_el12 +[^:]*: d55d2004 msrr ttbr0_el12, x4, x5 +[^:]*: d57c2002 mrrs x2, x3, ttbr0_el2 +[^:]*: d55c2004 msrr ttbr0_el2, x4, x5 +[^:]*: d5782022 mrrs x2, x3, ttbr1_el1 +[^:]*: d5582024 msrr ttbr1_el1, x4, x5 +[^:]*: d57d2022 mrrs x2, x3, ttbr1_el12 +[^:]*: d55d2024 msrr ttbr1_el12, x4, x5 +[^:]*: d57c2022 mrrs x2, x3, ttbr1_el2 +[^:]*: d55c2024 msrr ttbr1_el2, x4, x5 +[^:]*: d57c2102 mrrs x2, x3, vttbr_el2 +[^:]*: d55c2104 msrr vttbr_el2, x4, x5 \ No newline at end of file diff --git a/gas/testsuite/gas/aarch64/sysreg/sysreg128.s b/gas/testsuite/gas/aarch64/sysreg/sysreg128.s new file mode 100644 index 0000000..4093315 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/sysreg128.s @@ -0,0 +1,17 @@ + .arch armv9.4-a+d128+the + + .macro rwreg128, name + mrrs x2, x3, \name + msrr \name, x4, x5 + .endm + + rwreg128 par_el1 + rwreg128 rcwmask_el1 + rwreg128 rcwsmask_el1 + rwreg128 ttbr0_el1 + rwreg128 ttbr0_el12 + rwreg128 ttbr0_el2 + rwreg128 ttbr1_el1 + rwreg128 ttbr1_el12 + rwreg128 ttbr1_el2 + rwreg128 vttbr_el2 diff --git a/gas/testsuite/gas/aarch64/sysreg/v8-r-bad-sysregs.d b/gas/testsuite/gas/aarch64/sysreg/v8-r-bad-sysregs.d new file mode 100644 index 0000000..6677f3b --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/v8-r-bad-sysregs.d @@ -0,0 +1,3 @@ +#name: invalid system registers for Armv8-R AArch64 +#source: v8-r-bad-sysregs.s +#error_output: v8-r-bad-sysregs.l diff --git a/gas/testsuite/gas/aarch64/sysreg/v8-r-bad-sysregs.l b/gas/testsuite/gas/aarch64/sysreg/v8-r-bad-sysregs.l new file mode 100644 index 0000000..51ac298 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/v8-r-bad-sysregs.l @@ -0,0 +1,14 @@ +[^:]*: Assembler messages: +.*: Error: selected processor does not support system register name 'sctlr_el3' +.*: Error: selected processor does not support system register name 'ttbr0_el3' +.*: Error: selected processor does not support system register name 'tcr_el3' +.*: Warning: specified register cannot be written to at operand 1 -- `msr mpuir_el1,x0' +.*: Warning: specified register cannot be written to at operand 1 -- `msr mpuir_el2,x0' +.*: Error: selected processor does not support system register name 'ttbr0_el2' +.*: Error: selected processor does not support system register name 'ttbr0_el2' +.*: Error: selected processor does not support system register name 'ttbr1_el2' +.*: Error: selected processor does not support system register name 'ttbr1_el2' +.*: Error: selected processor does not support system register name 'vsttbr_el2' +.*: Error: selected processor does not support system register name 'vsttbr_el2' +.*: Error: selected processor does not support system register name 'vttbr_el2' +.*: Error: selected processor does not support system register name 'vttbr_el2' diff --git a/gas/testsuite/gas/aarch64/sysreg/v8-r-bad-sysregs.s b/gas/testsuite/gas/aarch64/sysreg/v8-r-bad-sysregs.s new file mode 100644 index 0000000..1a8f488 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/v8-r-bad-sysregs.s @@ -0,0 +1,23 @@ +// Invalid system registers for Armv8-R AArch64 +.arch armv8-r + +// No EL3 for Armv8-R +mrs x0, sctlr_el3 +msr ttbr0_el3, x0 +mrs x0, TCR_EL3 + +msr mpuir_el1, x0 // write to read-only register +msr mpuir_el2, x0 // write to read-only register + +// Four sysregs are not in R-profile: +mrs x0, ttbr0_el2 +msr ttbr0_el2, x0 + +mrs x0, ttbr1_el2 +msr ttbr1_el2, x0 + +mrs x0, vsttbr_el2 +msr vsttbr_el2, x0 + +mrs x0, vttbr_el2 +msr vttbr_el2, x0 diff --git a/gas/testsuite/gas/aarch64/sysreg/v8-r-sysregs-need-arch.d b/gas/testsuite/gas/aarch64/sysreg/v8-r-sysregs-need-arch.d new file mode 100644 index 0000000..af83196 --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/v8-r-sysregs-need-arch.d @@ -0,0 +1,3 @@ +#name: check that Armv8-R system registers are rejected without -march=armv8-r +#source: v8-r-sysregs.s +#error_output: v8-r-sysregs-need-arch.l diff --git a/gas/testsuite/gas/aarch64/sysreg/v8-r-sysregs-need-arch.l b/gas/testsuite/gas/aarch64/sysreg/v8-r-sysregs-need-arch.l new file mode 100644 index 0000000..a609afc --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/v8-r-sysregs-need-arch.l @@ -0,0 +1,141 @@ +[^:]*: Assembler messages: +.*: Error: selected processor does not support system register name 'mpuir_el1' +.*: Error: selected processor does not support system register name 'mpuir_el2' +.*: Error: selected processor does not support system register name 'prbar_el1' +.*: Error: selected processor does not support system register name 'prbar_el1' +.*: Error: selected processor does not support system register name 'prbar_el2' +.*: Error: selected processor does not support system register name 'prbar_el2' +.*: Error: selected processor does not support system register name 'prbar1_el1' +.*: Error: selected processor does not support system register name 'prbar1_el1' +.*: Error: selected processor does not support system register name 'prbar2_el1' +.*: Error: selected processor does not support system register name 'prbar2_el1' +.*: Error: selected processor does not support system register name 'prbar3_el1' +.*: Error: selected processor does not support system register name 'prbar3_el1' +.*: Error: selected processor does not support system register name 'prbar4_el1' +.*: Error: selected processor does not support system register name 'prbar4_el1' +.*: Error: selected processor does not support system register name 'prbar5_el1' +.*: Error: selected processor does not support system register name 'prbar5_el1' +.*: Error: selected processor does not support system register name 'prbar6_el1' +.*: Error: selected processor does not support system register name 'prbar6_el1' +.*: Error: selected processor does not support system register name 'prbar7_el1' +.*: Error: selected processor does not support system register name 'prbar7_el1' +.*: Error: selected processor does not support system register name 'prbar8_el1' +.*: Error: selected processor does not support system register name 'prbar8_el1' +.*: Error: selected processor does not support system register name 'prbar9_el1' +.*: Error: selected processor does not support system register name 'prbar9_el1' +.*: Error: selected processor does not support system register name 'prbar10_el1' +.*: Error: selected processor does not support system register name 'prbar10_el1' +.*: Error: selected processor does not support system register name 'prbar11_el1' +.*: Error: selected processor does not support system register name 'prbar11_el1' +.*: Error: selected processor does not support system register name 'prbar12_el1' +.*: Error: selected processor does not support system register name 'prbar12_el1' +.*: Error: selected processor does not support system register name 'prbar13_el1' +.*: Error: selected processor does not support system register name 'prbar13_el1' +.*: Error: selected processor does not support system register name 'prbar14_el1' +.*: Error: selected processor does not support system register name 'prbar14_el1' +.*: Error: selected processor does not support system register name 'prbar15_el1' +.*: Error: selected processor does not support system register name 'prbar15_el1' +.*: Error: selected processor does not support system register name 'prbar1_el2' +.*: Error: selected processor does not support system register name 'prbar1_el2' +.*: Error: selected processor does not support system register name 'prbar2_el2' +.*: Error: selected processor does not support system register name 'prbar2_el2' +.*: Error: selected processor does not support system register name 'prbar3_el2' +.*: Error: selected processor does not support system register name 'prbar3_el2' +.*: Error: selected processor does not support system register name 'prbar4_el2' +.*: Error: selected processor does not support system register name 'prbar4_el2' +.*: Error: selected processor does not support system register name 'prbar5_el2' +.*: Error: selected processor does not support system register name 'prbar5_el2' +.*: Error: selected processor does not support system register name 'prbar6_el2' +.*: Error: selected processor does not support system register name 'prbar6_el2' +.*: Error: selected processor does not support system register name 'prbar7_el2' +.*: Error: selected processor does not support system register name 'prbar7_el2' +.*: Error: selected processor does not support system register name 'prbar8_el2' +.*: Error: selected processor does not support system register name 'prbar8_el2' +.*: Error: selected processor does not support system register name 'prbar9_el2' +.*: Error: selected processor does not support system register name 'prbar9_el2' +.*: Error: selected processor does not support system register name 'prbar10_el2' +.*: Error: selected processor does not support system register name 'prbar10_el2' +.*: Error: selected processor does not support system register name 'prbar11_el2' +.*: Error: selected processor does not support system register name 'prbar11_el2' +.*: Error: selected processor does not support system register name 'prbar12_el2' +.*: Error: selected processor does not support system register name 'prbar12_el2' +.*: Error: selected processor does not support system register name 'prbar13_el2' +.*: Error: selected processor does not support system register name 'prbar13_el2' +.*: Error: selected processor does not support system register name 'prbar14_el2' +.*: Error: selected processor does not support system register name 'prbar14_el2' +.*: Error: selected processor does not support system register name 'prbar15_el2' +.*: Error: selected processor does not support system register name 'prbar15_el2' +.*: Error: selected processor does not support system register name 'prenr_el1' +.*: Error: selected processor does not support system register name 'prenr_el1' +.*: Error: selected processor does not support system register name 'prenr_el2' +.*: Error: selected processor does not support system register name 'prenr_el2' +.*: Error: selected processor does not support system register name 'prlar_el1' +.*: Error: selected processor does not support system register name 'prlar_el1' +.*: Error: selected processor does not support system register name 'prlar_el2' +.*: Error: selected processor does not support system register name 'prlar_el2' +.*: Error: selected processor does not support system register name 'prlar1_el1' +.*: Error: selected processor does not support system register name 'prlar1_el1' +.*: Error: selected processor does not support system register name 'prlar2_el1' +.*: Error: selected processor does not support system register name 'prlar2_el1' +.*: Error: selected processor does not support system register name 'prlar3_el1' +.*: Error: selected processor does not support system register name 'prlar3_el1' +.*: Error: selected processor does not support system register name 'prlar4_el1' +.*: Error: selected processor does not support system register name 'prlar4_el1' +.*: Error: selected processor does not support system register name 'prlar5_el1' +.*: Error: selected processor does not support system register name 'prlar5_el1' +.*: Error: selected processor does not support system register name 'prlar6_el1' +.*: Error: selected processor does not support system register name 'prlar6_el1' +.*: Error: selected processor does not support system register name 'prlar7_el1' +.*: Error: selected processor does not support system register name 'prlar7_el1' +.*: Error: selected processor does not support system register name 'prlar8_el1' +.*: Error: selected processor does not support system register name 'prlar8_el1' +.*: Error: selected processor does not support system register name 'prlar9_el1' +.*: Error: selected processor does not support system register name 'prlar9_el1' +.*: Error: selected processor does not support system register name 'prlar10_el1' +.*: Error: selected processor does not support system register name 'prlar10_el1' +.*: Error: selected processor does not support system register name 'prlar11_el1' +.*: Error: selected processor does not support system register name 'prlar11_el1' +.*: Error: selected processor does not support system register name 'prlar12_el1' +.*: Error: selected processor does not support system register name 'prlar12_el1' +.*: Error: selected processor does not support system register name 'prlar13_el1' +.*: Error: selected processor does not support system register name 'prlar13_el1' +.*: Error: selected processor does not support system register name 'prlar14_el1' +.*: Error: selected processor does not support system register name 'prlar14_el1' +.*: Error: selected processor does not support system register name 'prlar15_el1' +.*: Error: selected processor does not support system register name 'prlar15_el1' +.*: Error: selected processor does not support system register name 'prlar1_el2' +.*: Error: selected processor does not support system register name 'prlar1_el2' +.*: Error: selected processor does not support system register name 'prlar2_el2' +.*: Error: selected processor does not support system register name 'prlar2_el2' +.*: Error: selected processor does not support system register name 'prlar3_el2' +.*: Error: selected processor does not support system register name 'prlar3_el2' +.*: Error: selected processor does not support system register name 'prlar4_el2' +.*: Error: selected processor does not support system register name 'prlar4_el2' +.*: Error: selected processor does not support system register name 'prlar5_el2' +.*: Error: selected processor does not support system register name 'prlar5_el2' +.*: Error: selected processor does not support system register name 'prlar6_el2' +.*: Error: selected processor does not support system register name 'prlar6_el2' +.*: Error: selected processor does not support system register name 'prlar7_el2' +.*: Error: selected processor does not support system register name 'prlar7_el2' +.*: Error: selected processor does not support system register name 'prlar8_el2' +.*: Error: selected processor does not support system register name 'prlar8_el2' +.*: Error: selected processor does not support system register name 'prlar9_el2' +.*: Error: selected processor does not support system register name 'prlar9_el2' +.*: Error: selected processor does not support system register name 'prlar10_el2' +.*: Error: selected processor does not support system register name 'prlar10_el2' +.*: Error: selected processor does not support system register name 'prlar11_el2' +.*: Error: selected processor does not support system register name 'prlar11_el2' +.*: Error: selected processor does not support system register name 'prlar12_el2' +.*: Error: selected processor does not support system register name 'prlar12_el2' +.*: Error: selected processor does not support system register name 'prlar13_el2' +.*: Error: selected processor does not support system register name 'prlar13_el2' +.*: Error: selected processor does not support system register name 'prlar14_el2' +.*: Error: selected processor does not support system register name 'prlar14_el2' +.*: Error: selected processor does not support system register name 'prlar15_el2' +.*: Error: selected processor does not support system register name 'prlar15_el2' +.*: Error: selected processor does not support system register name 'prselr_el1' +.*: Error: selected processor does not support system register name 'prselr_el1' +.*: Error: selected processor does not support system register name 'prselr_el2' +.*: Error: selected processor does not support system register name 'prselr_el2' +.*: Error: selected processor does not support system register name 'vsctlr_el2' +.*: Error: selected processor does not support system register name 'vsctlr_el2' diff --git a/gas/testsuite/gas/aarch64/sysreg/v8-r-sysregs.d b/gas/testsuite/gas/aarch64/sysreg/v8-r-sysregs.d new file mode 100644 index 0000000..aa8321e --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/v8-r-sysregs.d @@ -0,0 +1,149 @@ +#name: Exhaustive test of Armv8-R system registers +#as: -march=armv8-r +#objdump: -dr -m aarch64:armv8-r + +.*: file format .* + +Disassembly of section \.text: + +0+ <.*>: +.*: d5380080 mrs x0, mpuir_el1 +.*: d53c0080 mrs x0, mpuir_el2 +.*: d5386800 mrs x0, prbar_el1 +.*: d5186800 msr prbar_el1, x0 +.*: d53c6800 mrs x0, prbar_el2 +.*: d51c6800 msr prbar_el2, x0 +.*: d5386880 mrs x0, prbar1_el1 +.*: d5186880 msr prbar1_el1, x0 +.*: d5386900 mrs x0, prbar2_el1 +.*: d5186900 msr prbar2_el1, x0 +.*: d5386980 mrs x0, prbar3_el1 +.*: d5186980 msr prbar3_el1, x0 +.*: d5386a00 mrs x0, prbar4_el1 +.*: d5186a00 msr prbar4_el1, x0 +.*: d5386a80 mrs x0, prbar5_el1 +.*: d5186a80 msr prbar5_el1, x0 +.*: d5386b00 mrs x0, prbar6_el1 +.*: d5186b00 msr prbar6_el1, x0 +.*: d5386b80 mrs x0, prbar7_el1 +.*: d5186b80 msr prbar7_el1, x0 +.*: d5386c00 mrs x0, prbar8_el1 +.*: d5186c00 msr prbar8_el1, x0 +.*: d5386c80 mrs x0, prbar9_el1 +.*: d5186c80 msr prbar9_el1, x0 +.*: d5386d00 mrs x0, prbar10_el1 +.*: d5186d00 msr prbar10_el1, x0 +.*: d5386d80 mrs x0, prbar11_el1 +.*: d5186d80 msr prbar11_el1, x0 +.*: d5386e00 mrs x0, prbar12_el1 +.*: d5186e00 msr prbar12_el1, x0 +.*: d5386e80 mrs x0, prbar13_el1 +.*: d5186e80 msr prbar13_el1, x0 +.*: d5386f00 mrs x0, prbar14_el1 +.*: d5186f00 msr prbar14_el1, x0 +.*: d5386f80 mrs x0, prbar15_el1 +.*: d5186f80 msr prbar15_el1, x0 +.*: d53c6880 mrs x0, prbar1_el2 +.*: d51c6880 msr prbar1_el2, x0 +.*: d53c6900 mrs x0, prbar2_el2 +.*: d51c6900 msr prbar2_el2, x0 +.*: d53c6980 mrs x0, prbar3_el2 +.*: d51c6980 msr prbar3_el2, x0 +.*: d53c6a00 mrs x0, prbar4_el2 +.*: d51c6a00 msr prbar4_el2, x0 +.*: d53c6a80 mrs x0, prbar5_el2 +.*: d51c6a80 msr prbar5_el2, x0 +.*: d53c6b00 mrs x0, prbar6_el2 +.*: d51c6b00 msr prbar6_el2, x0 +.*: d53c6b80 mrs x0, prbar7_el2 +.*: d51c6b80 msr prbar7_el2, x0 +.*: d53c6c00 mrs x0, prbar8_el2 +.*: d51c6c00 msr prbar8_el2, x0 +.*: d53c6c80 mrs x0, prbar9_el2 +.*: d51c6c80 msr prbar9_el2, x0 +.*: d53c6d00 mrs x0, prbar10_el2 +.*: d51c6d00 msr prbar10_el2, x0 +.*: d53c6d80 mrs x0, prbar11_el2 +.*: d51c6d80 msr prbar11_el2, x0 +.*: d53c6e00 mrs x0, prbar12_el2 +.*: d51c6e00 msr prbar12_el2, x0 +.*: d53c6e80 mrs x0, prbar13_el2 +.*: d51c6e80 msr prbar13_el2, x0 +.*: d53c6f00 mrs x0, prbar14_el2 +.*: d51c6f00 msr prbar14_el2, x0 +.*: d53c6f80 mrs x0, prbar15_el2 +.*: d51c6f80 msr prbar15_el2, x0 +.*: d5386120 mrs x0, prenr_el1 +.*: d5186120 msr prenr_el1, x0 +.*: d53c6120 mrs x0, prenr_el2 +.*: d51c6120 msr prenr_el2, x0 +.*: d5386820 mrs x0, prlar_el1 +.*: d5186820 msr prlar_el1, x0 +.*: d53c6820 mrs x0, prlar_el2 +.*: d51c6820 msr prlar_el2, x0 +.*: d53868a0 mrs x0, prlar1_el1 +.*: d51868a0 msr prlar1_el1, x0 +.*: d5386920 mrs x0, prlar2_el1 +.*: d5186920 msr prlar2_el1, x0 +.*: d53869a0 mrs x0, prlar3_el1 +.*: d51869a0 msr prlar3_el1, x0 +.*: d5386a20 mrs x0, prlar4_el1 +.*: d5186a20 msr prlar4_el1, x0 +.*: d5386aa0 mrs x0, prlar5_el1 +.*: d5186aa0 msr prlar5_el1, x0 +.*: d5386b20 mrs x0, prlar6_el1 +.*: d5186b20 msr prlar6_el1, x0 +.*: d5386ba0 mrs x0, prlar7_el1 +.*: d5186ba0 msr prlar7_el1, x0 +.*: d5386c20 mrs x0, prlar8_el1 +.*: d5186c20 msr prlar8_el1, x0 +.*: d5386ca0 mrs x0, prlar9_el1 +.*: d5186ca0 msr prlar9_el1, x0 +.*: d5386d20 mrs x0, prlar10_el1 +.*: d5186d20 msr prlar10_el1, x0 +.*: d5386da0 mrs x0, prlar11_el1 +.*: d5186da0 msr prlar11_el1, x0 +.*: d5386e20 mrs x0, prlar12_el1 +.*: d5186e20 msr prlar12_el1, x0 +.*: d5386ea0 mrs x0, prlar13_el1 +.*: d5186ea0 msr prlar13_el1, x0 +.*: d5386f20 mrs x0, prlar14_el1 +.*: d5186f20 msr prlar14_el1, x0 +.*: d5386fa0 mrs x0, prlar15_el1 +.*: d5186fa0 msr prlar15_el1, x0 +.*: d53c68a0 mrs x0, prlar1_el2 +.*: d51c68a0 msr prlar1_el2, x0 +.*: d53c6920 mrs x0, prlar2_el2 +.*: d51c6920 msr prlar2_el2, x0 +.*: d53c69a0 mrs x0, prlar3_el2 +.*: d51c69a0 msr prlar3_el2, x0 +.*: d53c6a20 mrs x0, prlar4_el2 +.*: d51c6a20 msr prlar4_el2, x0 +.*: d53c6aa0 mrs x0, prlar5_el2 +.*: d51c6aa0 msr prlar5_el2, x0 +.*: d53c6b20 mrs x0, prlar6_el2 +.*: d51c6b20 msr prlar6_el2, x0 +.*: d53c6ba0 mrs x0, prlar7_el2 +.*: d51c6ba0 msr prlar7_el2, x0 +.*: d53c6c20 mrs x0, prlar8_el2 +.*: d51c6c20 msr prlar8_el2, x0 +.*: d53c6ca0 mrs x0, prlar9_el2 +.*: d51c6ca0 msr prlar9_el2, x0 +.*: d53c6d20 mrs x0, prlar10_el2 +.*: d51c6d20 msr prlar10_el2, x0 +.*: d53c6da0 mrs x0, prlar11_el2 +.*: d51c6da0 msr prlar11_el2, x0 +.*: d53c6e20 mrs x0, prlar12_el2 +.*: d51c6e20 msr prlar12_el2, x0 +.*: d53c6ea0 mrs x0, prlar13_el2 +.*: d51c6ea0 msr prlar13_el2, x0 +.*: d53c6f20 mrs x0, prlar14_el2 +.*: d51c6f20 msr prlar14_el2, x0 +.*: d53c6fa0 mrs x0, prlar15_el2 +.*: d51c6fa0 msr prlar15_el2, x0 +.*: d5386220 mrs x0, prselr_el1 +.*: d5186220 msr prselr_el1, x0 +.*: d53c6220 mrs x0, prselr_el2 +.*: d51c6220 msr prselr_el2, x0 +.*: d53c2000 mrs x0, vsctlr_el2 +.*: d51c2000 msr vsctlr_el2, x0 diff --git a/gas/testsuite/gas/aarch64/sysreg/v8-r-sysregs.s b/gas/testsuite/gas/aarch64/sysreg/v8-r-sysregs.s new file mode 100644 index 0000000..76c80bd --- /dev/null +++ b/gas/testsuite/gas/aarch64/sysreg/v8-r-sysregs.s @@ -0,0 +1,141 @@ +// Armv8-R system registers +mrs x0, mpuir_el1 +mrs x0, mpuir_el2 +mrs x0, prbar_el1 +msr prbar_el1, x0 +mrs x0, prbar_el2 +msr prbar_el2, x0 +mrs x0, prbar1_el1 +msr prbar1_el1, x0 +mrs x0, prbar2_el1 +msr prbar2_el1, x0 +mrs x0, prbar3_el1 +msr prbar3_el1, x0 +mrs x0, prbar4_el1 +msr prbar4_el1, x0 +mrs x0, prbar5_el1 +msr prbar5_el1, x0 +mrs x0, prbar6_el1 +msr prbar6_el1, x0 +mrs x0, prbar7_el1 +msr prbar7_el1, x0 +mrs x0, prbar8_el1 +msr prbar8_el1, x0 +mrs x0, prbar9_el1 +msr prbar9_el1, x0 +mrs x0, prbar10_el1 +msr prbar10_el1, x0 +mrs x0, prbar11_el1 +msr prbar11_el1, x0 +mrs x0, prbar12_el1 +msr prbar12_el1, x0 +mrs x0, prbar13_el1 +msr prbar13_el1, x0 +mrs x0, prbar14_el1 +msr prbar14_el1, x0 +mrs x0, prbar15_el1 +msr prbar15_el1, x0 +mrs x0, prbar1_el2 +msr prbar1_el2, x0 +mrs x0, prbar2_el2 +msr prbar2_el2, x0 +mrs x0, prbar3_el2 +msr prbar3_el2, x0 +mrs x0, prbar4_el2 +msr prbar4_el2, x0 +mrs x0, prbar5_el2 +msr prbar5_el2, x0 +mrs x0, prbar6_el2 +msr prbar6_el2, x0 +mrs x0, prbar7_el2 +msr prbar7_el2, x0 +mrs x0, prbar8_el2 +msr prbar8_el2, x0 +mrs x0, prbar9_el2 +msr prbar9_el2, x0 +mrs x0, prbar10_el2 +msr prbar10_el2, x0 +mrs x0, prbar11_el2 +msr prbar11_el2, x0 +mrs x0, prbar12_el2 +msr prbar12_el2, x0 +mrs x0, prbar13_el2 +msr prbar13_el2, x0 +mrs x0, prbar14_el2 +msr prbar14_el2, x0 +mrs x0, prbar15_el2 +msr prbar15_el2, x0 +mrs x0, prenr_el1 +msr prenr_el1, x0 +mrs x0, prenr_el2 +msr prenr_el2, x0 +mrs x0, prlar_el1 +msr prlar_el1, x0 +mrs x0, prlar_el2 +msr prlar_el2, x0 +mrs x0, prlar1_el1 +msr prlar1_el1, x0 +mrs x0, prlar2_el1 +msr prlar2_el1, x0 +mrs x0, prlar3_el1 +msr prlar3_el1, x0 +mrs x0, prlar4_el1 +msr prlar4_el1, x0 +mrs x0, prlar5_el1 +msr prlar5_el1, x0 +mrs x0, prlar6_el1 +msr prlar6_el1, x0 +mrs x0, prlar7_el1 +msr prlar7_el1, x0 +mrs x0, prlar8_el1 +msr prlar8_el1, x0 +mrs x0, prlar9_el1 +msr prlar9_el1, x0 +mrs x0, prlar10_el1 +msr prlar10_el1, x0 +mrs x0, prlar11_el1 +msr prlar11_el1, x0 +mrs x0, prlar12_el1 +msr prlar12_el1, x0 +mrs x0, prlar13_el1 +msr prlar13_el1, x0 +mrs x0, prlar14_el1 +msr prlar14_el1, x0 +mrs x0, prlar15_el1 +msr prlar15_el1, x0 +mrs x0, prlar1_el2 +msr prlar1_el2, x0 +mrs x0, prlar2_el2 +msr prlar2_el2, x0 +mrs x0, prlar3_el2 +msr prlar3_el2, x0 +mrs x0, prlar4_el2 +msr prlar4_el2, x0 +mrs x0, prlar5_el2 +msr prlar5_el2, x0 +mrs x0, prlar6_el2 +msr prlar6_el2, x0 +mrs x0, prlar7_el2 +msr prlar7_el2, x0 +mrs x0, prlar8_el2 +msr prlar8_el2, x0 +mrs x0, prlar9_el2 +msr prlar9_el2, x0 +mrs x0, prlar10_el2 +msr prlar10_el2, x0 +mrs x0, prlar11_el2 +msr prlar11_el2, x0 +mrs x0, prlar12_el2 +msr prlar12_el2, x0 +mrs x0, prlar13_el2 +msr prlar13_el2, x0 +mrs x0, prlar14_el2 +msr prlar14_el2, x0 +mrs x0, prlar15_el2 +msr prlar15_el2, x0 +mrs x0, prselr_el1 +msr prselr_el1, x0 +mrs x0, prselr_el2 +msr prselr_el2, x0 +mrs x0, vsctlr_el2 +msr vsctlr_el2, x0 diff --git a/gas/testsuite/gas/aarch64/sysreg128.d b/gas/testsuite/gas/aarch64/sysreg128.d deleted file mode 100644 index 8c9f7ca..0000000 --- a/gas/testsuite/gas/aarch64/sysreg128.d +++ /dev/null @@ -1,28 +0,0 @@ -#objdump: -dr - -.* - - -Disassembly of section \.text: - -0+ <\.text>: -[^:]*: d5787402 mrrs x2, x3, par_el1 -[^:]*: d5587404 msrr par_el1, x4, x5 -[^:]*: d578d0c2 mrrs x2, x3, rcwmask_el1 -[^:]*: d558d0c4 msrr rcwmask_el1, x4, x5 -[^:]*: d578d062 mrrs x2, x3, rcwsmask_el1 -[^:]*: d558d064 msrr rcwsmask_el1, x4, x5 -[^:]*: d5782002 mrrs x2, x3, ttbr0_el1 -[^:]*: d5582004 msrr ttbr0_el1, x4, x5 -[^:]*: d57d2002 mrrs x2, x3, ttbr0_el12 -[^:]*: d55d2004 msrr ttbr0_el12, x4, x5 -[^:]*: d57c2002 mrrs x2, x3, ttbr0_el2 -[^:]*: d55c2004 msrr ttbr0_el2, x4, x5 -[^:]*: d5782022 mrrs x2, x3, ttbr1_el1 -[^:]*: d5582024 msrr ttbr1_el1, x4, x5 -[^:]*: d57d2022 mrrs x2, x3, ttbr1_el12 -[^:]*: d55d2024 msrr ttbr1_el12, x4, x5 -[^:]*: d57c2022 mrrs x2, x3, ttbr1_el2 -[^:]*: d55c2024 msrr ttbr1_el2, x4, x5 -[^:]*: d57c2102 mrrs x2, x3, vttbr_el2 -[^:]*: d55c2104 msrr vttbr_el2, x4, x5 \ No newline at end of file diff --git a/gas/testsuite/gas/aarch64/sysreg128.s b/gas/testsuite/gas/aarch64/sysreg128.s deleted file mode 100644 index 4093315..0000000 --- a/gas/testsuite/gas/aarch64/sysreg128.s +++ /dev/null @@ -1,17 +0,0 @@ - .arch armv9.4-a+d128+the - - .macro rwreg128, name - mrrs x2, x3, \name - msrr \name, x4, x5 - .endm - - rwreg128 par_el1 - rwreg128 rcwmask_el1 - rwreg128 rcwsmask_el1 - rwreg128 ttbr0_el1 - rwreg128 ttbr0_el12 - rwreg128 ttbr0_el2 - rwreg128 ttbr1_el1 - rwreg128 ttbr1_el12 - rwreg128 ttbr1_el2 - rwreg128 vttbr_el2 diff --git a/gas/testsuite/gas/aarch64/v8-r-bad-sysregs.d b/gas/testsuite/gas/aarch64/v8-r-bad-sysregs.d deleted file mode 100644 index 6677f3b..0000000 --- a/gas/testsuite/gas/aarch64/v8-r-bad-sysregs.d +++ /dev/null @@ -1,3 +0,0 @@ -#name: invalid system registers for Armv8-R AArch64 -#source: v8-r-bad-sysregs.s -#error_output: v8-r-bad-sysregs.l diff --git a/gas/testsuite/gas/aarch64/v8-r-bad-sysregs.l b/gas/testsuite/gas/aarch64/v8-r-bad-sysregs.l deleted file mode 100644 index 51ac298..0000000 --- a/gas/testsuite/gas/aarch64/v8-r-bad-sysregs.l +++ /dev/null @@ -1,14 +0,0 @@ -[^:]*: Assembler messages: -.*: Error: selected processor does not support system register name 'sctlr_el3' -.*: Error: selected processor does not support system register name 'ttbr0_el3' -.*: Error: selected processor does not support system register name 'tcr_el3' -.*: Warning: specified register cannot be written to at operand 1 -- `msr mpuir_el1,x0' -.*: Warning: specified register cannot be written to at operand 1 -- `msr mpuir_el2,x0' -.*: Error: selected processor does not support system register name 'ttbr0_el2' -.*: Error: selected processor does not support system register name 'ttbr0_el2' -.*: Error: selected processor does not support system register name 'ttbr1_el2' -.*: Error: selected processor does not support system register name 'ttbr1_el2' -.*: Error: selected processor does not support system register name 'vsttbr_el2' -.*: Error: selected processor does not support system register name 'vsttbr_el2' -.*: Error: selected processor does not support system register name 'vttbr_el2' -.*: Error: selected processor does not support system register name 'vttbr_el2' diff --git a/gas/testsuite/gas/aarch64/v8-r-bad-sysregs.s b/gas/testsuite/gas/aarch64/v8-r-bad-sysregs.s deleted file mode 100644 index 1a8f488..0000000 --- a/gas/testsuite/gas/aarch64/v8-r-bad-sysregs.s +++ /dev/null @@ -1,23 +0,0 @@ -// Invalid system registers for Armv8-R AArch64 -.arch armv8-r - -// No EL3 for Armv8-R -mrs x0, sctlr_el3 -msr ttbr0_el3, x0 -mrs x0, TCR_EL3 - -msr mpuir_el1, x0 // write to read-only register -msr mpuir_el2, x0 // write to read-only register - -// Four sysregs are not in R-profile: -mrs x0, ttbr0_el2 -msr ttbr0_el2, x0 - -mrs x0, ttbr1_el2 -msr ttbr1_el2, x0 - -mrs x0, vsttbr_el2 -msr vsttbr_el2, x0 - -mrs x0, vttbr_el2 -msr vttbr_el2, x0 diff --git a/gas/testsuite/gas/aarch64/v8-r-sysregs-need-arch.d b/gas/testsuite/gas/aarch64/v8-r-sysregs-need-arch.d deleted file mode 100644 index af83196..0000000 --- a/gas/testsuite/gas/aarch64/v8-r-sysregs-need-arch.d +++ /dev/null @@ -1,3 +0,0 @@ -#name: check that Armv8-R system registers are rejected without -march=armv8-r -#source: v8-r-sysregs.s -#error_output: v8-r-sysregs-need-arch.l diff --git a/gas/testsuite/gas/aarch64/v8-r-sysregs-need-arch.l b/gas/testsuite/gas/aarch64/v8-r-sysregs-need-arch.l deleted file mode 100644 index a609afc..0000000 --- a/gas/testsuite/gas/aarch64/v8-r-sysregs-need-arch.l +++ /dev/null @@ -1,141 +0,0 @@ -[^:]*: Assembler messages: -.*: Error: selected processor does not support system register name 'mpuir_el1' -.*: Error: selected processor does not support system register name 'mpuir_el2' -.*: Error: selected processor does not support system register name 'prbar_el1' -.*: Error: selected processor does not support system register name 'prbar_el1' -.*: Error: selected processor does not support system register name 'prbar_el2' -.*: Error: selected processor does not support system register name 'prbar_el2' -.*: Error: selected processor does not support system register name 'prbar1_el1' -.*: Error: selected processor does not support system register name 'prbar1_el1' -.*: Error: selected processor does not support system register name 'prbar2_el1' -.*: Error: selected processor does not support system register name 'prbar2_el1' -.*: Error: selected processor does not support system register name 'prbar3_el1' -.*: Error: selected processor does not support system register name 'prbar3_el1' -.*: Error: selected processor does not support system register name 'prbar4_el1' -.*: Error: selected processor does not support system register name 'prbar4_el1' -.*: Error: selected processor does not support system register name 'prbar5_el1' -.*: Error: selected processor does not support system register name 'prbar5_el1' -.*: Error: selected processor does not support system register name 'prbar6_el1' -.*: Error: selected processor does not support system register name 'prbar6_el1' -.*: Error: selected processor does not support system register name 'prbar7_el1' -.*: Error: selected processor does not support system register name 'prbar7_el1' -.*: Error: selected processor does not support system register name 'prbar8_el1' -.*: Error: selected processor does not support system register name 'prbar8_el1' -.*: Error: selected processor does not support system register name 'prbar9_el1' -.*: Error: selected processor does not support system register name 'prbar9_el1' -.*: Error: selected processor does not support system register name 'prbar10_el1' -.*: Error: selected processor does not support system register name 'prbar10_el1' -.*: Error: selected processor does not support system register name 'prbar11_el1' -.*: Error: selected processor does not support system register name 'prbar11_el1' -.*: Error: selected processor does not support system register name 'prbar12_el1' -.*: Error: selected processor does not support system register name 'prbar12_el1' -.*: Error: selected processor does not support system register name 'prbar13_el1' -.*: Error: selected processor does not support system register name 'prbar13_el1' -.*: Error: selected processor does not support system register name 'prbar14_el1' -.*: Error: selected processor does not support system register name 'prbar14_el1' -.*: Error: selected processor does not support system register name 'prbar15_el1' -.*: Error: selected processor does not support system register name 'prbar15_el1' -.*: Error: selected processor does not support system register name 'prbar1_el2' -.*: Error: selected processor does not support system register name 'prbar1_el2' -.*: Error: selected processor does not support system register name 'prbar2_el2' -.*: Error: selected processor does not support system register name 'prbar2_el2' -.*: Error: selected processor does not support system register name 'prbar3_el2' -.*: Error: selected processor does not support system register name 'prbar3_el2' -.*: Error: selected processor does not support system register name 'prbar4_el2' -.*: Error: selected processor does not support system register name 'prbar4_el2' -.*: Error: selected processor does not support system register name 'prbar5_el2' -.*: Error: selected processor does not support system register name 'prbar5_el2' -.*: Error: selected processor does not support system register name 'prbar6_el2' -.*: Error: selected processor does not support system register name 'prbar6_el2' -.*: Error: selected processor does not support system register name 'prbar7_el2' -.*: Error: selected processor does not support system register name 'prbar7_el2' -.*: Error: selected processor does not support system register name 'prbar8_el2' -.*: Error: selected processor does not support system register name 'prbar8_el2' -.*: Error: selected processor does not support system register name 'prbar9_el2' -.*: Error: selected processor does not support system register name 'prbar9_el2' -.*: Error: selected processor does not support system register name 'prbar10_el2' -.*: Error: selected processor does not support system register name 'prbar10_el2' -.*: Error: selected processor does not support system register name 'prbar11_el2' -.*: Error: selected processor does not support system register name 'prbar11_el2' -.*: Error: selected processor does not support system register name 'prbar12_el2' -.*: Error: selected processor does not support system register name 'prbar12_el2' -.*: Error: selected processor does not support system register name 'prbar13_el2' -.*: Error: selected processor does not support system register name 'prbar13_el2' -.*: Error: selected processor does not support system register name 'prbar14_el2' -.*: Error: selected processor does not support system register name 'prbar14_el2' -.*: Error: selected processor does not support system register name 'prbar15_el2' -.*: Error: selected processor does not support system register name 'prbar15_el2' -.*: Error: selected processor does not support system register name 'prenr_el1' -.*: Error: selected processor does not support system register name 'prenr_el1' -.*: Error: selected processor does not support system register name 'prenr_el2' -.*: Error: selected processor does not support system register name 'prenr_el2' -.*: Error: selected processor does not support system register name 'prlar_el1' -.*: Error: selected processor does not support system register name 'prlar_el1' -.*: Error: selected processor does not support system register name 'prlar_el2' -.*: Error: selected processor does not support system register name 'prlar_el2' -.*: Error: selected processor does not support system register name 'prlar1_el1' -.*: Error: selected processor does not support system register name 'prlar1_el1' -.*: Error: selected processor does not support system register name 'prlar2_el1' -.*: Error: selected processor does not support system register name 'prlar2_el1' -.*: Error: selected processor does not support system register name 'prlar3_el1' -.*: Error: selected processor does not support system register name 'prlar3_el1' -.*: Error: selected processor does not support system register name 'prlar4_el1' -.*: Error: selected processor does not support system register name 'prlar4_el1' -.*: Error: selected processor does not support system register name 'prlar5_el1' -.*: Error: selected processor does not support system register name 'prlar5_el1' -.*: Error: selected processor does not support system register name 'prlar6_el1' -.*: Error: selected processor does not support system register name 'prlar6_el1' -.*: Error: selected processor does not support system register name 'prlar7_el1' -.*: Error: selected processor does not support system register name 'prlar7_el1' -.*: Error: selected processor does not support system register name 'prlar8_el1' -.*: Error: selected processor does not support system register name 'prlar8_el1' -.*: Error: selected processor does not support system register name 'prlar9_el1' -.*: Error: selected processor does not support system register name 'prlar9_el1' -.*: Error: selected processor does not support system register name 'prlar10_el1' -.*: Error: selected processor does not support system register name 'prlar10_el1' -.*: Error: selected processor does not support system register name 'prlar11_el1' -.*: Error: selected processor does not support system register name 'prlar11_el1' -.*: Error: selected processor does not support system register name 'prlar12_el1' -.*: Error: selected processor does not support system register name 'prlar12_el1' -.*: Error: selected processor does not support system register name 'prlar13_el1' -.*: Error: selected processor does not support system register name 'prlar13_el1' -.*: Error: selected processor does not support system register name 'prlar14_el1' -.*: Error: selected processor does not support system register name 'prlar14_el1' -.*: Error: selected processor does not support system register name 'prlar15_el1' -.*: Error: selected processor does not support system register name 'prlar15_el1' -.*: Error: selected processor does not support system register name 'prlar1_el2' -.*: Error: selected processor does not support system register name 'prlar1_el2' -.*: Error: selected processor does not support system register name 'prlar2_el2' -.*: Error: selected processor does not support system register name 'prlar2_el2' -.*: Error: selected processor does not support system register name 'prlar3_el2' -.*: Error: selected processor does not support system register name 'prlar3_el2' -.*: Error: selected processor does not support system register name 'prlar4_el2' -.*: Error: selected processor does not support system register name 'prlar4_el2' -.*: Error: selected processor does not support system register name 'prlar5_el2' -.*: Error: selected processor does not support system register name 'prlar5_el2' -.*: Error: selected processor does not support system register name 'prlar6_el2' -.*: Error: selected processor does not support system register name 'prlar6_el2' -.*: Error: selected processor does not support system register name 'prlar7_el2' -.*: Error: selected processor does not support system register name 'prlar7_el2' -.*: Error: selected processor does not support system register name 'prlar8_el2' -.*: Error: selected processor does not support system register name 'prlar8_el2' -.*: Error: selected processor does not support system register name 'prlar9_el2' -.*: Error: selected processor does not support system register name 'prlar9_el2' -.*: Error: selected processor does not support system register name 'prlar10_el2' -.*: Error: selected processor does not support system register name 'prlar10_el2' -.*: Error: selected processor does not support system register name 'prlar11_el2' -.*: Error: selected processor does not support system register name 'prlar11_el2' -.*: Error: selected processor does not support system register name 'prlar12_el2' -.*: Error: selected processor does not support system register name 'prlar12_el2' -.*: Error: selected processor does not support system register name 'prlar13_el2' -.*: Error: selected processor does not support system register name 'prlar13_el2' -.*: Error: selected processor does not support system register name 'prlar14_el2' -.*: Error: selected processor does not support system register name 'prlar14_el2' -.*: Error: selected processor does not support system register name 'prlar15_el2' -.*: Error: selected processor does not support system register name 'prlar15_el2' -.*: Error: selected processor does not support system register name 'prselr_el1' -.*: Error: selected processor does not support system register name 'prselr_el1' -.*: Error: selected processor does not support system register name 'prselr_el2' -.*: Error: selected processor does not support system register name 'prselr_el2' -.*: Error: selected processor does not support system register name 'vsctlr_el2' -.*: Error: selected processor does not support system register name 'vsctlr_el2' diff --git a/gas/testsuite/gas/aarch64/v8-r-sysregs.d b/gas/testsuite/gas/aarch64/v8-r-sysregs.d deleted file mode 100644 index aa8321e..0000000 --- a/gas/testsuite/gas/aarch64/v8-r-sysregs.d +++ /dev/null @@ -1,149 +0,0 @@ -#name: Exhaustive test of Armv8-R system registers -#as: -march=armv8-r -#objdump: -dr -m aarch64:armv8-r - -.*: file format .* - -Disassembly of section \.text: - -0+ <.*>: -.*: d5380080 mrs x0, mpuir_el1 -.*: d53c0080 mrs x0, mpuir_el2 -.*: d5386800 mrs x0, prbar_el1 -.*: d5186800 msr prbar_el1, x0 -.*: d53c6800 mrs x0, prbar_el2 -.*: d51c6800 msr prbar_el2, x0 -.*: d5386880 mrs x0, prbar1_el1 -.*: d5186880 msr prbar1_el1, x0 -.*: d5386900 mrs x0, prbar2_el1 -.*: d5186900 msr prbar2_el1, x0 -.*: d5386980 mrs x0, prbar3_el1 -.*: d5186980 msr prbar3_el1, x0 -.*: d5386a00 mrs x0, prbar4_el1 -.*: d5186a00 msr prbar4_el1, x0 -.*: d5386a80 mrs x0, prbar5_el1 -.*: d5186a80 msr prbar5_el1, x0 -.*: d5386b00 mrs x0, prbar6_el1 -.*: d5186b00 msr prbar6_el1, x0 -.*: d5386b80 mrs x0, prbar7_el1 -.*: d5186b80 msr prbar7_el1, x0 -.*: d5386c00 mrs x0, prbar8_el1 -.*: d5186c00 msr prbar8_el1, x0 -.*: d5386c80 mrs x0, prbar9_el1 -.*: d5186c80 msr prbar9_el1, x0 -.*: d5386d00 mrs x0, prbar10_el1 -.*: d5186d00 msr prbar10_el1, x0 -.*: d5386d80 mrs x0, prbar11_el1 -.*: d5186d80 msr prbar11_el1, x0 -.*: d5386e00 mrs x0, prbar12_el1 -.*: d5186e00 msr prbar12_el1, x0 -.*: d5386e80 mrs x0, prbar13_el1 -.*: d5186e80 msr prbar13_el1, x0 -.*: d5386f00 mrs x0, prbar14_el1 -.*: d5186f00 msr prbar14_el1, x0 -.*: d5386f80 mrs x0, prbar15_el1 -.*: d5186f80 msr prbar15_el1, x0 -.*: d53c6880 mrs x0, prbar1_el2 -.*: d51c6880 msr prbar1_el2, x0 -.*: d53c6900 mrs x0, prbar2_el2 -.*: d51c6900 msr prbar2_el2, x0 -.*: d53c6980 mrs x0, prbar3_el2 -.*: d51c6980 msr prbar3_el2, x0 -.*: d53c6a00 mrs x0, prbar4_el2 -.*: d51c6a00 msr prbar4_el2, x0 -.*: d53c6a80 mrs x0, prbar5_el2 -.*: d51c6a80 msr prbar5_el2, x0 -.*: d53c6b00 mrs x0, prbar6_el2 -.*: d51c6b00 msr prbar6_el2, x0 -.*: d53c6b80 mrs x0, prbar7_el2 -.*: d51c6b80 msr prbar7_el2, x0 -.*: d53c6c00 mrs x0, prbar8_el2 -.*: d51c6c00 msr prbar8_el2, x0 -.*: d53c6c80 mrs x0, prbar9_el2 -.*: d51c6c80 msr prbar9_el2, x0 -.*: d53c6d00 mrs x0, prbar10_el2 -.*: d51c6d00 msr prbar10_el2, x0 -.*: d53c6d80 mrs x0, prbar11_el2 -.*: d51c6d80 msr prbar11_el2, x0 -.*: d53c6e00 mrs x0, prbar12_el2 -.*: d51c6e00 msr prbar12_el2, x0 -.*: d53c6e80 mrs x0, prbar13_el2 -.*: d51c6e80 msr prbar13_el2, x0 -.*: d53c6f00 mrs x0, prbar14_el2 -.*: d51c6f00 msr prbar14_el2, x0 -.*: d53c6f80 mrs x0, prbar15_el2 -.*: d51c6f80 msr prbar15_el2, x0 -.*: d5386120 mrs x0, prenr_el1 -.*: d5186120 msr prenr_el1, x0 -.*: d53c6120 mrs x0, prenr_el2 -.*: d51c6120 msr prenr_el2, x0 -.*: d5386820 mrs x0, prlar_el1 -.*: d5186820 msr prlar_el1, x0 -.*: d53c6820 mrs x0, prlar_el2 -.*: d51c6820 msr prlar_el2, x0 -.*: d53868a0 mrs x0, prlar1_el1 -.*: d51868a0 msr prlar1_el1, x0 -.*: d5386920 mrs x0, prlar2_el1 -.*: d5186920 msr prlar2_el1, x0 -.*: d53869a0 mrs x0, prlar3_el1 -.*: d51869a0 msr prlar3_el1, x0 -.*: d5386a20 mrs x0, prlar4_el1 -.*: d5186a20 msr prlar4_el1, x0 -.*: d5386aa0 mrs x0, prlar5_el1 -.*: d5186aa0 msr prlar5_el1, x0 -.*: d5386b20 mrs x0, prlar6_el1 -.*: d5186b20 msr prlar6_el1, x0 -.*: d5386ba0 mrs x0, prlar7_el1 -.*: d5186ba0 msr prlar7_el1, x0 -.*: d5386c20 mrs x0, prlar8_el1 -.*: d5186c20 msr prlar8_el1, x0 -.*: d5386ca0 mrs x0, prlar9_el1 -.*: d5186ca0 msr prlar9_el1, x0 -.*: d5386d20 mrs x0, prlar10_el1 -.*: d5186d20 msr prlar10_el1, x0 -.*: d5386da0 mrs x0, prlar11_el1 -.*: d5186da0 msr prlar11_el1, x0 -.*: d5386e20 mrs x0, prlar12_el1 -.*: d5186e20 msr prlar12_el1, x0 -.*: d5386ea0 mrs x0, prlar13_el1 -.*: d5186ea0 msr prlar13_el1, x0 -.*: d5386f20 mrs x0, prlar14_el1 -.*: d5186f20 msr prlar14_el1, x0 -.*: d5386fa0 mrs x0, prlar15_el1 -.*: d5186fa0 msr prlar15_el1, x0 -.*: d53c68a0 mrs x0, prlar1_el2 -.*: d51c68a0 msr prlar1_el2, x0 -.*: d53c6920 mrs x0, prlar2_el2 -.*: d51c6920 msr prlar2_el2, x0 -.*: d53c69a0 mrs x0, prlar3_el2 -.*: d51c69a0 msr prlar3_el2, x0 -.*: d53c6a20 mrs x0, prlar4_el2 -.*: d51c6a20 msr prlar4_el2, x0 -.*: d53c6aa0 mrs x0, prlar5_el2 -.*: d51c6aa0 msr prlar5_el2, x0 -.*: d53c6b20 mrs x0, prlar6_el2 -.*: d51c6b20 msr prlar6_el2, x0 -.*: d53c6ba0 mrs x0, prlar7_el2 -.*: d51c6ba0 msr prlar7_el2, x0 -.*: d53c6c20 mrs x0, prlar8_el2 -.*: d51c6c20 msr prlar8_el2, x0 -.*: d53c6ca0 mrs x0, prlar9_el2 -.*: d51c6ca0 msr prlar9_el2, x0 -.*: d53c6d20 mrs x0, prlar10_el2 -.*: d51c6d20 msr prlar10_el2, x0 -.*: d53c6da0 mrs x0, prlar11_el2 -.*: d51c6da0 msr prlar11_el2, x0 -.*: d53c6e20 mrs x0, prlar12_el2 -.*: d51c6e20 msr prlar12_el2, x0 -.*: d53c6ea0 mrs x0, prlar13_el2 -.*: d51c6ea0 msr prlar13_el2, x0 -.*: d53c6f20 mrs x0, prlar14_el2 -.*: d51c6f20 msr prlar14_el2, x0 -.*: d53c6fa0 mrs x0, prlar15_el2 -.*: d51c6fa0 msr prlar15_el2, x0 -.*: d5386220 mrs x0, prselr_el1 -.*: d5186220 msr prselr_el1, x0 -.*: d53c6220 mrs x0, prselr_el2 -.*: d51c6220 msr prselr_el2, x0 -.*: d53c2000 mrs x0, vsctlr_el2 -.*: d51c2000 msr vsctlr_el2, x0 diff --git a/gas/testsuite/gas/aarch64/v8-r-sysregs.s b/gas/testsuite/gas/aarch64/v8-r-sysregs.s deleted file mode 100644 index 76c80bd..0000000 --- a/gas/testsuite/gas/aarch64/v8-r-sysregs.s +++ /dev/null @@ -1,141 +0,0 @@ -// Armv8-R system registers -mrs x0, mpuir_el1 -mrs x0, mpuir_el2 -mrs x0, prbar_el1 -msr prbar_el1, x0 -mrs x0, prbar_el2 -msr prbar_el2, x0 -mrs x0, prbar1_el1 -msr prbar1_el1, x0 -mrs x0, prbar2_el1 -msr prbar2_el1, x0 -mrs x0, prbar3_el1 -msr prbar3_el1, x0 -mrs x0, prbar4_el1 -msr prbar4_el1, x0 -mrs x0, prbar5_el1 -msr prbar5_el1, x0 -mrs x0, prbar6_el1 -msr prbar6_el1, x0 -mrs x0, prbar7_el1 -msr prbar7_el1, x0 -mrs x0, prbar8_el1 -msr prbar8_el1, x0 -mrs x0, prbar9_el1 -msr prbar9_el1, x0 -mrs x0, prbar10_el1 -msr prbar10_el1, x0 -mrs x0, prbar11_el1 -msr prbar11_el1, x0 -mrs x0, prbar12_el1 -msr prbar12_el1, x0 -mrs x0, prbar13_el1 -msr prbar13_el1, x0 -mrs x0, prbar14_el1 -msr prbar14_el1, x0 -mrs x0, prbar15_el1 -msr prbar15_el1, x0 -mrs x0, prbar1_el2 -msr prbar1_el2, x0 -mrs x0, prbar2_el2 -msr prbar2_el2, x0 -mrs x0, prbar3_el2 -msr prbar3_el2, x0 -mrs x0, prbar4_el2 -msr prbar4_el2, x0 -mrs x0, prbar5_el2 -msr prbar5_el2, x0 -mrs x0, prbar6_el2 -msr prbar6_el2, x0 -mrs x0, prbar7_el2 -msr prbar7_el2, x0 -mrs x0, prbar8_el2 -msr prbar8_el2, x0 -mrs x0, prbar9_el2 -msr prbar9_el2, x0 -mrs x0, prbar10_el2 -msr prbar10_el2, x0 -mrs x0, prbar11_el2 -msr prbar11_el2, x0 -mrs x0, prbar12_el2 -msr prbar12_el2, x0 -mrs x0, prbar13_el2 -msr prbar13_el2, x0 -mrs x0, prbar14_el2 -msr prbar14_el2, x0 -mrs x0, prbar15_el2 -msr prbar15_el2, x0 -mrs x0, prenr_el1 -msr prenr_el1, x0 -mrs x0, prenr_el2 -msr prenr_el2, x0 -mrs x0, prlar_el1 -msr prlar_el1, x0 -mrs x0, prlar_el2 -msr prlar_el2, x0 -mrs x0, prlar1_el1 -msr prlar1_el1, x0 -mrs x0, prlar2_el1 -msr prlar2_el1, x0 -mrs x0, prlar3_el1 -msr prlar3_el1, x0 -mrs x0, prlar4_el1 -msr prlar4_el1, x0 -mrs x0, prlar5_el1 -msr prlar5_el1, x0 -mrs x0, prlar6_el1 -msr prlar6_el1, x0 -mrs x0, prlar7_el1 -msr prlar7_el1, x0 -mrs x0, prlar8_el1 -msr prlar8_el1, x0 -mrs x0, prlar9_el1 -msr prlar9_el1, x0 -mrs x0, prlar10_el1 -msr prlar10_el1, x0 -mrs x0, prlar11_el1 -msr prlar11_el1, x0 -mrs x0, prlar12_el1 -msr prlar12_el1, x0 -mrs x0, prlar13_el1 -msr prlar13_el1, x0 -mrs x0, prlar14_el1 -msr prlar14_el1, x0 -mrs x0, prlar15_el1 -msr prlar15_el1, x0 -mrs x0, prlar1_el2 -msr prlar1_el2, x0 -mrs x0, prlar2_el2 -msr prlar2_el2, x0 -mrs x0, prlar3_el2 -msr prlar3_el2, x0 -mrs x0, prlar4_el2 -msr prlar4_el2, x0 -mrs x0, prlar5_el2 -msr prlar5_el2, x0 -mrs x0, prlar6_el2 -msr prlar6_el2, x0 -mrs x0, prlar7_el2 -msr prlar7_el2, x0 -mrs x0, prlar8_el2 -msr prlar8_el2, x0 -mrs x0, prlar9_el2 -msr prlar9_el2, x0 -mrs x0, prlar10_el2 -msr prlar10_el2, x0 -mrs x0, prlar11_el2 -msr prlar11_el2, x0 -mrs x0, prlar12_el2 -msr prlar12_el2, x0 -mrs x0, prlar13_el2 -msr prlar13_el2, x0 -mrs x0, prlar14_el2 -msr prlar14_el2, x0 -mrs x0, prlar15_el2 -msr prlar15_el2, x0 -mrs x0, prselr_el1 -msr prselr_el1, x0 -mrs x0, prselr_el2 -msr prselr_el2, x0 -mrs x0, vsctlr_el2 -msr vsctlr_el2, x0 -- cgit v1.1