From 032eb4f71898d77f10c44f115f26e9a0680d3906 Mon Sep 17 00:00:00 2001 From: Claudio Bantaloukas Date: Mon, 10 Jun 2024 13:18:52 +0000 Subject: aarch64: Add support for Armv9.5-A architecture The new -march=armv9.5-a flag enables access to the mandatory cpa, lut and faminmax extensions. Existing test cases for features are extended to verify they work without additional flags. --- gas/NEWS | 2 ++ gas/config/tc-aarch64.c | 1 + gas/doc/c-aarch64.texi | 3 ++- gas/testsuite/gas/aarch64/advsimd-faminmax.d | 3 ++- gas/testsuite/gas/aarch64/advsimd-lut.d | 1 + gas/testsuite/gas/aarch64/armv9_5.d | 10 ++++++++++ gas/testsuite/gas/aarch64/armv9_5.s | 9 +++++++++ gas/testsuite/gas/aarch64/cpa-addsub.d | 1 + gas/testsuite/gas/aarch64/cpa-sve.d | 1 + gas/testsuite/gas/aarch64/sme2-faminmax.d | 1 + gas/testsuite/gas/aarch64/sve2-faminmax.d | 3 ++- gas/testsuite/gas/aarch64/sve2-lut.d | 3 ++- include/opcode/aarch64.h | 8 ++++++++ 13 files changed, 42 insertions(+), 4 deletions(-) create mode 100644 gas/testsuite/gas/aarch64/armv9_5.d create mode 100644 gas/testsuite/gas/aarch64/armv9_5.s diff --git a/gas/NEWS b/gas/NEWS index 332ad1e..d0eb0f7 100644 --- a/gas/NEWS +++ b/gas/NEWS @@ -1,5 +1,7 @@ -*- text -*- +* Add support for 'armv9.5-a' for -march in AArch64 GAS. + * In x86 Intel syntax undue mnemonic suffixes are now warned about. This is a first step towards rejecting their use where unjustified. diff --git a/gas/config/tc-aarch64.c b/gas/config/tc-aarch64.c index 5d15ee9..42c03bd 100644 --- a/gas/config/tc-aarch64.c +++ b/gas/config/tc-aarch64.c @@ -10595,6 +10595,7 @@ static const struct aarch64_arch_option_table aarch64_archs[] = { {"armv9.2-a", AARCH64_ARCH_FEATURES (V9_2A)}, {"armv9.3-a", AARCH64_ARCH_FEATURES (V9_3A)}, {"armv9.4-a", AARCH64_ARCH_FEATURES (V9_4A)}, + {"armv9.5-a", AARCH64_ARCH_FEATURES (V9_5A)}, {NULL, AARCH64_NO_FEATURES} }; diff --git a/gas/doc/c-aarch64.texi b/gas/doc/c-aarch64.texi index 157c7b2..2126304 100644 --- a/gas/doc/c-aarch64.texi +++ b/gas/doc/c-aarch64.texi @@ -116,7 +116,7 @@ following architecture names are recognized: @code{armv8-a}, @code{armv8.1-a}, @code{armv8.2-a}, @code{armv8.3-a}, @code{armv8.4-a} @code{armv8.5-a}, @code{armv8.6-a}, @code{armv8.7-a}, @code{armv8.8-a}, @code{armv8.9-a}, @code{armv8-r}, @code{armv9-a}, @code{armv9.1-a}, -@code{armv9.2-a}, @code{armv9.3-a} and @code{armv9.4-a}. +@code{armv9.2-a}, @code{armv9.3-a}, @code{armv9.4-a} and @code{armv9.5-a}. If both @option{-mcpu} and @option{-march} are specified, the assembler will use the setting for @option{-mcpu}. If neither are @@ -334,6 +334,7 @@ automatically cause those extensions to be disabled. @item @code{armv9.2-a} @tab @code{armv9.1-a}, @code{armv8.7-a} @item @code{armv9.3-a} @tab @code{armv9.2-a}, @code{armv8.8-a} @item @code{armv9.4-a} @tab @code{armv9.3-a}, @code{armv8.9-a} +@item @code{armv9.5-a} @tab @code{armv9.4-a}, @code{cpa}, @code{lut}, @code{faminmax} @item @code{armv8-r} @tab @code{armv8.4-a+nolor} @end multitable diff --git a/gas/testsuite/gas/aarch64/advsimd-faminmax.d b/gas/testsuite/gas/aarch64/advsimd-faminmax.d index 96df2a7..486e404 100644 --- a/gas/testsuite/gas/aarch64/advsimd-faminmax.d +++ b/gas/testsuite/gas/aarch64/advsimd-faminmax.d @@ -1,4 +1,5 @@ #objdump: -dr +#as: -march=armv9.5-a #as: -march=armv8-a+faminmax .*: file format .* @@ -57,4 +58,4 @@ Disassembly of section \.text: [^:]+: 6ee0dfe0 famin v0.2d, v31.2d, v0.2d [^:]+: 6effdc00 famin v0.2d, v0.2d, v31.2d [^:]+: 6ef0ddd2 famin v18.2d, v14.2d, v16.2d -[^:]+: 2ef3dc23 .inst 0x2ef3dc23 ; undefined \ No newline at end of file +[^:]+: 2ef3dc23 .inst 0x2ef3dc23 ; undefined diff --git a/gas/testsuite/gas/aarch64/advsimd-lut.d b/gas/testsuite/gas/aarch64/advsimd-lut.d index 0240d0d..f95c9c6 100644 --- a/gas/testsuite/gas/aarch64/advsimd-lut.d +++ b/gas/testsuite/gas/aarch64/advsimd-lut.d @@ -1,4 +1,5 @@ #objdump: -dr +#as: -march=armv9.5-a #as: -march=armv8-a+lut .*: file format .* diff --git a/gas/testsuite/gas/aarch64/armv9_5.d b/gas/testsuite/gas/aarch64/armv9_5.d new file mode 100644 index 0000000..22a64a5 --- /dev/null +++ b/gas/testsuite/gas/aarch64/armv9_5.d @@ -0,0 +1,10 @@ +#objdump: -dr + +.*: file format .* + +Disassembly of section \.text: + +0+ <.*>: +[^:]+: 9a002000 addpt x0, x0, x0 +[^:]+: 0ec01c00 famax v0.4h, v0.4h, v0.4h +[^:]+: 4e801000 luti2 v0.16b, {v0.16b}, v0\[0\] diff --git a/gas/testsuite/gas/aarch64/armv9_5.s b/gas/testsuite/gas/aarch64/armv9_5.s new file mode 100644 index 0000000..a6a1174 --- /dev/null +++ b/gas/testsuite/gas/aarch64/armv9_5.s @@ -0,0 +1,9 @@ + .text + + .arch armv9.5-a + // CPA + addpt x0, x0, x0 + // FAMINMAX + famax v0.4h, v0.4h, v0.4h + // LUT + luti2 v0.16b, { v0.16b }, v0[0] diff --git a/gas/testsuite/gas/aarch64/cpa-addsub.d b/gas/testsuite/gas/aarch64/cpa-addsub.d index 73e9ea2..9cc66d7 100644 --- a/gas/testsuite/gas/aarch64/cpa-addsub.d +++ b/gas/testsuite/gas/aarch64/cpa-addsub.d @@ -1,4 +1,5 @@ #name: Tests for CPA instructions ((M)ADDPT and (M)SUBPT). +#as: -march=armv9.5-a #as: -march=armv8-a+cpa #objdump: -dr diff --git a/gas/testsuite/gas/aarch64/cpa-sve.d b/gas/testsuite/gas/aarch64/cpa-sve.d index e2bf48a..090504f 100644 --- a/gas/testsuite/gas/aarch64/cpa-sve.d +++ b/gas/testsuite/gas/aarch64/cpa-sve.d @@ -1,4 +1,5 @@ #name: Tests for CPA+SVE instructions. +#as: -march=armv9.5-a+sve #as: -march=armv8-a+sve+cpa #objdump: -dr diff --git a/gas/testsuite/gas/aarch64/sme2-faminmax.d b/gas/testsuite/gas/aarch64/sme2-faminmax.d index 9a6d69e..9eeb487 100644 --- a/gas/testsuite/gas/aarch64/sme2-faminmax.d +++ b/gas/testsuite/gas/aarch64/sme2-faminmax.d @@ -1,4 +1,5 @@ #objdump: -dr +#as: -march=armv9.5-a+sme2 #as: -march=armv8-a+faminmax+sme2 .*: file format .* diff --git a/gas/testsuite/gas/aarch64/sve2-faminmax.d b/gas/testsuite/gas/aarch64/sve2-faminmax.d index d85019c..7a2743b 100644 --- a/gas/testsuite/gas/aarch64/sve2-faminmax.d +++ b/gas/testsuite/gas/aarch64/sve2-faminmax.d @@ -1,4 +1,5 @@ #objdump: -dr +#as: -march=armv9.5-a+sve2 #as: -march=armv8-a+faminmax+sve2 .*: file format .* @@ -87,4 +88,4 @@ Disassembly of section \.text: 138: 654f9ce5 famin z5.h, p7/m, z5.h, z7.h 13c: 04d13d05 movprfx z5.d, p7/m, z8.d 140: 65cf9d25 famin z5.d, p7/m, z5.d, z9.d - 144: 650f9d25 .inst 0x650f9d25 ; undefined \ No newline at end of file + 144: 650f9d25 .inst 0x650f9d25 ; undefined diff --git a/gas/testsuite/gas/aarch64/sve2-lut.d b/gas/testsuite/gas/aarch64/sve2-lut.d index 7b39b17..cdbc13e 100644 --- a/gas/testsuite/gas/aarch64/sve2-lut.d +++ b/gas/testsuite/gas/aarch64/sve2-lut.d @@ -1,4 +1,5 @@ #objdump: -dr +#as: -march=armv9.5-a+sve2 #as: -march=armv8-a+lut+sve2 .*: file format .* @@ -38,4 +39,4 @@ Disassembly of section \.text: [^:]+: 4520b7e0 luti4 z0.h, \{z31.h-z0.h\}, z0\[0\] [^:]+: 453fb400 luti4 z0.h, \{z0.h-z1.h\}, z31\[0\] [^:]+: 45e0b400 luti4 z0.h, \{z0.h-z1.h\}, z0\[3\] -[^:]+: 45afb524 luti4 z4.h, \{z9.h-z10.h\}, z15\[2\] \ No newline at end of file +[^:]+: 45afb524 luti4 z4.h, \{z9.h-z10.h\}, z15\[2\] diff --git a/include/opcode/aarch64.h b/include/opcode/aarch64.h index 61758c9..9daa911 100644 --- a/include/opcode/aarch64.h +++ b/include/opcode/aarch64.h @@ -269,6 +269,8 @@ enum aarch64_feature_bit { AARCH64_FEATURE_FP8DOT2_SVE, /* +sme-f16f16 or +sme-f8f16 */ AARCH64_FEATURE_SME_F16F16_F8F16, + /* Armv9.5-A processors. */ + AARCH64_FEATURE_V9_5A, AARCH64_NUM_FEATURES }; @@ -361,6 +363,10 @@ enum aarch64_feature_bit { #define AARCH64_ARCH_V9_3A_FEATURES(X) AARCH64_ARCH_V8_8A_FEATURES (X) #define AARCH64_ARCH_V9_4A_FEATURES(X) (AARCH64_ARCH_V8_9A_FEATURES (X) \ | AARCH64_FEATBIT (X, SVE2p1)) +#define AARCH64_ARCH_V9_5A_FEATURES(X) (AARCH64_FEATBIT (X, V9_5A) \ + | AARCH64_FEATBIT (X, CPA) \ + | AARCH64_FEATBIT (X, LUT) \ + | AARCH64_FEATBIT (X, FAMINMAX)) /* Architectures are the sum of the base and extensions. */ #define AARCH64_ARCH_V8A(X) (AARCH64_FEATBIT (X, V8) \ @@ -398,6 +404,8 @@ enum aarch64_feature_bit { | AARCH64_ARCH_V9_3A_FEATURES (X)) #define AARCH64_ARCH_V9_4A(X) (AARCH64_ARCH_V9_3A (X) \ | AARCH64_ARCH_V9_4A_FEATURES (X)) +#define AARCH64_ARCH_V9_5A(X) (AARCH64_ARCH_V9_4A (X) \ + | AARCH64_ARCH_V9_5A_FEATURES (X)) #define AARCH64_ARCH_NONE(X) 0 -- cgit v1.1