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2022-02-14sim cris: Unbreak --disable-sim-hardware buildsHans-Peter Nilsson1-0/+8
With --disable-sim-hardware (--enable-sim-hardware=no), whose default was changed to --enable-sim-hardware(=yes) in commit 34cf51120683, building for cris-elf fails as sim_hw_parse then doesn't exist. A cris-elf simulator configured for --enable-sim-hardware (or the default after to the mentioned commit) runs about 2.5x slower than one configured --disable-sim-hardware. A further 2-5% performance regression was not investigated. When sim_hw_parse doesn't exist, --cris-900000xx can't be supported. The best action here is to remove it completely, so its absence can be identified through --help, but avoiding littering the code with "#if WITH_HW". sim/cris: * sim-if.c (cris_options) [WITH_HW]: Conditionalize support of option --cris-900000xx. (sim_open) [WITH_HW]: Conditionalize sim_hw_parse call.
2022-02-14sim/testsuite/cris: As applicable, require simoption --cris-900000xxHans-Peter Nilsson5-0/+5
Apply the new run_sim_test option "require" as in "#require simoption --cris-900000xx" for all tests using that option. This allows a clean test-suite-run for a build with --disable-sim-hardware, where that option is not supported, by skipping those tests as "untested". sim/testsuite/cris: * asm/io1.ms, asm/io2.ms, asm/io3.ms, asm/io6.ms, asm/io7.ms: Call "#require: simoption --cris-900000xx".
2022-02-14sim/testsuite: Support "requires: simoption <--name-of-option>"Hans-Peter Nilsson1-0/+60
Simulator features can be present or not, typically depending on different-valued configure options, like --enable-sim-hardware[=off|=on]. To avoid failures in test-suite-runs when testing such configurations, a new predicate is needed, as neither "target", "progos" nor "mach" fits cleanly. The immediate need was to check for presence of a simulator option, but rather than a specialized "requires-simoption:" predicate I thought I'd handle the general (parametrized) need, so here's a generic predicate machinery and a (first) predicate to use together with it; checking whether a particular option is supported, by looking at "run --help" output. This was inspired by the check_effective_target_ machinery in the gcc test-suite. Multiple "requires: <requirement> <parameter>" form a list of predicates (with parameters), to be used as a conjunction. sim/testsuite: * lib/sim-defs.exp (sim_check_requires_simoption): New function. (run_sim_test): Support "requires: <requirement> <parameter>".
2022-02-14sim/testsuite/cris/hw/rv-n-cris/irq1.ms: Disable due to randomnessHans-Peter Nilsson1-0/+1
For reasons that remain largely to be investigated (besides the apparent lack of synchronization between two processes), this test fails randomly, with two different sets of common outputs. Curiously, that doesn't happen for the other similar tests. There's a comment that mentions this, though that doesn't make it a sustainable part of a test-suite. (Known-blinking tests should be disabled until fixed.) sim/testsuite/cris: * hw/rv-n-cris/irq1.ms: Disable by use of a never-matched "progos" value.
2022-02-14sim/testsuite/cris/c: Use -sim3 but only for newlib targetsHans-Peter Nilsson1-4/+12
Commit a39487c6685f "sim: cris: use -sim with C tests for cris-elf targets" caused " -sim" to be appended to CFLAGS_FOR_TARGET for cris*-*-elf, where testing had until then relied on "RUNTESTFLAGS=--target_board=cris-sim" being passed when running "make check-sim", adding the right options. While "-sim" happens to work, the baseboard-file cris-sim.exp uses "-sim3" so for consistency use that instead. Then commit b42f20d2ac72 "sim: testsuite: drop most specific istarget checks" caused " -sim" to be appended for *all* targets, which just doesn't work. For example, for crisv32-linux-gnu, that's not a recognized option and will cause a dejagnu error and further testing in c.exp will be aborted. While cris-sim.exp appends "-static" for *-linux-gnu, further changes in the test-suite have caused "linux"-specific tests to break, so that part will be tended to separately. But, save and restore CFLAGS_FOR_TARGET around the modification and use where needed, to not have the CRIS-specific modification affect a continuing test-run (possibly for other targets). sim/testsuite/cris: * c/c.exp (CFLAGS_FOR_TARGET): Replace appended option " -sim" with " -sim3", but do it conditionally for newlib targets. Save and restore CFLAGS_FOR_TARGET in saved_CFLAGS_FOR_TARGET such that it doesn't affect the value of CFLAGS_FOR_TARGET outside c.exp.
2022-02-14sim/testsuite: Set global_cc_os also when no compiler is foundHans-Peter Nilsson1-0/+1
If we don't set this variable, it doesn't exist, and using "#progos:" in an assembler-file will cause an error rather than just skipping the test, viz: Running /src/sim/testsuite/cris/hw/rv-n-cris/rvc.exp ... ERROR: tcl error sourcing /src/sim/testsuite/cris/hw/rv-n-cris/rvc.exp. ERROR: can't read "global_cc_os": no such variable while executing "if { $opts(progos) != "" && $opts(progos) != $global_cc_os } { untested $subdir/$name return }" (procedure "run_sim_test" line 102) Neither the commit introducing progos, nor the top comment in run_sim_test, mentions progos as intended only for C tests, or that its use must be gated on $global_cc_works != 0, so (not) setting it in the no-working-compiler path seems just overlooked. Allowing it to be used for assembler tests makes it usable for e.g. an always-false predicate and in expressions in .exp files without gating on $global_cc_works != 0. With this patch, global_cc_os is set to "", just as for "unknown OS". sim/testsuite: * lib/sim-defs.exp (sim_init_toolchain): Set global_cc_os also when no working target C compiler is found.
2022-02-14sim/testsuite/cris: Assembler testcase for PRIx32 usage bugHans-Peter Nilsson1-0/+47
Several C test-cases exposed the bug, but let's have one for people who test using just the assembler and linker. * asm/endmem1.ms: New test.
2022-02-14sim cris: Correct PRIu32 to PRIx32Hans-Peter Nilsson1-1/+1
In 5ee0bc23a68f "sim: clean up bfd_vma printing" there was an additional introduction of PRIx32 and PRIu32 but just in sim/cris/sim-if.c. One type of bug was fixed in commit d16ce6e4d581 "sim: cris: fix memory setup typos" but one remained; the PRIu32 usage is wrong, as hex output is desired; note the 0x prefix. Without this fix, you'll see output like: memory map 0:0x4000..0x5fff (8192 bytes) overlaps 0:0x0..0x16383 (91012 bytes) program stopped with signal 6 (Aborted). for some C programs, like some of the ones in the sim/cris/c testsuite from where the example is taken (freopen2.c). The bug behavior was with memory allocation. With an attempt to allocate memory using the brk syscall such that the room up to the next 8192-byte "page boundary" wasn't sufficient, the simulator memory allocation machinery horked on a consistency error when trying to allocate a memory block to raise the "end of the data segment": there was already memory allocated at that address. Unfortunately, none of the programs in sim/cris/asm exposed this bug at the time, but an assembler test-case is committed after this fix. sim/cris: * sim-if.c (sim_open): Correct PRIu32 to PRIx32.
2022-02-04sim: mips: Add simulator support for mips32r6/mips64r6Faraz Shahbazker26-75/+3749
2022-02-01 Ali Lown <ali.lown@imgtec.com> Andrew Bennett <andrew.bennett@imgtec.com> Dragan Mladjenovic <dragan.mladjenovic@rt-rk.com> Faraz Shahbazker <fshahbazker@wavecomp.com> sim/common/ChangeLog: * sim-bits.h (EXTEND9, EXTEND18 ,EXTEND19, EXTEND21, EXTEND26): New macros. sim/mips/ChangeLog: * Makefile.in (IGEN_INCLUDE): Add mips3264r6.igen. * configure: Regenerate. * configure.ac: Support mipsisa32r6 and mipsisa64r6. (sim_engine_run): Pick simulator model from processor specified in e_flags. * cp1.c (value_fpr): Handle fmt_dc32. (fp_unary, fp_binary): Zero initialize locals. (update_fcsr, fp_classify, fp_rint, fp_r6_cmp, inner_fmac, fp_fmac, fp_min, fp_max, fp_mina, fp_maxa, fp_fmadd, fp_fmsub): New functions. (sim_fpu_class_mips_mapping): New. * cp1.h (fcsr_ABS2008_mask, fcsr_ABS2008_shift): New define. * interp.c (MIPSR6_P): New. (load_word): Allow unaligned memory access for MIPSR6. * micromips.igen (sc, scd): Adapt to new do_sc* helper signature. * mips.igen: Add *r6 models. (signal_if_cti, forbiddenslot32): New helpers. (delayslot32): Use signal_if_cti. (do_sc, do_scd); Add store_ll_bit parameter. (sc, scd): Adapt to previous change. (nal, beq, bal): New definitions for *r6. (sll): Split nop and ssnop cases into ... (nop, ssnop): New definitions. (loadstore_ea): Use the 32-bit compatibility adressing. (cache): Split logic into ... (do_cache): New helper. (check_fpu): Select IEEE 754-2008 mode for R6. (not_word_value, unpredictable, check_mt_hilo, check_mf_hilo, check_multi_hilo, check_div_hilo, check_u64, do_dmfc1b, add, li, addu, and, andi, bgez, bgtz, blez, bltz, bne, break, dadd, daddiu, daddu, dror, dror32, drorv, dsll, dsll32, dsllv, dsra, dsra32, dsrav, dsrl, dsrl32, dsub, dsubu, j, jal, jalr, jalr.hb, lb, lbu, ld, lh, lhu, lui, lw, lwu, nor, or, ori, ror, rorv, sb, sd, sh, sll, sllv, slt, slti, sltiu, sltu, sra, srav, srl, srlv, sub, subu, sw, sync, syscall, teq, tge, tgeu, tlt, tltu, tne, xor, xori, check_fmt_p, do_load_double, do_store_double, abs.FMT, add.FMT, ceil.l.FMT, ceil.w.FMT, cfc1, ctc1, cvt.d.FMT, cvt.l.FMT, cvt.w.FMT, div.FMT, dfmc1, dmtc1, floor.l.FMT, floor.w.FMT, ldc1, lwc1, mfc1, mov.FMT, mtc1, mul.FMT, recip.FMT, round.l.FMT, round.w.FMT, rsqrt.FMT, sdc1, sqrt.FMT, sub.FMT, swc1, trunc.l.FMT, trunc.w.FMT, bc0f, bc0fl, bc0t, bc0tl, dmfc0, dmtc0, eret, mfc0, mtc0, cop, tlbp, tlbr, tlbwi, tlbwr): Enable on *r6 models. * mips3264r2.igen (dext, dextm, dextu, di, dins, dinsm, dinsu, dsbh, dshd, ei, ext, mfhc1, mthc1, ins, seb, seh, synci, rdhwr, wsbh): Likewise. * mips3264r6.igen: New file. * sim-main.h (FP_formats): Add fmt_dc32. (FORBIDDEN_SLOT): New macros. (simFORBIDDENSLOT, FP_R6CMP_*, FP_R6CLASS_*): New defines. (fp_r6_cmp, fp_classify, fp_rint, fp_min, fp_max, fp_mina, fp_maxa, fp_fmadd, fp_fmsub): New declarations. (R6Compare, Classify, RoundToIntegralExact, Min, Max, MinA, MaxA, FusedMultiplyAdd, FusedMultiplySub): New macros. Wrapping previous declarations. sim/testsuite/mips/ChangeLog: * basic.exp: Add r6-*.s tests. (run_r6_removed_test): New function. (run_endian_tests): New function. * hilo-hazard-3.s: Skip for mips*r6. * r2-fpu.s: New test. * r6-64.s: New test. * r6-branch.s: New test. * r6-forbidden.s: New test. * r6-fpu.s: New test. * r6-llsc-dp.s: New test. * r6-llsc-wp.s: New test. * r6-removed.csv: New test. * r6-removed.s: New test. * r6.s: New test. * utils-r6.inc: New inc.
2022-02-04sim: Add partial support for IEEE 754-2008Faraz Shahbazker2-5/+131
2022-02-01 Faraz Shahbazker <fshahbazker@wavecomp.com> sim/common/ChangeLog: * sim-fpu.c (sim_fpu_minmax_nan): New. (sim_fpu_max): Add variant behaviour for IEEE 754-2008. (sim_fpu_min): Likewise. (sim_fpu_is_un, sim_fpu_is_or): New. (sim_fpu_un, sim_fpu_or): New. (sim_fpu_is_ieee754_2008, sim_fpu_is_ieee754_1985): New. (sim_fpu_set_mode): New. (sim_fpu_classify): New. * sim-fpu.h (sim_fpu_minmax_nan): New declaration. (sim_fpu_un, sim_fpu_or): New declarations. (sim_fpu_is_un, sim_fpu_is_or): New declarations. (sim_fpu_mode): New enum. [sim_fpu_state](current_mode): New field. (sim_fpu_current_mode): New define. (sim_fpu_is_ieee754_2008): New declaration. (sim_fpu_is_ieee754_1985): New declaration. (sim_fpu_set_mode): New declaration. (sim_fpu_classify): New declaration.
2022-02-04sim: Factor out NaN handling in floating point operationsFaraz Shahbazker2-158/+41
2022-02-01 Faraz Shahbazker <fshahbazker@wavecomp.com> sim/common/ChangeLog: * sim-fpu.c (sim_fpu_op_nan): New. (sim_fpu_add): Factor out NaN operand handling with a call to sim_fpu_op_nan. (sim_fpu_sub, sim_fpu_mul, sim_fpu_div): Likewise. (sim_fpu_rem, sim_fpu_max, sim_fpu_min): Likewise. * sim-fpu.h (sim_fpu_op_nan): New declaration.
2022-02-04sim: Allow toggling of quiet NaN-bit semanticsFaraz Shahbazker5-18/+48
IEEE754-1985 specifies the top bit of the mantissa as an indicator of signalling vs. quiet NaN, but does not define the precise semantics. Most architectures treat this bit as indicating quiet NaN, but legacy (pre-R6) MIPS goes the other way and treats it as signalling NaN. This used to be controlled by a macro that was only defined for MIPS. This patch replaces the macro with a variable to track the current semantics of the NaN bit and allows differentiation between older (pre-R6) and and newer MIPS cores. 2022-02-01 Faraz Shahbazker <fshahbazker@wavecomp.com> sim/common/ChangeLog: * sim-fpu.c (_sim_fpu): New. (pack_fpu, unpack_fpu): Allow reversal of quiet NaN semantics. * sim-fpu.h (sim_fpu_state): New struct. (_sim_fpu): New extern. (sim_fpu_quiet_nan_inverted): New define. sim/mips/ChangeLog: * cp1.h (fcsr_NAN2008_mask, fcsr_NAN2008_shift): New. * mips.igen (check_fpu): Select default quiet NaN mode for legacy MIPS. * sim-main.h (SIM_QUIET_NAN_NEGATED): Remove.
2022-01-06sim: ppc: migrate to standard uintXX_t typesMike Frysinger37-1343/+1332
Drop the sim-specific unsignedXX types and move to the standard uintXX_t types that C11 provides.
2022-01-06sim: common: migrate to standard uintXX_t typesMike Frysinger22-432/+425
Drop the sim-specific unsignedXX types and move to the standard uintXX_t types that C11 provides.
2022-01-06sim: igen: migrate to standard uintXX_t typesMike Frysinger6-27/+9
Move off the custom local 64-bit types and to the standard uintXX_t types that C11 provides.
2022-01-06sim: mips: migrate to standard uintXX_t typesMike Frysinger17-1083/+1083
Move off the sim-specific unsignedXX types and to the standard uintXX_t types that C11 provides.
2022-01-06sim: cris: migrate to standard uintXX_t typesMike Frysinger7-80/+80
Move off the sim-specific unsignedXX types and to the standard uintXX_t types that C11 provides.
2022-01-06sim: iq2000: migrate to standard uintXX_t typesMike Frysinger1-4/+4
Move off the sim-specific unsignedXX types and to the standard uintXX_t types that C11 provides.
2022-01-06sim: synacor: migrate to standard uintXX_t typesMike Frysinger2-27/+27
Move off the sim-specific unsignedXX types and to the standard uintXX_t types that C11 provides.
2022-01-06sim: msp430: migrate to standard uintXX_t typesMike Frysinger2-15/+15
Move off the sim-specific unsignedXX types and to the standard uintXX_t types that C11 provides.
2022-01-06sim: riscv: migrate to standard uintXX_t typesMike Frysinger1-28/+28
Move off the sim-specific unsignedXX types and to the standard uintXX_t types that C11 provides.
2022-01-06sim: bfin: migrate to standard uintXX_t typesMike Frysinger1-2/+2
Move off the sim-specific unsignedXX types and to the standard uintXX_t types that C11 provides.
2022-01-06sim: testsuite: migrate to standard uintXX_t typesMike Frysinger4-19/+19
This old code setup its own uintXX types, but since we require C11 now, we can assume the standard uintXX_t types exist and use them.
2022-01-06sim: erc32: migrate to standard uintXX_t typesMike Frysinger7-312/+305
This old port setup its own uintXX types, but since we require C11 now, we can assume the standard uintXX_t types exist and use them.
2022-01-06sim: mn10300: migrate to standard uintXX_t typesMike Frysinger11-505/+498
This old port setup its own uintXX types, but since we require C11 now, we can assume the standard uintXX_t types exist and use them.
2022-01-06sim: v850: migrate to standard uintXX_t typesMike Frysinger5-111/+105
This old port setup its own uintXX types, but since we require C11 now, we can assume the standard uintXX_t types exist and use them.
2022-01-06sim: m68hc11: migrate to standard uintXX_t typesMike Frysinger13-273/+265
This old port setup its own uintXX types, but since we require C11 now, we can assume the standard uintXX_t types exist and use them. Also migrate off the sim-specific unsignedXX types.
2022-01-06sim: d10v: migrate to standard uintXX_t typesMike Frysinger4-273/+265
This old port setup its own uintXX types, but since we require C11 now, we can assume the standard uintXX_t types exist and use them. Also migrate off the sim-specific unsignedXX types.
2022-01-06sim: cr16: migrate to standard uintXX_t typesMike Frysinger3-630/+621
This old port setup its own uintXX types, but since we require C11 now, we can assume the standard uintXX_t types exist and use them. Also migrate off the sim-specific unsignedXX types.
2022-01-01sim: ppc: drop natural typesMike Frysinger4-31/+10
These are almost entirely unused. For the very few places using them, replace with explicit signed types. This matches what was done in the common sim code.
2022-01-01sim: mips: clean up bad style/whitespaceMike Frysinger23-345/+345
This doesn't fix all the problems, but grabs a bunch of the more obvious ones.
2022-01-01sim: tweak copyright lines for gnulib update-copyrightMike Frysinger23-23/+23
The regex it uses does not like so many leading spaces which causes it to think the files lack copyright. Trim them down so the script can find & update them accordingly.
2022-01-01Automatic Copyright Year update after running gdb/copyright.pyJoel Brobecker670-670/+670
This commit brings all the changes made by running gdb/copyright.py as per GDB's Start of New Year Procedure. For the avoidance of doubt, all changes in this commits were performed by the script.
2021-12-16sim: mips/or1k: drop redundant arg to bitsize macroMike Frysinger4-6/+4
These are just using the default behavior for the 3rd arg, so drop it to make it more clear. This also makes them match all other ports that only use the first 2 arguments.
2021-12-16sim: fix mingw builds with replacement gnulib openMike Frysinger1-2/+2
The header shuffling in here broke the workaround for gnulib defining "open". Move it back before the sim-specific includes to fix. This is because the callback struct in the headers has an "open" member and this file tries to call that.
2021-12-09sim: use ## for automake commentsMike Frysinger25-882/+419
The ## marker tells automake to not include the comment in its generated output, so use that in most places where the comment only makes sense in the inputs.
2021-12-04sim: include ansidecl.h when neededMike Frysinger16-1/+26
Avoid implicit include deps with this to help untangle sim headers so we can get rid of arch-specific sim-main.h.
2021-12-04sim: include stdint.h when neededMike Frysinger3-0/+3
Avoid implicit include deps with this to help untangle sim headers so we can get rid of arch-specific sim-main.h.
2021-12-04sim: include stdarg.h when usedMike Frysinger20-0/+22
Avoid implicit include deps with this to help untangle sim headers so we can get rid of arch-specific sim-main.h.
2021-12-04sim: reorder header includesMike Frysinger44-162/+173
We're including system headers after local headers in a bunch of places, but this leads to conflicts when our local headers happen to define symbols that show up in the system headers. Use the more standard order of: * config.h (via defs.h) * system headers * local library headers (e.g. bfd & libiberty) * sim specific headers
2021-12-04sim: moxie: hoist dtb rules up to common buildsMike Frysinger4-49/+116
These rules don't depend on the target compiler settings, so hoist the build logic up to the common builds for better parallelization.
2021-12-04sim: m68hc11: delete unused profile flagsMike Frysinger1-1/+0
These were moved to the common configure script a while ago and have the same default as these, so just delete it.
2021-12-04sim: msp430: delete redundant comments & settingsMike Frysinger1-22/+0
These were copied from the example docs, so aren't adding any value.
2021-12-04sim: erc32: drop old configure targetMike Frysinger1-8/+0
There is no configure script in here anymore to regenerate.
2021-12-04sim: m32c/rl78: drop redundant -Wall settingsMike Frysinger2-3/+1
We already turn these on in the configure script.
2021-12-04sim: frv: split up testsuite a bitMike Frysinger9-19/+136
Running frv's allinsn in serial is quite slow due to the sheer number of tests it contains. By splitting it up and running in parallel, the execution time on my system goes from ~100sec to ~60sec.
2021-11-28sim: testsuite: drop most specific istarget checksMike Frysinger42-47/+42
We'll rely on the toolchain probing to determine whether each arch's tests can be run rather the current configure target. This allows testing all of the ports in a multitarget configuration. For now, we don't reformat the files entirely to make it easier to review, and in case we need to make adjustments. Once this feels like it's stable, we can flatten the code a bit by removing the if statement entirely.
2021-11-28sim: testsuite: support parallel executionMike Frysinger2-10/+80
Break up the dejagnu logic so that we can parallelize the testsuite. This takes a page from gcc & gdb where each .exp is run in isolation instead of in serial. For most targets, this doesn't make much of a difference as they only have a single .exp. A few (like cris & frv) have multiple .exp though and will see a bit of a speed up. The real gain is when testing a multitarget build. This way we can run all the targets in parallel and cut the execution time a bit. On my system, it goes from ~155sec to ~100sec. We can gain further speedups by splitting up some of the larger .exp files into smaller groups. We'll do that in a followup though.
2021-11-28sim: testsuite: expand arch specific toolchain settingsMike Frysinger3-7/+63
Leverage the new per-port toolchain settings to initialize the env for eeach set of tests. This allows us to run all the tests in a multitarget build if the user sets up the vars. If they don't, we can still skip all the tests.
2021-11-28sim: testsuite: setup per-port toolchain settings for multitarget buildMike Frysinger5-3/+895
Gas does not support multitarget builds -- it still only supports a single input & output format. ld is a bit better, but requires manual flags to select the right output. This makes it impossible to run the complete testsuite in a multitarget build. To address this limitation, create a suite of FOR_TARGET variables so these can be set to precompiled as & ld programs. It requires a bit of setup ahead of time, but it's a one-time cost, and makes running the full testsuite at once much easier.