Age | Commit message (Collapse) | Author | Files | Lines |
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* configure: Regenerate.
* Makefile.in (SIM_OBJS): Add devices.o.
* m32r-sim.h (m32r_devices): Renamed from m32r_mspr_device.
(UART_*): Define m32r serial port parameters.
(M32R_DEVICE_ADDR,M32R_DEVICE_LEN): Define.
* m32r.c (device_io_{read,write}_buffer,device_error): Move from here,
* devices.c: To here.
* sim-if.c: Don't include signal.h,sim-core.h.
(sim_open): Use M32R_DEVICE_{ADDR,LEN} in sim_core_attach call.
(sim_resume): Call sim_module_{resume,suspend}.
* m32r.c (m32r_h_cr_{get,set}): Use register number enums.
* tconfig.in (SIM_HANDLES_LMA): Define.
* sim-if.c (do_trap): Result is new pc.
Handle --environment=operating.
* sem-switch.c,sem.c: Regenerate.
start-sanitize-m32rx
* semx.c: Regenerate.
end-sanitize-m32rx
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(arch.o): Delete cpu-opc.h dependency.
(decode.o,model.o): Likewise.
(decodex.o,modelx.o): Likewise.
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* cpux.h,decodex.[ch],modelx.c,readx.c,semx.c: Regenerate.
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Clean up compile probs in mips/vr5400.
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* semx.c: Regenerate.
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* m32r-sim.h (BRANCH_NEW_PC): Delete current_cpu arg.
(NEW_PC_{BASE,SKIP,2,4,BRANCH_P}): New macros.
* cpu.[ch],decode.[ch],extract.c,model.c: Regenerate.
* sem.c,sem-switch.c: Regenerate.
* m32r-sim.h (SEM_NEXT_PC): Modify to handle parallel exec.
* mloopx.in: Rewrite.
* cpux.[ch],decodex.[ch],readx.c,semx.c: Regenerate.
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* cpu.[ch],decode.[ch],extract.c,model.c: Regenerate.
* sem.c,sem-switch.c: Regenerate.
* cpux.[ch],decodex.[ch],readx.c,semx.c: Regenerate.
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(cpu.o): Add rule for.
(NL_TARGET): Define.
* configure.in: Add AC_CHECK_PROG(SCHEME).
* cpu.c: New file.
* cpuall.h,cpu.h,decode.c,decode.h,extract.c,model.c: Regenerate.
* sem-switch.c,sem.c: Regenerate.
* mloop.in (execute): Update call to semantic fn.
(M32RX_OBJS): Add cpux.o.
(cpux.o): Add rule for.
cpux.c: New file.
* cpux.h,decodex.c,decodex.h,modelx.c,readx.c,semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_{get,set}): Rewrite.
(m32rx_h_cr_{get,set}): New functions.
(m32rx_h_accums_{get,set}): New functions.
* mloopx.in: Rewrite main loop.
* m32r.c (do_trap): Move from here.
* sim-if.c (do_trap): To here, and rewrite to use CB_SYSCALL support.
(sim_create_inferior): Use h_pc_set.
(h_pc_{get,set}): New functions.
(h_gr_{get,set}): New functions.
(syscall_{read,write}_mem): New functions.
* sim-main.h (h_{gr,pc}_{get,set}): Declare.
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return actual size of register, 0 if not applicable, -1 of legacy
implementation.
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* cpux.c, decodex.c, decodex.h, readx.c, semx.c, modelx.c: Regenerate.
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start-sanitize-m32rx
* cpux.h, decodex.c, readx.c, semx.c: Regenerate.
* m32rx.c (m32rx_h_accums_set): New function.
(m32rx_model_mark_[gs]et_h_gr): New function.
* mloopx.in: Rewrite.
* Makefile.in (mloopx.o): Build with -parallel.
* sim-main.h (_sim_cpu): Delete member `par_exec'.
* tconfig.in (WITH_SEM_SWITCH_FULL): Define as 0 for m32rx.
end-sanitize-m32rx
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(extract.o): Pass -DSCACHE_P.
* mloop.in (extract{16,32}): Update call to m32r_decode.
* arch.h,cpu.h,cpuall.h,decode.[ch]: Regenerate.
* extract.c,model.c,sem-switch.c,sem.c: Regenerate.
* sim-main.h: #include "ansidecl.h".
Don't include cpu-opc.h, done by arch.h.
start-sanitize-m32rx
* Makefile.in (M32RX_OBJS): Build m32rx support now.
(m32rx.o): New rule.
* m32r-sim.h (m32rx_h_cr_[gs]et): Define.
* m32rx.c (m32rx_{fetch,store}_register): Update {get,set} of PC.
(m32rx_h_accums_get): New function.
* mloopx.in: Update call to m32rx_decode. Rewrite exec loop.
* cpux.h,decodex.[ch],modelx.c,readx.c,semx.c: Regenerate.
end-sanitize-m32rx
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* arch.h (HAVE_CPU_M32R{,X}): Delete, moved to m32r-opc.h.
* arch.c (machs): Check ifdef HAVE_CPU_FOO for each entry.
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* arch.h (HAVE_CPU_M32RX): Likewise.
* arch.c (machs): Check ifdef HAVE_CPU_FOO for each entry.
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* cpux.h, decodex.h, decodex.c, readx.c, semx.c, modelx.c: New files.
* m32rx.c, mloopx.in: New files.
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*/configure: Regenerated.
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* sem-switch.c: Regenerate.
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* arch-defs.h: Deleted.
* mloop.in: Renamed from mainloop.in.
* sem.c: Renamed from semantics.c.
* Makefile.in: Update.
* sem-ops.h: Deleted.
* mem-ops.h: Deleted.
start-sanitize-cygnus
Add cgen support for generating files.
end-sanitize-cygnus
(arch): Renamed from CPU.
* decode.c: Redone.
* decode.h: Redone.
* extract.c: Redone.
* model.c: Redone.
* sem-switch.c: Redone.
* sem.c: Renamed from semantics.c, and redone.
* m32r-sim.h (PROFILE_COUNT_FILLNOPS): Update.
(GETTWI,SETTWI,BRANCH_NEW_PC): Define.
* m32r.c (WANT_CPU,WANT_CPU_M32R): Define.
(m32r_{fetch,store}_register): New functions.
(model_mark_{get,set}_h_gr): Prefix with m32r_.
(m32r_model_mark_{busy,unbusy}_reg): Prefix with m32r_.
(h_cr_{get,set}): Prefix with m32r_.
(do_trap): Fetch state from current_cpu, not current_state.
Call sim_engine_halt instead of engine_halt.
* sim-if.c (alloc_cpu): New function.
(free_state): New function.
(sim_open): Call sim_state_alloc, and malloc space for selected cpu
type. Call sim_analyze_program.
(sim_create_inferior): Handle selected cpu type when setting PC.
start-sanitize-m32rx
(sim_resume): Handle m32rx.
end-sanitize-m32rx
(sim_stop_reason): Deleted.
(print_m32r_misc_cpu): Update.
start-sanitize-m32rx
(sim_{fetch,store}_register): Handle m32rx.
end-sanitize-m32rx
(sim_{read,write}): Deleted.
(sim_engine_illegal_insn): New function.
* sim-main.h: Don't include arch-defs.h,sim-core.h,sim-events.h.
Include arch.h,cpuall.h. Include cpu.h,decode.h if m32r.
start-sanitize-m32rx
Include cpux.h,decodex.h if m32rx.
end-sanitize-m32rx
(_sim_cpu): Include member appropriate cpu_data member for the cpu.
(M32R_MISC_PROFILE): Renamed from M32R_PROFILE.
(sim_state): Delete members core,events,halt_jmp_buf.
Change `cpu' member to be a pointer to the cpu's struct, rather than
record inside the state struct.
* tconfig.in (WITH_DEVICES): Define here.
(WITH_FAST,WITH_SEM_SWITCH_{FULL,FAST}): Define for the cpu.
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(m32r_mspr_device): Declare.
(struct _devicep: Define.
* m32r.c (m32r_mspr_device): New global.
(device_{io_{read,write}_buffer,error}): New functions.
* mem-ops.h (SETMEM*): Use sim_core_write_map, not read map.
* sim-if.c: Delete redundant inclusion of cpu-sim.h.
(sim_open): Attach device to handle MSPR register.
* sim-main.h (WITH_DEVICES): Define as 1.
Include cpu-sim.h.
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* configure: Regenerated.
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* sim-if.c (sim_open): Call sim_config.
(sim_stop_reason): Update call to sim_signal_to_host.
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to <targ>/configure.in.
Simplify logic used to select target [default] endianness.
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Add support for --alignment={strict,nonstrict,forced} to simulator common
run-time options.
For v850 use, make the default NONSTRICT_ALIGNMENT.
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directory to specify its own unqiue config.h file).
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o Add sim-memopt module - memory option processing.
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Add file sim-hload.c - generic load for hardware only simulators.
Review each simulators sim_open, sim_load, sim_create_inferior so that
they more closely match required behavour.
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that image properties such as endianness can be checked.
More strongly document the expected behavour of each of the sim_*
interfaces.
Add default endian argument to simulator config macro
SIM_AC_OPTION_ENDIAN. Use in sim_config.
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Use in tic80 and d30v simulators.
o Add signal hook to sim-core module
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