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Clang's integrated assembler supports multiple section with the same
name:
.section .text,"ax",@progbits,unique,1
nop
.section .text,"ax",@progbits,unique,2
nop
"unique,N" assigns the number, N, as the section ID, to a section. The
valid values of the section ID are between 0 and 4294967295. It can be
used to distinguish different sections with the same section name.
This is useful with -fno-unique-section-names -ffunction-sections.
-ffunction-sections by default generates .text.foo, .text.bar, etc.
Using the same string can save lots of space in .strtab.
This patch adds section_id to bfd_section and reuses the linker
internal bit in BFD section flags, SEC_LINKER_CREATED, for assmebler
internal use to mark valid section_id. It also updates objdump to
compare section pointers if 2 sections comes from the same file since
2 different sections can have the same section name.
bfd/
PR gas/25380
* bfd-in2.h: Regenerated.
* ecoff.c (bfd_debug_section): Add section_id.
* section.c (bfd_section): Add section_id.
(SEC_ASSEMBLER_SECTION_ID): New.
(BFD_FAKE_SECTION): Add section_id.
binutils/
PR gas/25380
* objdump.c (sym_ok): Return FALSE if 2 sections are in the
same file with different section pointers.
gas/
PR gas/25380
* config/obj-elf.c (section_match): Removed.
(get_section): Also match SEC_ASSEMBLER_SECTION_ID and
section_id.
(obj_elf_change_section): Replace info and group_name arguments
with match_p. Also update the section ID and flags from match_p.
(obj_elf_section): Handle "unique,N". Update call to
obj_elf_change_section.
* config/obj-elf.h (elf_section_match): New.
(obj_elf_change_section): Updated.
* config/tc-arm.c (start_unwind_section): Update call to
obj_elf_change_section.
* config/tc-ia64.c (obj_elf_vms_common): Likewise.
* config/tc-microblaze.c (microblaze_s_data): Likewise.
(microblaze_s_sdata): Likewise.
(microblaze_s_rdata): Likewise.
(microblaze_s_bss): Likewise.
* config/tc-mips.c (s_change_section): Likewise.
* config/tc-msp430.c (msp430_profiler): Likewise.
* config/tc-rx.c (parse_rx_section): Likewise.
* config/tc-tic6x.c (tic6x_start_unwind_section): Likewise.
* doc/as.texi: Document "unique,N" in .section directive.
* testsuite/gas/elf/elf.exp: Run "unique,N" tests.
* testsuite/gas/elf/section15.d: New file.
* testsuite/gas/elf/section15.s: Likewise.
* testsuite/gas/elf/section16.s: Likewise.
* testsuite/gas/elf/section16a.d: Likewise.
* testsuite/gas/elf/section16b.d: Likewise.
* testsuite/gas/elf/section17.d: Likewise.
* testsuite/gas/elf/section17.l: Likewise.
* testsuite/gas/elf/section17.s: Likewise.
* testsuite/gas/i386/unique.d: Likewise.
* testsuite/gas/i386/unique.s: Likewise.
* testsuite/gas/i386/x86-64-unique.d: Likewise.
* testsuite/gas/i386/i386.exp: Run unique and x86-64-unique.
ld/
PR gas/25380
* testsuite/ld-i386/pr22001-1c.S: Use "unique,N" in .section
directives.
* testsuite/ld-i386/tls-gd1.S: Likewise.
* testsuite/ld-x86-64/pr21481b.S: Likewise.
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Commit 9e7028aa1e78 ("PowerPC64 __tls_get_addr_desc") introduced a use
of @option which apparently newer makeinfo tolerates, but older ones
reject. Drop the unnecessary (a per all other uses of @option) blank.
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PR 25477
* ldelf.c (ldelf_check_ld_so_conf): Add prefix parameter and
correct concat.
(ldelf_after_open): Add prefix parameter.
* ldelf.h (ldelf_after_open): Update prototype.
* emultempl/elf.em (gld${EMULATION_NAME}_after_open): Pass $prefix
to ldelf_after_open.
* Makefile.am: Correct z80 dependencies.
* Makefile.in: Regenerate.
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Until the symbol table is created, symbols can't be created.
* ldexp.c (fold_name): Don't print bfd_link_hash_lookup failed
in first phase.
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binutils/
* testsuite/lib/binutils-common.exp (big_or_little_endian): Replace
case statement with switch statement.
gas/
* testsuite/gas/all/gas.exp: Replace case statements with switch
statements.
* testsuite/gas/elf/elf.exp: Likewise.
* testsuite/gas/macros/macros.exp: Likewise.
* testsuite/lib/gas-defs.exp: Likewise.
ld/
* testsuite/ld-elfvers/vers.exp: Replace case statements with
switch statements.
* testsuite/ld-ifunc/ifunc.exp: Likewise.
* testsuite/ld-unique/unique.exp: Likewise.
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bfd/
PR ld/25458
* elflink.c (_bfd_elf_gc_mark_rsec): Mark all weak aliases.
ld/
PR ld/25458
* testsuite/ld-elf/pr25458.map: New file.
* testsuite/ld-elf/pr25458.rd: Likewise.
* testsuite/ld-elf/pr25458a.s: Likewise.
* testsuite/ld-elf/pr25458b.s: Likewise.
* testsuite/ld-elf/shared.exp: Run PR ld/25458 test.
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After fixing:
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=93319
https://sourceware.org/bugzilla/show_bug.cgi?id=25416
-mtls-dialect=gnu2 is working for x32 with GCC 10. Skip GNU2 TLS tests
only if compiler doesn't support it.
PR ld/25416
* testsuite/ld-x86-64/tls.exp: Skip GNU2 TLS tests only without
compiler support.
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This provides a linker generated __tls_get_addr_desc wrapper function
preserving registers around a __tls_get_addr call. The idea being to
support __tls_get_addr_desc without requiring a glibc update.
bfd/
* elf64-ppc.c (struct ppc_link_hash_table): Add tga_group.
(ppc64_elf_archive_symbol_lookup): Extract __tls_get_addr_opt for
__tls_get_addr_desc.
(ppc64_elf_size_stubs): Add section for linker generated
__tls_get_addr_desc wrapper function. Loop at least once if
generating this function.
(emit_tga_desc, emit_tga_desc_eh_frame): New functions.
(ppc64_elf_build_stubs): Generate __tls_get_addr_desc.
ld/
* testsuite/ld-powerpc/tlsdesc3.d,
* testsuite/ld-powerpc/tlsdesc3.wf,
* testsuite/ld-powerpc/tlsdesc4.d,
* testsuite/ld-powerpc/tlsdesc4.s,
* testsuite/ld-powerpc/tlsdesc4.wf: New tests.
* testsuite/ld-powerpc/powerpc.exp: Run them.
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This implements register saving and restoring in the __tls_get_addr
call stub, so that when glibc supports the optimized tls call stub gcc
can generate code that assumes only r0, r12 and of course r3 are
changed on a __tls_get_addr call. When gcc expects __tls_get_addr
calls to preserve registers the call will be to __tls_get_addr_desc,
which will be translated by the linker to a call to __tls_get_addr_opt.
bfd/
* elf64-ppc.h (struct ppc64_elf_params): Add no_tls_get_addr_regsave.
* elf64-ppc.c (struct ppc_link_hash_table): Add tga_desc and
tga_desc_fd.
(is_tls_get_addr): Match tga_desc and tga_desc_df too.
(STDU_R1_0R1, ADDI_R1_R1): Define.
(tls_get_addr_prologue, tls_get_addr_epilogue): New functions.
(ppc64_elf_tls_setup): Set up tga_desc and tga_desc_fd. Indirect
tga_desc_fd to opt_fd, and tga_desc to opt. Set
no_tls_get_addr_regsave.
(branch_reloc_hash_match): Add hash3 and hash4.
(ppc64_elf_tls_optimize): Handle tga_desc_fd and tga_desc too.
(ppc64_elf_size_dynamic_sections): Likewise.
(ppc64_elf_relocate_section): Likewise.
(plt_stub_size, build_plt_stub): Likewise. Size regsave
__tls_get_addr stub.
(build_tls_get_addr_stub): Build regsave __tls_get_addr stub and
eh_frame.
(ppc_size_one_stub): Handle tga_desc_fd and tga_desc too. Size
eh_frame for regsave __tls_get_addr.
gas/
* config/tc-ppc.c (parse_tls_arg): Handle tls arg for
__tls_get_addr_desc and __tls_get_addr_opt.
ld/
* emultempl/ppc64elf.em (ppc64_opt, PARSE_AND_LIST_LONGOPTS),
(PARSE_AND_LIST_OPTIONS, PARSE_AND_LIST_ARGS_CASES): Support
--tls-get-addr-regsave and --no-tls-get-addr-regsave.
(params): Init new field.
* ld.texi (--tls-get-addr-regsave, --no-tls-get-addr-regsave):
Document.
* testsuite/ld-powerpc/tlsdesc.s,
* testsuite/ld-powerpc/tlsdesc.d,
* testsuite/ld-powerpc/tlsdesc.wf,
* testsuite/ld-powerpc/tlsdesc2.d,
* testsuite/ld-powerpc/tlsdesc2.wf,
* testsuite/ld-powerpc/tlsexenors.d,
* testsuite/ld-powerpc/tlsexenors.r,
* testsuite/ld-powerpc/tlsexers.d,
* testsuite/ld-powerpc/tlsexers.r,
* testsuite/ld-powerpc/tlsexetocnors.d,
* testsuite/ld-powerpc/tlsexetocrs.d,
* testsuite/ld-powerpc/tlsexetocrs.r,
* testsuite/ld-powerpc/tlsopt6.d,
* testsuite/ld-powerpc/tlsopt6.wf: New.
* testsuite/ld-powerpc/powerpc.exp: Run new tests.
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PR 25417
binutils/
* readelf.c (get_alpha_symbol_other): Fix error message typo.
ld/
* ldlang.c (ldlang_open_ctf): Fix error message typo.
* emultempl/z80elf.em (z80_elf_after_open): Likewise.
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Linux program headers may look like
Section to Segment mapping:
Segment Sections...
00 .note.gnu.property .text
01 .note.gnu.property
02 .note.gnu.property
or
Section to Segment mapping:
Segment Sections...
00 .note.gnu.property
01 .text
02 .note.gnu.property
03 .note.gnu.property
Update pr23900-1.d to accept both.
* testsuite/ld-elf/pr23900-1.d: Adjusted.
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Also pass -l to readelf to check PT_GNU_PROPERTY program header.
PR ld/23900
* testsuite/ld-elf/pr23900-1.d: Also pass -l to readelf.
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For x32, we must encode "lea x@TLSDESC(%rip), %reg" with a REX prefix
even if it isn't required. Otherwise linker can’t safely perform
GDesc -> IE/LE optimization. X32 TLSDESC sequences can be:
40 8d 05 00 00 00 00 rex lea x@TLSDESC(%rip), %reg
...
67 ff 10 call *x@TLSCALL(%eax)
or the same sequence as LP64:
48 8d 05 00 00 00 00 lea foo@TLSDESC(%rip), %reg
...
ff 10 call *foo@TLSCALL(%rax)
We need to support both sequences for x32. For both GDesc -> IE/LE
transitions,
67 ff 10 call *x@TLSCALL(%eax)
should relaxed to
0f 1f 00 nopl (%rax)
For GDesc -> LE transition,
40 8d 05 00 00 00 00 rex lea x@TLSDESC(%rip), %reg
should relaxed to
40 c7 c0 fc ff ff ff rex movl $x@tpoff, %reg
For GDesc -> IE transition,
40 8d 05 00 00 00 00 rex lea x@TLSDESC(%rip), %reg
should relaxed to
40 8b 05 00 00 00 00 rex movl x@gottpoff(%rip), %eax
bfd/
PR ld/25416
* elf64-x86-64.c (elf_x86_64_check_tls_transition): Support
"rex leal x@tlsdesc(%rip), %reg" and "call *x@tlsdesc(%eax)" in
X32 mode.
(elf_x86_64_relocate_section): In x32 mode, for GDesc -> LE
transition, relax "rex leal x@tlsdesc(%rip), %reg" to
"rex movl $x@tpoff, %reg", for GDesc -> IE transition, relax
"rex leal x@tlsdesc(%rip), %reg" to
"rex movl x@gottpoff(%rip), %eax". For both transitions, relax
"call *(%eax)" to "nopl (%rax)".
gas/
PR ld/25416
* config/tc-i386.c (output_insn): Add a dummy REX_OPCODE prefix
for lea with R_X86_64_GOTPC32_TLSDESC relocation when generating
x32 object.
* testsuite/gas/i386/ilp32/x32-tls.d: Updated.
* testsuite/gas/i386/ilp32/x32-tls.s: Add tests for lea with
R_X86_64_GOTPC32_TLSDESC relocation.
ld/
PR ld/25416
* testsuite/ld-x86-64/pr25416-1.s: New file
* testsuite/ld-x86-64/pr25416-1a.d: Likewise.
* testsuite/ld-x86-64/pr25416-1b.d: Likewise.
* testsuite/ld-x86-64/pr25416-1.s: Likewise.
* testsuite/ld-x86-64/pr25416-2.s: Likewise.
* testsuite/ld-x86-64/pr25416-2a.d: Likewise.
* testsuite/ld-x86-64/pr25416-2b.d: Likewise.
* testsuite/ld-x86-64/pr25416-3.d: Likewise.
* testsuite/ld-x86-64/pr25416-3.s: Likewise.
* testsuite/ld-x86-64/pr25416-4.d: Likewise.
* testsuite/ld-x86-64/pr25416-4.s: Likewise.
* testsuite/ld-x86-64/pr25416-5a.c: Likewise.
* testsuite/ld-x86-64/pr25416-5b.s: Likewise.
* testsuite/ld-x86-64/pr25416-5c.s: Likewise.
* testsuite/ld-x86-64/pr25416-5d.s: Likewise.
* testsuite/ld-x86-64/pr25416-5e.s: Likewise.
* testsuite/ld-x86-64/x86-64.exp: Run PR ld/25416 tests.
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This modifies the special __tls_get_addr stub that checks for a
tlsdesc style __tls_index entry and returns early. Not using r11
isn't much benefit at the moment but a followup patch will preserve
regs around the first call to __tls_get_addr when the __tls_index
entry isn't yet set up for an early return.
bfd/
* elf64-ppc.c (LD_R11_0R3, CMPDI_R11_0, STD_R11_0R1, LD_R11_0R1),
(MTLR_R11): Don't define.
(LD_R0_0R3, CMPDI_R0_0): Define.
(build_tls_get_addr_stub): Don't use r11 in stub.
ld/
* testsuite/ld-powerpc/tlsexe.d: Match new __tls_get_addr stub.
* testsuite/ld-powerpc/tlsexeno.d: Likewise.
* testsuite/ld-powerpc/tlsexetoc.d: Likewise.
* testsuite/ld-powerpc/tlsexetocno.d: Likewise.
* testsuite/ld-powerpc/tlsopt5.d: Likewise.
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ld/ChangeLog
* testsuite/ld-x86-64/align-branch-1.d: Loosen instruction regexps
to admit whatever absolute address. The label-relative address is
what the test needs to verify.
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ld/ChangeLog:
2020-01-16 Jozef Lawrynowicz <jozef.l@mittosystems.com>
* scripttempl/elf32msp430_3.sc: Remove.
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ld/ChangeLog:
2020-01-16 Jozef Lawrynowicz <jozef.l@mittosystems.com>
* scripttempl/elf32msp430.sc: Add input section rules for
.upper.{text,data,rodata,bss}.
* testsuite/ld-msp430-elf/msp430-elf.exp: Run new test.
* testsuite/ld-msp430-elf/upper-input-sections.s: New test.
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PR 20694
bfd * pdp11.c (TARGET_PAGE_SIZE): Set to 8192.
ld * temulparams/pdp11.sh (TARGET_PAGE_SIZE): Set to 8192.
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gas/ChangeLog:
2020-01-15 Jozef Lawrynowicz <jozef.l@mittosystems.com>
* config/tc-msp430.c (CHECK_RELOC_MSP430): Always generate 430X
relocations when the target is 430X, except when extracting part of an
expression.
(msp430_srcoperand): Adjust comment.
Initialize the expp member of the msp430_operand_s struct as
appropriate.
(msp430_dstoperand): Likewise.
* testsuite/gas/msp430/msp430.exp: Run new test.
* testsuite/gas/msp430/reloc-lo-430x.d: New test.
* testsuite/gas/msp430/reloc-lo-430x.s: New test.
include/ChangeLog:
2020-01-15 Jozef Lawrynowicz <jozef.l@mittosystems.com>
* opcode/msp430.h (enum msp430_expp_e): New.
(struct msp430_operand_s): Add expp member to struct.
ld/ChangeLog:
2020-01-15 Jozef Lawrynowicz <jozef.l@mittosystems.com>
* testsuite/ld-msp430-elf/msp430-elf.exp: Run new test.
* testsuite/ld-msp430-elf/reloc-lo-430x.s: New test.
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Function symbols of course don't normally want .dynbss copies but
with some old versions of gcc they are needed to copy the function
descriptor. This patch restricts the cases where they are useful to
compilers using dot-symbols, and enables the warning regardless of
whether a PLT entry is emitted in the executable. PLTs in shared
libraries are affected by a .dynbss copy in the executable.
bfd/
PR 25384
* elf64-ppc.c (ELIMINATE_COPY_RELOCS): Update comment.
(ppc64_elf_adjust_dynamic_symbol): Don't allow .dynbss copies
of function symbols unless dot symbols are present. Do warn
whenever one is created, regardles of whether a PLT entry is
also emitted for the function symbol.
ld/
* testsuite/ld-powerpc/ambiguousv1b.d: Adjust expected output.
* testsuite/ld-powerpc/funref.s: Align func_tab.
* testsuite/ld-powerpc/funref2.s: Likewise.
* testsuite/ld-powerpc/funv1.s: Add dot symbols.
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1. Update align branch assembler tests to match Darwin disassembler
outputs.
2. Skip unsupported "call *foo" tests in 64-bit mode on Darwin.
3. Update align branch linker test to match any addresses for i686-pc-elf.
gas/
* testsuite/gas/i386/align-branch-1a.d: Updated for Darwin.
* testsuite/gas/i386/align-branch-1b.d: Likewise.
* testsuite/gas/i386/align-branch-1c.d: Likewise.
* testsuite/gas/i386/align-branch-1d.d: Likewise.
* testsuite/gas/i386/align-branch-1e.d: Likewise.
* testsuite/gas/i386/align-branch-1f.d: Likewise.
* testsuite/gas/i386/align-branch-1g.d: Likewise.
* testsuite/gas/i386/align-branch-1h.d: Likewise.
* testsuite/gas/i386/align-branch-1i.d: Likewise.
* testsuite/gas/i386/align-branch-5.d: Likewise.
* testsuite/gas/i386/x86-64-align-branch-1a.d: Likewise.
* testsuite/gas/i386/x86-64-align-branch-1b.d: Likewise.
* testsuite/gas/i386/x86-64-align-branch-1c.d: Likewise.
* testsuite/gas/i386/x86-64-align-branch-1d.d: Likewise.
* testsuite/gas/i386/x86-64-align-branch-1e.d: Likewise.
* testsuite/gas/i386/x86-64-align-branch-1f.d: Likewise.
* testsuite/gas/i386/x86-64-align-branch-1g.d: Likewise.
* testsuite/gas/i386/x86-64-align-branch-1h.d: Likewise.
* testsuite/gas/i386/x86-64-align-branch-1i.d: Likewise.
* testsuite/gas/i386/x86-64-align-branch-5.d: Likewise.
* testsuite/gas/i386/i386.exp: Skip x86-64-align-branch-2a,
x86-64-align-branch-2b and x86-64-align-branch-2c on Darwin.
ld/
* testsuite/ld-i386/align-branch-1.d: Updated for i686-pc-elf.
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* po/BLD-POTFILES.in: Regenerate.
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xxxx-xx-xx Claudiu Zissulescu <claziss@gmail.com>
* testsuite/ld-arc/relax-local-pic.d: Improve matching patterns.
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Code clean up and improvements when changing the cpu from command
line. Also, remove unused/old emulations.
gas/
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
* config/tc-arc.c (arc_select_cpu): Re-init the bfd if we change
the CPU.
* config/tc-arc.h: Add header if/defs.
* testsuite/gas/arc/pseudos.d: Improve matching pattern.
ls/
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
* Makefile.am: Remove earcelf_prof.c and earclinux_prof.c
emulations.
* Makefile.in: Regenerate.
* configure.tgt: Likewise.
* emulparams/arcelf_prof.sh: Remove file.
* emulparams/arclinux_prof.sh: Likewise.
opcodes/
xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
* arc-opc.c (C_NE): Make it required.
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xxxx-xx-xx Claudiu Zissulescu <claziss@synopsys.com>
* elfarcv2.sc : Allow interrupt vector table to be located at an
arbitrary address. Use DWARF.sc file.
* elfarc.sc: Use DWARF.sc file.
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Reverts unnecessary mips testsuite changes made by commit 660df28acf.
* testsuite/ld-mips-elf/eh-frame5.s,
* testsuite/ld-mips-elf/ehdr_start-new.s,
* testsuite/ld-mips-elf/ehdr_start-o32.s,
* testsuite/ld-mips-elf/mips16-call-global-1.s,
* testsuite/ld-mips-elf/mips16-intermix-1.s,
* testsuite/ld-mips-elf/mips16-pic-1b.s,
* testsuite/ld-mips-elf/mips16-pic-4c.s,
* testsuite/ld-mips-elf/no-shared-1-n64.s,
* testsuite/ld-mips-elf/no-shared-1-o32.s,
* testsuite/ld-mips-elf/pic-and-nonpic-1b-micromips.s,
* testsuite/ld-mips-elf/pic-and-nonpic-1b.s,
* testsuite/ld-mips-elf/pic-and-nonpic-2a.s,
* testsuite/ld-mips-elf/pic-and-nonpic-3b.s,
* testsuite/ld-mips-elf/pic-and-nonpic-4b.s,
* testsuite/ld-mips-elf/pic-and-nonpic-5a.s,
* testsuite/ld-mips-elf/pic-and-nonpic-6-n32c.s,
* testsuite/ld-mips-elf/pic-and-nonpic-6-n64c.s,
* testsuite/ld-mips-elf/pic-and-nonpic-6-o32c.s,
* testsuite/ld-mips-elf/pie.s,
* testsuite/ld-mips-elf/relax-jalr.s: Revert 2019-12-17 change.
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symbols.
PR 25327
* testsuite/ld-elf/shared.exp: Add -fcommon option to compiler
command line when building libcomm1.o and pr13250 tests.
* testsuite/ld-plugin/lto.exp: Likewise for pr20267 tests.
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PR 25326
* testsuite/ld-elf/shared.exp: Add -fcommon option to compiler
command line when building pr19579 binaries.
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loaded at a different image base than specified in the PE header. This patch provides a new option --enable-reloc-section to force the generation of this section.
* emultempl/pe.em: Add new option --enable-reloc-section.
* emultempl/pep.em: Likewise.
* ld.texi: Document --enable-reloc-section.
* pe-dll.c (pe_dll_build_sections): Use pe_dll_enable_reloc_section.
(pe_dll_fill_sections): Simplify by calling pe_exe_fill_sections.
* pe-dll.h: Add extern declaration of option flag.
* pep-dll.c (pe_dll_enable_reloc_section):
Add alias define for pep_dll_enable_reloc_section.
* pep-dll.h: Add extern declaration of option flag.
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Add an ELF based target for these as well.
PR 25224
bfd * Makefile.am: Add z80-elf target support.
* configure.ac: Likewise.
* targets.c: Likewise.
* config.bfd: Add z80-elf target support and new arches: ez80 and z180.
* elf32-z80.c: New file.
* archures.c: Add new z80 architectures: eZ80 and Z180.
* coffcode.h: Likewise.
* cpu-z80.c: Likewise.
* bfd-in2.h: Likewise plus additional Z80 relocations.
* coff-z80.c: Add new relocations for Z80 target and local label check.
gas * config/tc-z80.c: Add new architectures: Z180 and eZ80. Add support
for assembler code generated by SDCC. Add new relocation types. Add
z80-elf target support.
* config/tc-z80.h: Add z80-elf target support. Enable dollar local
labels. Local labels starts from ".L".
* testsuite/gas/all/fwdexp.d: Fix failure due to symbol conflict.
* testsuite/gas/all/fwdexp.s: Likewise.
* testsuite/gas/z80/suffix.d: Fix failure on ELF target.
* testsuite/gas/z80/z80.exp: Add new tests
* testsuite/gas/z80/dollar.d: New file.
* testsuite/gas/z80/dollar.s: New file.
* testsuite/gas/z80/ez80_adl_all.d: New file.
* testsuite/gas/z80/ez80_adl_all.s: New file.
* testsuite/gas/z80/ez80_adl_suf.d: New file.
* testsuite/gas/z80/ez80_isuf.s: New file.
* testsuite/gas/z80/ez80_z80_all.d: New file.
* testsuite/gas/z80/ez80_z80_all.s: New file.
* testsuite/gas/z80/ez80_z80_suf.d: New file.
* testsuite/gas/z80/r800_extra.d: New file.
* testsuite/gas/z80/r800_extra.s: New file.
* testsuite/gas/z80/r800_ii8.d: New file.
* testsuite/gas/z80/r800_z80_doc.d: New file.
* testsuite/gas/z80/z180.d: New file.
* testsuite/gas/z80/z180.s: New file.
* testsuite/gas/z80/z180_z80_doc.d: New file.
* testsuite/gas/z80/z80_doc.d: New file.
* testsuite/gas/z80/z80_doc.s: New file.
* testsuite/gas/z80/z80_ii8.d: New file.
* testsuite/gas/z80/z80_ii8.s: New file.
* testsuite/gas/z80/z80_in_f_c.d: New file.
* testsuite/gas/z80/z80_in_f_c.s: New file.
* testsuite/gas/z80/z80_op_ii_ld.d: New file.
* testsuite/gas/z80/z80_op_ii_ld.s: New file.
* testsuite/gas/z80/z80_out_c_0.d: New file.
* testsuite/gas/z80/z80_out_c_0.s: New file.
* testsuite/gas/z80/z80_reloc.d: New file.
* testsuite/gas/z80/z80_reloc.s: New file.
* testsuite/gas/z80/z80_sli.d: New file.
* testsuite/gas/z80/z80_sli.s: New file.
ld * Makefile.am: Add new target z80-elf
* configure.tgt: Likewise.
* emultempl/z80.em: Add support for eZ80 and Z180 architectures.
* emulparams/elf32z80.sh: New file.
* emultempl/z80elf.em: Likewise.
* testsuite/ld-z80/arch_ez80_adl.d: Likewise.
* testsuite/ld-z80/arch_ez80_z80.d: Likewise.
* testsuite/ld-z80/arch_r800.d: Likewise.
* testsuite/ld-z80/arch_z180.d: Likewise.
* testsuite/ld-z80/arch_z80.d: Likewise.
* testsuite/ld-z80/comb_arch_ez80_z80.d: Likewise.
* testsuite/ld-z80/comb_arch_z180.d: Likewise.
* testsuite/ld-z80/labels.s: Likewise.
* testsuite/ld-z80/relocs.s: Likewise.
* testsuite/ld-z80/relocs_b_ez80.d: Likewise.
* testsuite/ld-z80/relocs_b_z80.d: Likewise.
* testsuite/ld-z80/relocs_f_z80.d: Likewise.
* testsuite/ld-z80/z80.exp: Likewise.
opcodes * z80-dis.c: Add support for eZ80 and Z80 instructions.
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This fixes PR 25210 by specifying the the correct ELF class for AArch64 stubs.
After doing this the stub section starts behaving like a normal object file
loaded from disk. That is SEC_LINKER_CREATED causes us to have to write the
section manually.
This flag was added as a fix for PR 24753. I believe that
fix to still be correct as linker created sections don't have a size on disk
and it fixes the Arm bootstrap regression. But in this case specifying the
correct section class also makes the stub section not be considered by
compress.c.
So I'm partially revert this change so that we don't have to manage the section
manually as implied by SEC_LINKER_CREATED.
bfd/ChangeLog:
PR 25210
PR 24753
* elfnn-aarch64.c (_bfd_aarch64_create_stub_section): Set ELF class.
ld/ChangeLog:
PR 25210
PR 24753
* emultempl/aarch64elf.em (elf${ELFSIZE}_aarch64_add_stub_section):
Remove SEC_LINKER_CREATED.
* testsuite/ld-aarch64/aarch64-elf.exp: Add erratum835769-843419.
* testsuite/ld-aarch64/erratum835769-843419.d: New test.
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Add the ChangeLog entry.
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I reckon it's quite OK to write &p->field in C when p might be NULL,
and lots of old C programmers probably agree with me. However, ubsan
disagrees and so do some people I respect. I suspect C++ influence is
to blame for the ubsan behaviour. See
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92634. So far no one has
educated me as to why I'm wrong to claim that there isn't anything in
the C standard to say that p->field is always (*p).field. Note 79
doesn't quite do that because it doesn't cover null pointers. If
there was such an equivalence then you could claim &p->field has a
null pointer reference when p is NULL, even though no C compiler would
ever dereference p.
Anyway, to silence ubsan I'm going to apply the following though I
prefer to avoid casts when possible. And I'm using (void *)
deliberately because this is C, not C++!
* ldlang.c (lang_output_section_find_by_flags): Don't use &p->field
when p might be NULL.
* ldelf.c (output_rel_find, ldelf_place_orphan): Likewise.
(insert_os_after, lang_insert_orphan, lookup_name): Likewise.
(strip_excluded_output_sections, lang_clear_os_map): Likewise.
(lang_check, lang_for_each_input_file): Likewise.
(lang_reset_memory_regions, find_replacements_insert_point): Likewise.
(find_rescan_insertion, lang_propagate_lma_regions): Likewise.
(lang_record_phdrs): Likewise.
* emultempl/alphaelf.em (alpha_after_open): Likewise.
* emultempl/mmo.em (mmo_place_orphan): Likewise.
* emultempl/pe.em (gld_${EMULATION_NAME}_place_orphan): Likewise.
* emultempl/pep.em (gld_${EMULATION_NAME}_place_orphan): Likewise.
* emultempl/ppc32elf.em (ppc_after_check_relocs): Likewise.
* emultempl/spuelf.em (spu_before_allocation): Likewise.
(embedded_spu_file): Likewise.
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* testsuite/lib/ld-lib.exp (uses_genelf): Remove moxie.
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* emulparams/elf32moxie.sh (TEMPLATE_NAME): Switch to elf template
to enable --build-id.
* configure.tgt: Don't define targ_extra_ofiles for moxie-*-*.
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* pe-dll.c (pe_get32, pe_as32): Avoid signed overflow.
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Changing objdump disassembly output like this always requires some
testsuite changes, with the avr and x64_64 changes simply due to
picking up better symbols, the whole point of the patch.
The mips changes are due to mips-sgi-irix changing STT_NOTYPE symbols
to STT_OBJECT, which objdump now chooses in preference to script
symbols. The problem is that objdump looks at the first symbol in the
section being disassembled, and if object type, just dumps out bytes
rather than disassembling. This results in new failures:
FAIL: JAL overflow 2
FAIL: undefined weak symbol overflow
FAIL: undefined weak symbol overflow (n32)
FAIL: undefined weak symbol overflow (n64)
So for mips-sgi-irix function symbols really do need to be function
type. I fixed a few more than just the required minimum to avoid the
above test fails.
binutils/
* objdump.c (compare_section): New static var.
(compare_symbols): Sort by current section only. Don't access
symbol name out of bounds when checking for file symbols.
Sort section symbols and object symbols.
(find_symbol_for_address): Remove bogus debugging and section
symbol test.
(disassemble_data): Move symbol sort from here..
(disassemble_section): ..to here. Set compare_section.
ld/
* testsuite/ld-avr/lds-mega.d: Adjust symbols to suit objdump change.
* testsuite/ld-avr/lds-tiny.d: Likewise.
* testsuite/ld-x86-64/load2.d: Likewise.
* testsuite/ld-mips-elf/compact-eh1.s: Give function symbols
function type.
* testsuite/ld-mips-elf/compact-eh1a.s: Likewise.
* testsuite/ld-mips-elf/compact-eh1b.s: Likewise.
* testsuite/ld-mips-elf/compact-eh2.s: Likewise.
* testsuite/ld-mips-elf/compact-eh3.s: Likewise.
* testsuite/ld-mips-elf/compact-eh3a.s: Likewise.
* testsuite/ld-mips-elf/eh-frame5.s: Likewise.
* testsuite/ld-mips-elf/ehdr_start-new.s: Likewise.
* testsuite/ld-mips-elf/ehdr_start-o32.s: Likewise.
* testsuite/ld-mips-elf/emit-relocs-1a.s: Likewise.
* testsuite/ld-mips-elf/jaloverflow-2.s: Likewise.
* testsuite/ld-mips-elf/jaloverflow.s: Likewise.
* testsuite/ld-mips-elf/mips16-call-global-1.s: Likewise.
* testsuite/ld-mips-elf/mips16-intermix-1.s: Likewise.
* testsuite/ld-mips-elf/mips16-pic-1b.s: Likewise.
* testsuite/ld-mips-elf/mips16-pic-4c.s: Likewise.
* testsuite/ld-mips-elf/no-shared-1-n64.s: Likewise.
* testsuite/ld-mips-elf/no-shared-1-o32.s: Likewise.
* testsuite/ld-mips-elf/pic-and-nonpic-1b-micromips.s: Likewise.
* testsuite/ld-mips-elf/pic-and-nonpic-1b.s: Likewise.
* testsuite/ld-mips-elf/pic-and-nonpic-2a.s: Likewise.
* testsuite/ld-mips-elf/pic-and-nonpic-3b.s: Likewise.
* testsuite/ld-mips-elf/pic-and-nonpic-4b.s: Likewise.
* testsuite/ld-mips-elf/pic-and-nonpic-5a.s: Likewise.
* testsuite/ld-mips-elf/pic-and-nonpic-6-n32c.s: Likewise.
* testsuite/ld-mips-elf/pic-and-nonpic-6-n64c.s: Likewise.
* testsuite/ld-mips-elf/pic-and-nonpic-6-o32c.s: Likewise.
* testsuite/ld-mips-elf/pie.s: Likewise.
* testsuite/ld-mips-elf/relax-jalr.s: Likewise.
* testsuite/ld-mips-elf/reloc-1a.s: Likewise.
* testsuite/ld-mips-elf/reloc-2a.s: Likewise.
* testsuite/ld-mips-elf/reloc-4.s: Likewise.
* testsuite/ld-mips-elf/reloc-5.s: Likewise.
* testsuite/ld-mips-elf/reloc-6b.s: Likewise.
* testsuite/ld-mips-elf/textrel-1.s: Likewise.
* testsuite/ld-mips-elf/undefweak-overflow.s: Likewise.
* testsuite/ld-mips-elf/undefweak-overflow.d: Adjust.
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mips-sgi-irix gas emits STT_OBJECT symbols where other assemblers
would use STT_NOTYPE. See mips_frob_symbol in gas/config/tc-mips.c.
Also, the section of some dynamic symbols is set to SHN_MIPS_TEXT or
SHN_MIPS_DATA. See _bfd_mips_elf_finish_dynamic_symbol in
bfd/elfxx-mips.c. These differences are visible in readelf output
and cause some tests to fail for no other good reason.
The patch fixes the following fails and removes an xfail.
FAIL: ld-elf/pr23591
FAIL: PROVIDE_HIDDEN test (auxiliary shared object)
FAIL: PR ld/21233 dynamic symbols with section GC (auxiliary shared library)
* testsuite/ld-elf/pr21233-l.sd: Accept OBJECT for type and
PRC for section of symbols.
* testsuite/ld-elf/pr23591.d: Likewise.
* testsuite/ld-elf/provide-hidden-s.nd: Likewise.
* testsuite/ld-mips-elf/start.s: Make symbols function type.
* testsuite/ld-mips-elf/hash2.d: Adjust. Don't xfail irix.
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This is one way of fixing ubsan bug reports, just delete the code.
The assembler support was removed back in 2005 along with other
non-BFD assemblers, but somehow the remainder of the port stayed in.
bfd/
* coff-tic80.c: Delete file.
* cpu-tic80.c: Delete file.
* archures.c: Remove tic80 support.
* coffcode.h: Likewise.
* coffswap.h: Likewise.
* targets.c: Likewise.
* config.bfd: Likewise.
* configure.ac: Likewise.
* Makefile.am: Likewise.
* Makefile.in: Regenerate.
* bfd-in2.h: Regenerate.
* configure: Regenerate.
* po/SRC-POTFILES.in: Regenerate.
binutils/
* testsuite/binutils-all/objcopy.exp: Remove tic80 support.
* testsuite/binutils-all/objdump.exp: Likewise.
gas/
* doc/as.texi: Remove mention of tic80.
include/
* coff/tic80.h: Delete file.
* opcode/tic80.h: Delete file.
ld/
* emulparams/tic80coff.sh: Delete file.
* scripttempl/tic80coff.sc: Delete file.
* configure.tgt: Remove tic80 support.
* Makefile.am: Likewise.
* Makefile.in: Regenerate.
* po/BLD-POTFILES.in: Regenerate.
opcodes/
* tic80-dis.c: Delete file.
* tic80-opc.c: Delete file.
* disassemble.c: Remove tic80 support.
* disassemble.h: Likewise.
* Makefile.am: Likewise.
* configure.ac: Likewise.
* Makefile.in: Regenerate.
* configure: Regenerate.
* po/POTFILES.in: Regenerate.
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Add tests for -malign-branch-boundary, -malign-branch and
-mbranches-within-32B-boundaries.
gas/
* testsuite/gas/i386/align-branch-1.s: New file.
* testsuite/gas/i386/align-branch-1a.d: Likewise.
* testsuite/gas/i386/align-branch-1b.d: Likewise.
* testsuite/gas/i386/align-branch-1c.d: Likewise.
* testsuite/gas/i386/align-branch-1d.d: Likewise.
* testsuite/gas/i386/align-branch-1e.d: Likewise.
* testsuite/gas/i386/align-branch-1f.d: Likewise.
* testsuite/gas/i386/align-branch-1g.d: Likewise.
* testsuite/gas/i386/align-branch-1h.d: Likewise.
* testsuite/gas/i386/align-branch-2.s: Likewise.
* testsuite/gas/i386/align-branch-2a.d: Likewise.
* testsuite/gas/i386/align-branch-2b.d: Likewise.
* testsuite/gas/i386/align-branch-2c.d: Likewise.
* testsuite/gas/i386/align-branch-3.d: Likewise.
* testsuite/gas/i386/align-branch-3.s: Likewise.
* testsuite/gas/i386/align-branch-4.s: Likewise.
* testsuite/gas/i386/align-branch-4a.d: Likewise.
* testsuite/gas/i386/align-branch-4b.d: Likewise.
* testsuite/gas/i386/align-branch-5.d: Likewise.
* testsuite/gas/i386/align-branch-5.s: Likewise.
* testsuite/gas/i386/align-branch-6.d: Likewise.
* testsuite/gas/i386/align-branch-6.s: Likewise.
* testsuite/gas/i386/align-branch-7.d: Likewise.
* testsuite/gas/i386/align-branch-7.s: Likewise.
* testsuite/gas/i386/align-branch-8.d: Likewise.
* testsuite/gas/i386/align-branch-8.s: Likewise.
* testsuite/gas/i386/x86-64-align-branch-1.s: Likewise.
* testsuite/gas/i386/x86-64-align-branch-1a.d: Likewise.
* testsuite/gas/i386/x86-64-align-branch-1b.d: Likewise.
* testsuite/gas/i386/x86-64-align-branch-1c.d: Likewise.
* testsuite/gas/i386/x86-64-align-branch-1d.d: Likewise.
* testsuite/gas/i386/x86-64-align-branch-1e.d: Likewise.
* testsuite/gas/i386/x86-64-align-branch-1f.d: Likewise.
* testsuite/gas/i386/x86-64-align-branch-1g.d: Likewise.
* testsuite/gas/i386/x86-64-align-branch-1h.d: Likewise.
* testsuite/gas/i386/x86-64-align-branch-2.s: Likewise.
* testsuite/gas/i386/x86-64-align-branch-2a.d: Likewise.
* testsuite/gas/i386/x86-64-align-branch-2b.d: Likewise.
* testsuite/gas/i386/x86-64-align-branch-2c.d: Likewise.
* testsuite/gas/i386/x86-64-align-branch-3.d: Likewise.
* testsuite/gas/i386/x86-64-align-branch-3.s: Likewise.
* testsuite/gas/i386/x86-64-align-branch-4.s: Likewise.
* testsuite/gas/i386/x86-64-align-branch-4a.d: Likewise.
* testsuite/gas/i386/x86-64-align-branch-4b.d: Likewise.
* testsuite/gas/i386/x86-64-align-branch-5.d: Likewise.
* testsuite/gas/i386/x86-64-align-branch-6.d: Likewise.
* testsuite/gas/i386/x86-64-align-branch-7.d: Likewise.
* testsuite/gas/i386/x86-64-align-branch-7.s: Likewise.
* testsuite/gas/i386/x86-64-align-branch-8.d: Likewise.
* testsuite/gas/i386/x86-64-align-branch-8.s: Likewise.
* testsuite/gas/i386/i386.exp: Run new tests.
ld/
* testsuite/ld-i386/align-branch-1.d: New file.
* testsuite/ld-i386/align-branch-1.s: Likewise.
* testsuite/ld-x86-64/align-branch-1.d: Likewise.
* testsuite/ld-x86-64/align-branch-1.3: Likewise.
* testsuite/ld-i386/i386.exp: Run the new test.
* testsuite/ld-x86-64/x86-64.exp: Likewise.
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This adds an alternative to using #... in dump files, useful where we
only want to allow specific extra output. DW_CFA_nop in CIEs and FDEs
to pad out to required alignment (larger for 64-bit than 32-bit) is
an example where these optional match patterns are useful.
binutils/
* testsuite/lib/binutils-common.exp (regexp_diff): Support #?REGEXP.
ld/
* testsuite/ld-elf/eh4.d: Match optional padding DW_CFA_nop in FDEs.
* testsuite/ld-elf/eh5.d: Likewise, and extra CIEs emitted on
embedded targets.
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For mips*-linux targets, fixes the following fails.
FAIL: MIPS eh-frame 1, n32
FAIL: MIPS eh-frame 1, n64
FAIL: MIPS eh-frame 2, n32
FAIL: MIPS eh-frame 2, n64
* testsuite/ld-mips-elf/eh-frame1-n32.d: Pass --eh-frame-hdr to ld.
* testsuite/ld-mips-elf/eh-frame1-n64.d: Likewise.
* testsuite/ld-mips-elf/eh-frame2-n32.d: Likewise.
* testsuite/ld-mips-elf/eh-frame2-n64.d: Likewise.
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Do print the linefeed when length is zero.
PR 25244
* ldlang.c (lang_print_memory_usage): Correct last patch.
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PR 25243
* emulparams/armelf.sh (OTHER_READONLY_SECTIONS): Move definition
of __exidx_start and __exidx_end into ARM.exidx.
* emulparams/armelf_linux_eabi.sh (OTHER_READONLY_SECTIONS): Likewise.
* emulparams/armsymbian.sh (OTHER_READONLY_SECTIONS): Similarly.
* emulparams/elf32_tic6x_le.sh (OTHER_READONLY_SECTIONS): Similarly.
* emulparams/armelf_fuchsia.sh: Source armelf_linux_eabi.sh,
just redefining TEXT_START_ADDR.
* emulparams/armelf_linux_fdpiceabi.sh: Source armelf_linux_eabi.sh,
adding to OTHER_READONLY_SECTIONS.
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PR 25244
* ldlang.c (lang_print_memory_usage): Don't print percent used
when length is zero.
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